162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * OMAP15xx specific gpio init
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/
662306a36Sopenharmony_ci *
762306a36Sopenharmony_ci * Author:
862306a36Sopenharmony_ci *	Charulatha V <charu@ti.com>
962306a36Sopenharmony_ci */
1062306a36Sopenharmony_ci
1162306a36Sopenharmony_ci#include <linux/platform_data/gpio-omap.h>
1262306a36Sopenharmony_ci#include <linux/soc/ti/omap1-soc.h>
1362306a36Sopenharmony_ci#include <asm/irq.h>
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ci#include "irqs.h"
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_ci#define OMAP1_MPUIO_VBASE		OMAP1_MPUIO_BASE
1862306a36Sopenharmony_ci#define OMAP1510_GPIO_BASE		0xFFFCE000
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ci/* gpio1 */
2162306a36Sopenharmony_cistatic struct resource omap15xx_mpu_gpio_resources[] = {
2262306a36Sopenharmony_ci	{
2362306a36Sopenharmony_ci		.start	= OMAP1_MPUIO_VBASE,
2462306a36Sopenharmony_ci		.end	= OMAP1_MPUIO_VBASE + SZ_2K - 1,
2562306a36Sopenharmony_ci		.flags	= IORESOURCE_MEM,
2662306a36Sopenharmony_ci	},
2762306a36Sopenharmony_ci	{
2862306a36Sopenharmony_ci		.start	= INT_MPUIO,
2962306a36Sopenharmony_ci		.flags	= IORESOURCE_IRQ,
3062306a36Sopenharmony_ci	},
3162306a36Sopenharmony_ci};
3262306a36Sopenharmony_ci
3362306a36Sopenharmony_cistatic struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
3462306a36Sopenharmony_ci	.revision       = USHRT_MAX,
3562306a36Sopenharmony_ci	.direction	= OMAP_MPUIO_IO_CNTL,
3662306a36Sopenharmony_ci	.datain		= OMAP_MPUIO_INPUT_LATCH,
3762306a36Sopenharmony_ci	.dataout	= OMAP_MPUIO_OUTPUT,
3862306a36Sopenharmony_ci	.irqstatus	= OMAP_MPUIO_GPIO_INT,
3962306a36Sopenharmony_ci	.irqenable	= OMAP_MPUIO_GPIO_MASKIT,
4062306a36Sopenharmony_ci	.irqenable_inv	= true,
4162306a36Sopenharmony_ci	.irqctrl	= OMAP_MPUIO_GPIO_INT_EDGE,
4262306a36Sopenharmony_ci};
4362306a36Sopenharmony_ci
4462306a36Sopenharmony_cistatic struct omap_gpio_platform_data omap15xx_mpu_gpio_config = {
4562306a36Sopenharmony_ci	.is_mpuio		= true,
4662306a36Sopenharmony_ci	.bank_width		= 16,
4762306a36Sopenharmony_ci	.bank_stride		= 1,
4862306a36Sopenharmony_ci	.regs			= &omap15xx_mpuio_regs,
4962306a36Sopenharmony_ci};
5062306a36Sopenharmony_ci
5162306a36Sopenharmony_cistatic struct platform_device omap15xx_mpu_gpio = {
5262306a36Sopenharmony_ci	.name           = "omap_gpio",
5362306a36Sopenharmony_ci	.id             = 0,
5462306a36Sopenharmony_ci	.dev            = {
5562306a36Sopenharmony_ci		.platform_data = &omap15xx_mpu_gpio_config,
5662306a36Sopenharmony_ci	},
5762306a36Sopenharmony_ci	.num_resources = ARRAY_SIZE(omap15xx_mpu_gpio_resources),
5862306a36Sopenharmony_ci	.resource = omap15xx_mpu_gpio_resources,
5962306a36Sopenharmony_ci};
6062306a36Sopenharmony_ci
6162306a36Sopenharmony_ci/* gpio2 */
6262306a36Sopenharmony_cistatic struct resource omap15xx_gpio_resources[] = {
6362306a36Sopenharmony_ci	{
6462306a36Sopenharmony_ci		.start	= OMAP1510_GPIO_BASE,
6562306a36Sopenharmony_ci		.end	= OMAP1510_GPIO_BASE + SZ_2K - 1,
6662306a36Sopenharmony_ci		.flags	= IORESOURCE_MEM,
6762306a36Sopenharmony_ci	},
6862306a36Sopenharmony_ci	{
6962306a36Sopenharmony_ci		.start	= INT_GPIO_BANK1,
7062306a36Sopenharmony_ci		.flags	= IORESOURCE_IRQ,
7162306a36Sopenharmony_ci	},
7262306a36Sopenharmony_ci};
7362306a36Sopenharmony_ci
7462306a36Sopenharmony_cistatic struct omap_gpio_reg_offs omap15xx_gpio_regs = {
7562306a36Sopenharmony_ci	.revision	= USHRT_MAX,
7662306a36Sopenharmony_ci	.direction	= OMAP1510_GPIO_DIR_CONTROL,
7762306a36Sopenharmony_ci	.datain		= OMAP1510_GPIO_DATA_INPUT,
7862306a36Sopenharmony_ci	.dataout	= OMAP1510_GPIO_DATA_OUTPUT,
7962306a36Sopenharmony_ci	.irqstatus	= OMAP1510_GPIO_INT_STATUS,
8062306a36Sopenharmony_ci	.irqenable	= OMAP1510_GPIO_INT_MASK,
8162306a36Sopenharmony_ci	.irqenable_inv	= true,
8262306a36Sopenharmony_ci	.irqctrl	= OMAP1510_GPIO_INT_CONTROL,
8362306a36Sopenharmony_ci	.pinctrl	= OMAP1510_GPIO_PIN_CONTROL,
8462306a36Sopenharmony_ci};
8562306a36Sopenharmony_ci
8662306a36Sopenharmony_cistatic struct omap_gpio_platform_data omap15xx_gpio_config = {
8762306a36Sopenharmony_ci	.bank_width		= 16,
8862306a36Sopenharmony_ci	.regs                   = &omap15xx_gpio_regs,
8962306a36Sopenharmony_ci};
9062306a36Sopenharmony_ci
9162306a36Sopenharmony_cistatic struct platform_device omap15xx_gpio = {
9262306a36Sopenharmony_ci	.name           = "omap_gpio",
9362306a36Sopenharmony_ci	.id             = 1,
9462306a36Sopenharmony_ci	.dev            = {
9562306a36Sopenharmony_ci		.platform_data = &omap15xx_gpio_config,
9662306a36Sopenharmony_ci	},
9762306a36Sopenharmony_ci	.num_resources = ARRAY_SIZE(omap15xx_gpio_resources),
9862306a36Sopenharmony_ci	.resource = omap15xx_gpio_resources,
9962306a36Sopenharmony_ci};
10062306a36Sopenharmony_ci
10162306a36Sopenharmony_ci/*
10262306a36Sopenharmony_ci * omap15xx_gpio_init needs to be done before
10362306a36Sopenharmony_ci * machine_init functions access gpio APIs.
10462306a36Sopenharmony_ci * Hence omap15xx_gpio_init is a postcore_initcall.
10562306a36Sopenharmony_ci */
10662306a36Sopenharmony_cistatic int __init omap15xx_gpio_init(void)
10762306a36Sopenharmony_ci{
10862306a36Sopenharmony_ci	if (!cpu_is_omap15xx())
10962306a36Sopenharmony_ci		return -EINVAL;
11062306a36Sopenharmony_ci
11162306a36Sopenharmony_ci	platform_device_register(&omap15xx_mpu_gpio);
11262306a36Sopenharmony_ci	platform_device_register(&omap15xx_gpio);
11362306a36Sopenharmony_ci
11462306a36Sopenharmony_ci	return 0;
11562306a36Sopenharmony_ci}
11662306a36Sopenharmony_cipostcore_initcall(omap15xx_gpio_init);
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