162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Copyright (C) STMicroelectronics SA 2017 - All Rights Reserved
462306a36Sopenharmony_ci * Author:   Gerald Baeza <gerald.baeza@st.com> for STMicroelectronics.
562306a36Sopenharmony_ci */
662306a36Sopenharmony_ci
762306a36Sopenharmony_ci#ifdef CONFIG_STM32F4_DEBUG_UART
862306a36Sopenharmony_ci#define STM32_USART_SR_OFF		0x00
962306a36Sopenharmony_ci#define STM32_USART_TDR_OFF		0x04
1062306a36Sopenharmony_ci#endif
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_ci#if defined(CONFIG_STM32F7_DEBUG_UART) || defined(CONFIG_STM32H7_DEBUG_UART) || \
1362306a36Sopenharmony_ci	defined(CONFIG_STM32MP1_DEBUG_UART)
1462306a36Sopenharmony_ci#define STM32_USART_SR_OFF		0x1C
1562306a36Sopenharmony_ci#define STM32_USART_TDR_OFF		0x28
1662306a36Sopenharmony_ci#endif
1762306a36Sopenharmony_ci
1862306a36Sopenharmony_ci#define STM32_USART_TC			(1 << 6)	/* Tx complete       */
1962306a36Sopenharmony_ci#define STM32_USART_TXE			(1 << 7)	/* Tx data reg empty */
2062306a36Sopenharmony_ci
2162306a36Sopenharmony_ci.macro	addruart, rp, rv, tmp
2262306a36Sopenharmony_ci	ldr	\rp, =CONFIG_DEBUG_UART_PHYS @ physical base
2362306a36Sopenharmony_ci	ldr	\rv, =CONFIG_DEBUG_UART_VIRT @ virt base
2462306a36Sopenharmony_ci.endm
2562306a36Sopenharmony_ci
2662306a36Sopenharmony_ci.macro  senduart,rd,rx
2762306a36Sopenharmony_ci	strb    \rd, [\rx, #STM32_USART_TDR_OFF]
2862306a36Sopenharmony_ci.endm
2962306a36Sopenharmony_ci
3062306a36Sopenharmony_ci.macro	waituartcts,rd,rx
3162306a36Sopenharmony_ci.endm
3262306a36Sopenharmony_ci
3362306a36Sopenharmony_ci.macro  waituarttxrdy,rd,rx
3462306a36Sopenharmony_ci1001:	ldr	\rd, [\rx, #(STM32_USART_SR_OFF)]	@ Read Status Register
3562306a36Sopenharmony_ci	tst	\rd, #STM32_USART_TXE			@ TXE = 1 = tx empty
3662306a36Sopenharmony_ci	beq	1001b
3762306a36Sopenharmony_ci.endm
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ci.macro  busyuart,rd,rx
4062306a36Sopenharmony_ci1001:	ldr	\rd, [\rx, #(STM32_USART_SR_OFF)]	@ Read Status Register
4162306a36Sopenharmony_ci	tst	\rd, #STM32_USART_TC			@ TC = 1 = tx complete
4262306a36Sopenharmony_ci	beq	1001b
4362306a36Sopenharmony_ci.endm
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