1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * arch/arm/include/asm/vfp.h 4 * 5 * VFP register definitions. 6 * First, the standard VFP set. 7 */ 8 9#ifndef __ASM_VFP_H 10#define __ASM_VFP_H 11 12#ifndef CONFIG_AS_VFP_VMRS_FPINST 13#define FPSID cr0 14#define FPSCR cr1 15#define MVFR1 cr6 16#define MVFR0 cr7 17#define FPEXC cr8 18#define FPINST cr9 19#define FPINST2 cr10 20#endif 21 22/* FPSID bits */ 23#define FPSID_IMPLEMENTER_BIT (24) 24#define FPSID_IMPLEMENTER_MASK (0xff << FPSID_IMPLEMENTER_BIT) 25#define FPSID_SOFTWARE (1<<23) 26#define FPSID_FORMAT_BIT (21) 27#define FPSID_FORMAT_MASK (0x3 << FPSID_FORMAT_BIT) 28#define FPSID_NODOUBLE (1<<20) 29#define FPSID_ARCH_BIT (16) 30#define FPSID_ARCH_MASK (0xF << FPSID_ARCH_BIT) 31#define FPSID_CPUID_ARCH_MASK (0x7F << FPSID_ARCH_BIT) 32#define FPSID_PART_BIT (8) 33#define FPSID_PART_MASK (0xFF << FPSID_PART_BIT) 34#define FPSID_VARIANT_BIT (4) 35#define FPSID_VARIANT_MASK (0xF << FPSID_VARIANT_BIT) 36#define FPSID_REV_BIT (0) 37#define FPSID_REV_MASK (0xF << FPSID_REV_BIT) 38 39/* FPEXC bits */ 40#define FPEXC_EX (1 << 31) 41#define FPEXC_EN (1 << 30) 42#define FPEXC_DEX (1 << 29) 43#define FPEXC_FP2V (1 << 28) 44#define FPEXC_VV (1 << 27) 45#define FPEXC_TFV (1 << 26) 46#define FPEXC_LENGTH_BIT (8) 47#define FPEXC_LENGTH_MASK (7 << FPEXC_LENGTH_BIT) 48#define FPEXC_IDF (1 << 7) 49#define FPEXC_IXF (1 << 4) 50#define FPEXC_UFF (1 << 3) 51#define FPEXC_OFF (1 << 2) 52#define FPEXC_DZF (1 << 1) 53#define FPEXC_IOF (1 << 0) 54#define FPEXC_TRAP_MASK (FPEXC_IDF|FPEXC_IXF|FPEXC_UFF|FPEXC_OFF|FPEXC_DZF|FPEXC_IOF) 55 56/* FPSCR bits */ 57#define FPSCR_DEFAULT_NAN (1<<25) 58#define FPSCR_FLUSHTOZERO (1<<24) 59#define FPSCR_ROUND_NEAREST (0<<22) 60#define FPSCR_ROUND_PLUSINF (1<<22) 61#define FPSCR_ROUND_MINUSINF (2<<22) 62#define FPSCR_ROUND_TOZERO (3<<22) 63#define FPSCR_RMODE_BIT (22) 64#define FPSCR_RMODE_MASK (3 << FPSCR_RMODE_BIT) 65#define FPSCR_STRIDE_BIT (20) 66#define FPSCR_STRIDE_MASK (3 << FPSCR_STRIDE_BIT) 67#define FPSCR_LENGTH_BIT (16) 68#define FPSCR_LENGTH_MASK (7 << FPSCR_LENGTH_BIT) 69#define FPSCR_IOE (1<<8) 70#define FPSCR_DZE (1<<9) 71#define FPSCR_OFE (1<<10) 72#define FPSCR_UFE (1<<11) 73#define FPSCR_IXE (1<<12) 74#define FPSCR_IDE (1<<15) 75#define FPSCR_IOC (1<<0) 76#define FPSCR_DZC (1<<1) 77#define FPSCR_OFC (1<<2) 78#define FPSCR_UFC (1<<3) 79#define FPSCR_IXC (1<<4) 80#define FPSCR_IDC (1<<7) 81 82/* MVFR0 bits */ 83#define MVFR0_A_SIMD_BIT (0) 84#define MVFR0_A_SIMD_MASK (0xf << MVFR0_A_SIMD_BIT) 85#define MVFR0_SP_BIT (4) 86#define MVFR0_SP_MASK (0xf << MVFR0_SP_BIT) 87#define MVFR0_DP_BIT (8) 88#define MVFR0_DP_MASK (0xf << MVFR0_DP_BIT) 89 90/* MVFR1 bits */ 91#define MVFR1_ASIMDHP_BIT (20) 92#define MVFR1_ASIMDHP_MASK (0xf << MVFR1_ASIMDHP_BIT) 93#define MVFR1_FPHP_BIT (24) 94#define MVFR1_FPHP_MASK (0xf << MVFR1_FPHP_BIT) 95 96/* Bit patterns for decoding the packaged operation descriptors */ 97#define VFPOPDESC_LENGTH_BIT (9) 98#define VFPOPDESC_LENGTH_MASK (0x07 << VFPOPDESC_LENGTH_BIT) 99#define VFPOPDESC_UNUSED_BIT (24) 100#define VFPOPDESC_UNUSED_MASK (0xFF << VFPOPDESC_UNUSED_BIT) 101#define VFPOPDESC_OPDESC_MASK (~(VFPOPDESC_LENGTH_MASK | VFPOPDESC_UNUSED_MASK)) 102 103#ifndef __ASSEMBLY__ 104void vfp_disable(void); 105#endif 106 107#endif /* __ASM_VFP_H */ 108