162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * ARM specific SMP header, this contains our implementation
462306a36Sopenharmony_ci * details.
562306a36Sopenharmony_ci */
662306a36Sopenharmony_ci#ifndef __ASMARM_SMP_PLAT_H
762306a36Sopenharmony_ci#define __ASMARM_SMP_PLAT_H
862306a36Sopenharmony_ci
962306a36Sopenharmony_ci#include <linux/cpumask.h>
1062306a36Sopenharmony_ci#include <linux/err.h>
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_ci#include <asm/cpu.h>
1362306a36Sopenharmony_ci#include <asm/cputype.h>
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ci/*
1662306a36Sopenharmony_ci * Return true if we are running on a SMP platform
1762306a36Sopenharmony_ci */
1862306a36Sopenharmony_cistatic inline bool is_smp(void)
1962306a36Sopenharmony_ci{
2062306a36Sopenharmony_ci#ifndef CONFIG_SMP
2162306a36Sopenharmony_ci	return false;
2262306a36Sopenharmony_ci#elif defined(CONFIG_SMP_ON_UP)
2362306a36Sopenharmony_ci	extern unsigned int smp_on_up;
2462306a36Sopenharmony_ci	return !!smp_on_up;
2562306a36Sopenharmony_ci#else
2662306a36Sopenharmony_ci	return true;
2762306a36Sopenharmony_ci#endif
2862306a36Sopenharmony_ci}
2962306a36Sopenharmony_ci
3062306a36Sopenharmony_ci/**
3162306a36Sopenharmony_ci * smp_cpuid_part() - return part id for a given cpu
3262306a36Sopenharmony_ci * @cpu:	logical cpu id.
3362306a36Sopenharmony_ci *
3462306a36Sopenharmony_ci * Return: part id of logical cpu passed as argument.
3562306a36Sopenharmony_ci */
3662306a36Sopenharmony_cistatic inline unsigned int smp_cpuid_part(int cpu)
3762306a36Sopenharmony_ci{
3862306a36Sopenharmony_ci	struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpu);
3962306a36Sopenharmony_ci
4062306a36Sopenharmony_ci	return is_smp() ? cpu_info->cpuid & ARM_CPU_PART_MASK :
4162306a36Sopenharmony_ci			  read_cpuid_part();
4262306a36Sopenharmony_ci}
4362306a36Sopenharmony_ci
4462306a36Sopenharmony_ci/* all SMP configurations have the extended CPUID registers */
4562306a36Sopenharmony_ci#ifndef CONFIG_MMU
4662306a36Sopenharmony_ci#define tlb_ops_need_broadcast()	0
4762306a36Sopenharmony_ci#else
4862306a36Sopenharmony_cistatic inline int tlb_ops_need_broadcast(void)
4962306a36Sopenharmony_ci{
5062306a36Sopenharmony_ci	if (!is_smp())
5162306a36Sopenharmony_ci		return 0;
5262306a36Sopenharmony_ci
5362306a36Sopenharmony_ci	return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 2;
5462306a36Sopenharmony_ci}
5562306a36Sopenharmony_ci#endif
5662306a36Sopenharmony_ci
5762306a36Sopenharmony_ci#if !defined(CONFIG_SMP) || __LINUX_ARM_ARCH__ >= 7
5862306a36Sopenharmony_ci#define cache_ops_need_broadcast()	0
5962306a36Sopenharmony_ci#else
6062306a36Sopenharmony_cistatic inline int cache_ops_need_broadcast(void)
6162306a36Sopenharmony_ci{
6262306a36Sopenharmony_ci	if (!is_smp())
6362306a36Sopenharmony_ci		return 0;
6462306a36Sopenharmony_ci
6562306a36Sopenharmony_ci	return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 1;
6662306a36Sopenharmony_ci}
6762306a36Sopenharmony_ci#endif
6862306a36Sopenharmony_ci
6962306a36Sopenharmony_ci/*
7062306a36Sopenharmony_ci * Logical CPU mapping.
7162306a36Sopenharmony_ci */
7262306a36Sopenharmony_ciextern u32 __cpu_logical_map[];
7362306a36Sopenharmony_ci#define cpu_logical_map(cpu)	__cpu_logical_map[cpu]
7462306a36Sopenharmony_ci/*
7562306a36Sopenharmony_ci * Retrieve logical cpu index corresponding to a given MPIDR[23:0]
7662306a36Sopenharmony_ci *  - mpidr: MPIDR[23:0] to be used for the look-up
7762306a36Sopenharmony_ci *
7862306a36Sopenharmony_ci * Returns the cpu logical index or -EINVAL on look-up error
7962306a36Sopenharmony_ci */
8062306a36Sopenharmony_cistatic inline int get_logical_index(u32 mpidr)
8162306a36Sopenharmony_ci{
8262306a36Sopenharmony_ci	int cpu;
8362306a36Sopenharmony_ci	for (cpu = 0; cpu < nr_cpu_ids; cpu++)
8462306a36Sopenharmony_ci		if (cpu_logical_map(cpu) == mpidr)
8562306a36Sopenharmony_ci			return cpu;
8662306a36Sopenharmony_ci	return -EINVAL;
8762306a36Sopenharmony_ci}
8862306a36Sopenharmony_ci
8962306a36Sopenharmony_ci/*
9062306a36Sopenharmony_ci * NOTE ! Assembly code relies on the following
9162306a36Sopenharmony_ci * structure memory layout in order to carry out load
9262306a36Sopenharmony_ci * multiple from its base address. For more
9362306a36Sopenharmony_ci * information check arch/arm/kernel/sleep.S
9462306a36Sopenharmony_ci */
9562306a36Sopenharmony_cistruct mpidr_hash {
9662306a36Sopenharmony_ci	u32	mask; /* used by sleep.S */
9762306a36Sopenharmony_ci	u32	shift_aff[3]; /* used by sleep.S */
9862306a36Sopenharmony_ci	u32	bits;
9962306a36Sopenharmony_ci};
10062306a36Sopenharmony_ci
10162306a36Sopenharmony_ciextern struct mpidr_hash mpidr_hash;
10262306a36Sopenharmony_ci
10362306a36Sopenharmony_cistatic inline u32 mpidr_hash_size(void)
10462306a36Sopenharmony_ci{
10562306a36Sopenharmony_ci	return 1 << mpidr_hash.bits;
10662306a36Sopenharmony_ci}
10762306a36Sopenharmony_ci
10862306a36Sopenharmony_ciextern int platform_can_secondary_boot(void);
10962306a36Sopenharmony_ciextern int platform_can_cpu_hotplug(void);
11062306a36Sopenharmony_ci
11162306a36Sopenharmony_ci#ifdef CONFIG_HOTPLUG_CPU
11262306a36Sopenharmony_ciextern int platform_can_hotplug_cpu(unsigned int cpu);
11362306a36Sopenharmony_ci#else
11462306a36Sopenharmony_cistatic inline int platform_can_hotplug_cpu(unsigned int cpu)
11562306a36Sopenharmony_ci{
11662306a36Sopenharmony_ci	return 0;
11762306a36Sopenharmony_ci}
11862306a36Sopenharmony_ci#endif
11962306a36Sopenharmony_ci
12062306a36Sopenharmony_ci#endif
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