162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Copyright (C) 2014 Renesas Electronics Corporation
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Initialization of CNTVOFF register from secure mode
662306a36Sopenharmony_ci *
762306a36Sopenharmony_ci */
862306a36Sopenharmony_ci
962306a36Sopenharmony_ci#include <linux/linkage.h>
1062306a36Sopenharmony_ci#include <asm/assembler.h>
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_ciENTRY(secure_cntvoff_init)
1362306a36Sopenharmony_ci	.arch	armv7-a
1462306a36Sopenharmony_ci	/*
1562306a36Sopenharmony_ci	 * CNTVOFF has to be initialized either from non-secure Hypervisor
1662306a36Sopenharmony_ci	 * mode or secure Monitor mode with SCR.NS==1. If TrustZone is enabled
1762306a36Sopenharmony_ci	 * then it should be handled by the secure code. The CPU must implement
1862306a36Sopenharmony_ci	 * the virtualization extensions.
1962306a36Sopenharmony_ci	 */
2062306a36Sopenharmony_ci	cps	#MON_MODE
2162306a36Sopenharmony_ci	mrc	p15, 0, r1, c1, c1, 0		/* Get Secure Config */
2262306a36Sopenharmony_ci	orr	r0, r1, #1
2362306a36Sopenharmony_ci	mcr	p15, 0, r0, c1, c1, 0		/* Set Non Secure bit */
2462306a36Sopenharmony_ci	isb
2562306a36Sopenharmony_ci	mov	r0, #0
2662306a36Sopenharmony_ci	mcrr	p15, 4, r0, r0, c14		/* CNTVOFF = 0 */
2762306a36Sopenharmony_ci	isb
2862306a36Sopenharmony_ci	mcr	p15, 0, r1, c1, c1, 0		/* Set Secure bit */
2962306a36Sopenharmony_ci	isb
3062306a36Sopenharmony_ci	cps	#SVC_MODE
3162306a36Sopenharmony_ci	ret	lr
3262306a36Sopenharmony_ciENDPROC(secure_cntvoff_init)
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