162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Device Tree Source for OMAP443x SoC 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 662306a36Sopenharmony_ci */ 762306a36Sopenharmony_ci 862306a36Sopenharmony_ci#include "omap4.dtsi" 962306a36Sopenharmony_ci 1062306a36Sopenharmony_ci/ { 1162306a36Sopenharmony_ci cpus { 1262306a36Sopenharmony_ci cpu0: cpu@0 { 1362306a36Sopenharmony_ci /* OMAP443x variants OPP50-OPPNT */ 1462306a36Sopenharmony_ci operating-points = < 1562306a36Sopenharmony_ci /* kHz uV */ 1662306a36Sopenharmony_ci 300000 1025000 1762306a36Sopenharmony_ci 600000 1200000 1862306a36Sopenharmony_ci 800000 1313000 1962306a36Sopenharmony_ci 1008000 1375000 2062306a36Sopenharmony_ci >; 2162306a36Sopenharmony_ci clock-latency = <300000>; /* From legacy driver */ 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ci /* cooling options */ 2462306a36Sopenharmony_ci #cooling-cells = <2>; /* min followed by max */ 2562306a36Sopenharmony_ci }; 2662306a36Sopenharmony_ci }; 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ci thermal-zones { 2962306a36Sopenharmony_ci #include "omap4-cpu-thermal.dtsi" 3062306a36Sopenharmony_ci }; 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ci ocp { 3362306a36Sopenharmony_ci /* 4430 has only gpio_86 tshut and no talert interrupt */ 3462306a36Sopenharmony_ci bandgap: bandgap@4a002260 { 3562306a36Sopenharmony_ci reg = <0x4a002260 0x4 3662306a36Sopenharmony_ci 0x4a00232C 0x4>; 3762306a36Sopenharmony_ci compatible = "ti,omap4430-bandgap"; 3862306a36Sopenharmony_ci gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>; 3962306a36Sopenharmony_ci 4062306a36Sopenharmony_ci #thermal-sensor-cells = <0>; 4162306a36Sopenharmony_ci }; 4262306a36Sopenharmony_ci }; 4362306a36Sopenharmony_ci 4462306a36Sopenharmony_ci ocp { 4562306a36Sopenharmony_ci abb_mpu: regulator-abb-mpu { 4662306a36Sopenharmony_ci status = "okay"; 4762306a36Sopenharmony_ci 4862306a36Sopenharmony_ci reg = <0x4a307bd0 0x8>, <0x4a306014 0x4>; 4962306a36Sopenharmony_ci reg-names = "base-address", "int-address"; 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_ci ti,abb_info = < 5262306a36Sopenharmony_ci /*uV ABB efuse rbb_m fbb_m vset_m*/ 5362306a36Sopenharmony_ci 1025000 0 0 0 0 0 5462306a36Sopenharmony_ci 1200000 0 0 0 0 0 5562306a36Sopenharmony_ci 1313000 0 0 0 0 0 5662306a36Sopenharmony_ci 1375000 1 0 0 0 0 5762306a36Sopenharmony_ci 1389000 1 0 0 0 0 5862306a36Sopenharmony_ci >; 5962306a36Sopenharmony_ci }; 6062306a36Sopenharmony_ci 6162306a36Sopenharmony_ci /* Default unused, just provide register info for record */ 6262306a36Sopenharmony_ci abb_iva: regulator-abb-iva { 6362306a36Sopenharmony_ci reg = <0x4a307bd8 0x8>, <0x4a306010 0x4>; 6462306a36Sopenharmony_ci reg-names = "base-address", "int-address"; 6562306a36Sopenharmony_ci }; 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ci }; 6862306a36Sopenharmony_ci 6962306a36Sopenharmony_ci}; 7062306a36Sopenharmony_ci 7162306a36Sopenharmony_ci&cpu_thermal { 7262306a36Sopenharmony_ci thermal-sensors = <&bandgap>; 7362306a36Sopenharmony_ci coefficients = <0 20000>; 7462306a36Sopenharmony_ci}; 7562306a36Sopenharmony_ci 7662306a36Sopenharmony_ci/include/ "omap443x-clocks.dtsi" 7762306a36Sopenharmony_ci 7862306a36Sopenharmony_ci/* 7962306a36Sopenharmony_ci * Use dpll_per for sgx at 307.2MHz like droid4 stock v3.0.8 Android kernel 8062306a36Sopenharmony_ci */ 8162306a36Sopenharmony_ci&sgx_module { 8262306a36Sopenharmony_ci assigned-clocks = <&l3_gfx_clkctrl OMAP4_GPU_CLKCTRL 24>, 8362306a36Sopenharmony_ci <&dpll_per_m7x2_ck>; 8462306a36Sopenharmony_ci assigned-clock-rates = <0>, <307200000>; 8562306a36Sopenharmony_ci assigned-clock-parents = <&dpll_per_m7x2_ck>; 8662306a36Sopenharmony_ci}; 87