162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Device Tree Source for am3517 SoC
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
662306a36Sopenharmony_ci */
762306a36Sopenharmony_ci
862306a36Sopenharmony_ci#include "omap3.dtsi"
962306a36Sopenharmony_ci
1062306a36Sopenharmony_ci/* AM3517 doesn't appear to have the crypto engines defined in omap3.dtsi */
1162306a36Sopenharmony_ci/delete-node/ &aes1_target;
1262306a36Sopenharmony_ci/delete-node/ &aes2_target;
1362306a36Sopenharmony_ci
1462306a36Sopenharmony_ci/ {
1562306a36Sopenharmony_ci	aliases {
1662306a36Sopenharmony_ci		serial3 = &uart4;
1762306a36Sopenharmony_ci		can = &hecc;
1862306a36Sopenharmony_ci	};
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ci	cpus {
2162306a36Sopenharmony_ci		cpu: cpu@0 {
2262306a36Sopenharmony_ci			/* Based on OMAP3630 variants OPP50 and OPP100 */
2362306a36Sopenharmony_ci			operating-points-v2 = <&cpu0_opp_table>;
2462306a36Sopenharmony_ci
2562306a36Sopenharmony_ci			clock-latency = <300000>; /* From legacy driver */
2662306a36Sopenharmony_ci		};
2762306a36Sopenharmony_ci	};
2862306a36Sopenharmony_ci
2962306a36Sopenharmony_ci	cpu0_opp_table: opp-table {
3062306a36Sopenharmony_ci		compatible = "operating-points-v2-ti-cpu";
3162306a36Sopenharmony_ci		syscon = <&scm_conf>;
3262306a36Sopenharmony_ci		/*
3362306a36Sopenharmony_ci		 * AM3517 TRM only lists 600MHz @ 1.2V, but omap36xx
3462306a36Sopenharmony_ci		 * appear to operate at 300MHz as well. Since AM3517 only
3562306a36Sopenharmony_ci		 * lists one operating voltage, it will remain fixed at 1.2V
3662306a36Sopenharmony_ci		 */
3762306a36Sopenharmony_ci		opp-50-300000000 {
3862306a36Sopenharmony_ci			/* OPP50 */
3962306a36Sopenharmony_ci			opp-hz = /bits/ 64 <300000000>;
4062306a36Sopenharmony_ci			opp-microvolt = <1200000>;
4162306a36Sopenharmony_ci			opp-supported-hw = <0xffffffff 0xffffffff>;
4262306a36Sopenharmony_ci			opp-suspend;
4362306a36Sopenharmony_ci		};
4462306a36Sopenharmony_ci
4562306a36Sopenharmony_ci		opp-100-600000000 {
4662306a36Sopenharmony_ci			/* OPP100 */
4762306a36Sopenharmony_ci			opp-hz = /bits/ 64 <600000000>;
4862306a36Sopenharmony_ci			opp-microvolt = <1200000>;
4962306a36Sopenharmony_ci			opp-supported-hw = <0xffffffff 0xffffffff>;
5062306a36Sopenharmony_ci		};
5162306a36Sopenharmony_ci	};
5262306a36Sopenharmony_ci
5362306a36Sopenharmony_ci	ocp@68000000 {
5462306a36Sopenharmony_ci		target-module@5c040000 {
5562306a36Sopenharmony_ci			compatible = "ti,sysc-omap2", "ti,sysc";
5662306a36Sopenharmony_ci			reg = <0x5c040400 0x4>,
5762306a36Sopenharmony_ci			      <0x5c040404 0x4>,
5862306a36Sopenharmony_ci			      <0x5c040408 0x4>;
5962306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
6062306a36Sopenharmony_ci			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
6162306a36Sopenharmony_ci					 SYSC_OMAP2_SOFTRESET |
6262306a36Sopenharmony_ci					 SYSC_OMAP2_AUTOIDLE)>;
6362306a36Sopenharmony_ci			ti,sysc-midle = <SYSC_IDLE_FORCE>,
6462306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
6562306a36Sopenharmony_ci					<SYSC_IDLE_SMART>;
6662306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
6762306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
6862306a36Sopenharmony_ci					<SYSC_IDLE_SMART>;
6962306a36Sopenharmony_ci			ti,syss-mask = <1>;
7062306a36Sopenharmony_ci			clocks = <&hsotgusb_ick_am35xx>;
7162306a36Sopenharmony_ci			clock-names = "fck";
7262306a36Sopenharmony_ci			#address-cells = <1>;
7362306a36Sopenharmony_ci			#size-cells = <1>;
7462306a36Sopenharmony_ci			ranges = <0x0 0x5c040000 0x1000>;
7562306a36Sopenharmony_ci
7662306a36Sopenharmony_ci			am35x_otg_hs: am35x_otg_hs@0 {
7762306a36Sopenharmony_ci				compatible = "ti,omap3-musb";
7862306a36Sopenharmony_ci				status = "disabled";
7962306a36Sopenharmony_ci				reg = <0 0x1000>;
8062306a36Sopenharmony_ci				interrupts = <71>;
8162306a36Sopenharmony_ci				interrupt-names = "mc";
8262306a36Sopenharmony_ci			};
8362306a36Sopenharmony_ci		};
8462306a36Sopenharmony_ci
8562306a36Sopenharmony_ci		davinci_emac: ethernet@5c000000 {
8662306a36Sopenharmony_ci			compatible = "ti,am3517-emac";
8762306a36Sopenharmony_ci			ti,hwmods = "davinci_emac";
8862306a36Sopenharmony_ci			status = "disabled";
8962306a36Sopenharmony_ci			reg = <0x5c000000 0x30000>;
9062306a36Sopenharmony_ci			interrupts = <67 68 69 70>;
9162306a36Sopenharmony_ci			syscon = <&scm_conf>;
9262306a36Sopenharmony_ci			ti,davinci-ctrl-reg-offset = <0x10000>;
9362306a36Sopenharmony_ci			ti,davinci-ctrl-mod-reg-offset = <0>;
9462306a36Sopenharmony_ci			ti,davinci-ctrl-ram-offset = <0x20000>;
9562306a36Sopenharmony_ci			ti,davinci-ctrl-ram-size = <0x2000>;
9662306a36Sopenharmony_ci			ti,davinci-rmii-en = /bits/ 8 <1>;
9762306a36Sopenharmony_ci			local-mac-address = [ 00 00 00 00 00 00 ];
9862306a36Sopenharmony_ci			clocks = <&emac_ick>;
9962306a36Sopenharmony_ci			clock-names = "ick";
10062306a36Sopenharmony_ci		};
10162306a36Sopenharmony_ci
10262306a36Sopenharmony_ci		davinci_mdio: mdio@5c030000 {
10362306a36Sopenharmony_ci			compatible = "ti,davinci_mdio";
10462306a36Sopenharmony_ci			ti,hwmods = "davinci_mdio";
10562306a36Sopenharmony_ci			status = "disabled";
10662306a36Sopenharmony_ci			reg = <0x5c030000 0x1000>;
10762306a36Sopenharmony_ci			bus_freq = <1000000>;
10862306a36Sopenharmony_ci			#address-cells = <1>;
10962306a36Sopenharmony_ci			#size-cells = <0>;
11062306a36Sopenharmony_ci			clocks = <&emac_fck>;
11162306a36Sopenharmony_ci			clock-names = "fck";
11262306a36Sopenharmony_ci		};
11362306a36Sopenharmony_ci
11462306a36Sopenharmony_ci		uart4: serial@4809e000 {
11562306a36Sopenharmony_ci			compatible = "ti,omap3-uart";
11662306a36Sopenharmony_ci			ti,hwmods = "uart4";
11762306a36Sopenharmony_ci			status = "disabled";
11862306a36Sopenharmony_ci			reg = <0x4809e000 0x400>;
11962306a36Sopenharmony_ci			interrupts = <84>;
12062306a36Sopenharmony_ci			dmas = <&sdma 55 &sdma 54>;
12162306a36Sopenharmony_ci			dma-names = "tx", "rx";
12262306a36Sopenharmony_ci			clock-frequency = <48000000>;
12362306a36Sopenharmony_ci		};
12462306a36Sopenharmony_ci
12562306a36Sopenharmony_ci		omap3_pmx_core2: pinmux@480025d8 {
12662306a36Sopenharmony_ci			compatible = "ti,omap3-padconf", "pinctrl-single";
12762306a36Sopenharmony_ci			reg = <0x480025d8 0x24>;
12862306a36Sopenharmony_ci			#address-cells = <1>;
12962306a36Sopenharmony_ci			#size-cells = <0>;
13062306a36Sopenharmony_ci			#pinctrl-cells = <1>;
13162306a36Sopenharmony_ci			#interrupt-cells = <1>;
13262306a36Sopenharmony_ci			interrupt-controller;
13362306a36Sopenharmony_ci			pinctrl-single,register-width = <16>;
13462306a36Sopenharmony_ci			pinctrl-single,function-mask = <0xff1f>;
13562306a36Sopenharmony_ci		};
13662306a36Sopenharmony_ci
13762306a36Sopenharmony_ci		hecc: can@5c050000 {
13862306a36Sopenharmony_ci			compatible = "ti,am3517-hecc";
13962306a36Sopenharmony_ci			status = "disabled";
14062306a36Sopenharmony_ci			reg = <0x5c050000 0x80>,
14162306a36Sopenharmony_ci			      <0x5c053000 0x180>,
14262306a36Sopenharmony_ci			      <0x5c052000 0x200>;
14362306a36Sopenharmony_ci			reg-names = "hecc", "hecc-ram", "mbx";
14462306a36Sopenharmony_ci			interrupts = <24>;
14562306a36Sopenharmony_ci			clocks = <&hecc_ck>;
14662306a36Sopenharmony_ci		};
14762306a36Sopenharmony_ci
14862306a36Sopenharmony_ci		/*
14962306a36Sopenharmony_ci		 * On am3517 the OCP registers do not seem to be accessible
15062306a36Sopenharmony_ci		 * similar to the omap34xx. Maybe SGX is permanently set to
15162306a36Sopenharmony_ci		 * "OCP bypass mode", or maybe there is OCP_SYSCONFIG that is
15262306a36Sopenharmony_ci		 * write-only at 0x50000e10. We detect SGX based on the SGX
15362306a36Sopenharmony_ci		 * revision register instead of the unreadable OCP revision
15462306a36Sopenharmony_ci		 * register.
15562306a36Sopenharmony_ci		 */
15662306a36Sopenharmony_ci		sgx_module: target-module@50000000 {
15762306a36Sopenharmony_ci			compatible = "ti,sysc-omap2", "ti,sysc";
15862306a36Sopenharmony_ci			reg = <0x50000014 0x4>;
15962306a36Sopenharmony_ci			reg-names = "rev";
16062306a36Sopenharmony_ci			clocks = <&sgx_fck>, <&sgx_ick>;
16162306a36Sopenharmony_ci			clock-names = "fck", "ick";
16262306a36Sopenharmony_ci			#address-cells = <1>;
16362306a36Sopenharmony_ci			#size-cells = <1>;
16462306a36Sopenharmony_ci			ranges = <0 0x50000000 0x4000>;
16562306a36Sopenharmony_ci
16662306a36Sopenharmony_ci			/*
16762306a36Sopenharmony_ci			 * Closed source PowerVR driver, no child device
16862306a36Sopenharmony_ci			 * binding or driver in mainline
16962306a36Sopenharmony_ci			 */
17062306a36Sopenharmony_ci		};
17162306a36Sopenharmony_ci	};
17262306a36Sopenharmony_ci};
17362306a36Sopenharmony_ci
17462306a36Sopenharmony_ci/* Not currently working, probably needs at least different clocks */
17562306a36Sopenharmony_ci&rng_target {
17662306a36Sopenharmony_ci	status = "disabled";
17762306a36Sopenharmony_ci	/delete-property/ clocks;
17862306a36Sopenharmony_ci};
17962306a36Sopenharmony_ci
18062306a36Sopenharmony_ci/* Table Table 5-79 of the TRM shows 480ab000 is reserved */
18162306a36Sopenharmony_ci&usb_otg_target {
18262306a36Sopenharmony_ci	status = "disabled";
18362306a36Sopenharmony_ci};
18462306a36Sopenharmony_ci
18562306a36Sopenharmony_ci&iva {
18662306a36Sopenharmony_ci	status = "disabled";
18762306a36Sopenharmony_ci};
18862306a36Sopenharmony_ci
18962306a36Sopenharmony_ci&mailbox {
19062306a36Sopenharmony_ci	status = "disabled";
19162306a36Sopenharmony_ci};
19262306a36Sopenharmony_ci
19362306a36Sopenharmony_ci&mmu_isp {
19462306a36Sopenharmony_ci	status = "disabled";
19562306a36Sopenharmony_ci};
19662306a36Sopenharmony_ci
19762306a36Sopenharmony_ci#include "am35xx-clocks.dtsi"
19862306a36Sopenharmony_ci#include "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
19962306a36Sopenharmony_ci
20062306a36Sopenharmony_ci/* Preferred always-on timer for clocksource */
20162306a36Sopenharmony_ci&timer1_target {
20262306a36Sopenharmony_ci	ti,no-reset-on-init;
20362306a36Sopenharmony_ci	ti,no-idle;
20462306a36Sopenharmony_ci	timer@0 {
20562306a36Sopenharmony_ci		assigned-clocks = <&gpt1_fck>;
20662306a36Sopenharmony_ci		assigned-clock-parents = <&sys_ck>;
20762306a36Sopenharmony_ci	};
20862306a36Sopenharmony_ci};
20962306a36Sopenharmony_ci
21062306a36Sopenharmony_ci/* Preferred timer for clockevent */
21162306a36Sopenharmony_ci&timer2_target {
21262306a36Sopenharmony_ci	ti,no-reset-on-init;
21362306a36Sopenharmony_ci	ti,no-idle;
21462306a36Sopenharmony_ci	timer@0 {
21562306a36Sopenharmony_ci		assigned-clocks = <&gpt2_fck>;
21662306a36Sopenharmony_ci		assigned-clock-parents = <&sys_ck>;
21762306a36Sopenharmony_ci	};
21862306a36Sopenharmony_ci};
219