162306a36Sopenharmony_ci&l4_wkup {						/* 0x44c00000 */
262306a36Sopenharmony_ci	compatible = "ti,am33xx-l4-wkup", "simple-pm-bus";
362306a36Sopenharmony_ci	power-domains = <&prm_wkup>;
462306a36Sopenharmony_ci	clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_L4_WKUP_CLKCTRL 0>;
562306a36Sopenharmony_ci	clock-names = "fck";
662306a36Sopenharmony_ci	reg = <0x44c00000 0x800>,
762306a36Sopenharmony_ci	      <0x44c00800 0x800>,
862306a36Sopenharmony_ci	      <0x44c01000 0x400>,
962306a36Sopenharmony_ci	      <0x44c01400 0x400>;
1062306a36Sopenharmony_ci	reg-names = "ap", "la", "ia0", "ia1";
1162306a36Sopenharmony_ci	#address-cells = <1>;
1262306a36Sopenharmony_ci	#size-cells = <1>;
1362306a36Sopenharmony_ci	ranges = <0x00000000 0x44c00000 0x100000>,	/* segment 0 */
1462306a36Sopenharmony_ci		 <0x00100000 0x44d00000 0x100000>,	/* segment 1 */
1562306a36Sopenharmony_ci		 <0x00200000 0x44e00000 0x100000>;	/* segment 2 */
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_ci	segment@0 {					/* 0x44c00000 */
1862306a36Sopenharmony_ci		compatible = "simple-pm-bus";
1962306a36Sopenharmony_ci		#address-cells = <1>;
2062306a36Sopenharmony_ci		#size-cells = <1>;
2162306a36Sopenharmony_ci		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
2262306a36Sopenharmony_ci			 <0x00000800 0x00000800 0x000800>,	/* ap 1 */
2362306a36Sopenharmony_ci			 <0x00001000 0x00001000 0x000400>,	/* ap 2 */
2462306a36Sopenharmony_ci			 <0x00001400 0x00001400 0x000400>;	/* ap 3 */
2562306a36Sopenharmony_ci	};
2662306a36Sopenharmony_ci
2762306a36Sopenharmony_ci	segment@100000 {					/* 0x44d00000 */
2862306a36Sopenharmony_ci		compatible = "simple-pm-bus";
2962306a36Sopenharmony_ci		#address-cells = <1>;
3062306a36Sopenharmony_ci		#size-cells = <1>;
3162306a36Sopenharmony_ci		ranges = <0x00000000 0x00100000 0x004000>,	/* ap 4 */
3262306a36Sopenharmony_ci			 <0x00004000 0x00104000 0x001000>,	/* ap 5 */
3362306a36Sopenharmony_ci			 <0x00080000 0x00180000 0x002000>,	/* ap 6 */
3462306a36Sopenharmony_ci			 <0x00082000 0x00182000 0x001000>;	/* ap 7 */
3562306a36Sopenharmony_ci
3662306a36Sopenharmony_ci		target-module@0 {			/* 0x44d00000, ap 4 28.0 */
3762306a36Sopenharmony_ci			compatible = "ti,sysc-omap4", "ti,sysc";
3862306a36Sopenharmony_ci			reg = <0x0 0x4>;
3962306a36Sopenharmony_ci			reg-names = "rev";
4062306a36Sopenharmony_ci			clocks = <&l4_wkup_aon_clkctrl AM3_L4_WKUP_AON_WKUP_M3_CLKCTRL 0>;
4162306a36Sopenharmony_ci			clock-names = "fck";
4262306a36Sopenharmony_ci			#address-cells = <1>;
4362306a36Sopenharmony_ci			#size-cells = <1>;
4462306a36Sopenharmony_ci			ranges = <0x00000000 0x00000000 0x4000>,
4562306a36Sopenharmony_ci				 <0x00080000 0x00080000 0x2000>;
4662306a36Sopenharmony_ci
4762306a36Sopenharmony_ci			wkup_m3: cpu@0 {
4862306a36Sopenharmony_ci				compatible = "ti,am3352-wkup-m3";
4962306a36Sopenharmony_ci				reg = <0x00000000 0x4000>,
5062306a36Sopenharmony_ci				      <0x00080000 0x2000>;
5162306a36Sopenharmony_ci				reg-names = "umem", "dmem";
5262306a36Sopenharmony_ci				resets = <&prm_wkup 3>;
5362306a36Sopenharmony_ci				reset-names = "rstctrl";
5462306a36Sopenharmony_ci				ti,pm-firmware = "am335x-pm-firmware.elf";
5562306a36Sopenharmony_ci			};
5662306a36Sopenharmony_ci		};
5762306a36Sopenharmony_ci	};
5862306a36Sopenharmony_ci
5962306a36Sopenharmony_ci	segment@200000 {					/* 0x44e00000 */
6062306a36Sopenharmony_ci		compatible = "simple-pm-bus";
6162306a36Sopenharmony_ci		#address-cells = <1>;
6262306a36Sopenharmony_ci		#size-cells = <1>;
6362306a36Sopenharmony_ci		ranges = <0x00000000 0x00200000 0x002000>,	/* ap 8 */
6462306a36Sopenharmony_ci			 <0x00002000 0x00202000 0x001000>,	/* ap 9 */
6562306a36Sopenharmony_ci			 <0x00003000 0x00203000 0x001000>,	/* ap 10 */
6662306a36Sopenharmony_ci			 <0x00004000 0x00204000 0x001000>,	/* ap 11 */
6762306a36Sopenharmony_ci			 <0x00005000 0x00205000 0x001000>,	/* ap 12 */
6862306a36Sopenharmony_ci			 <0x00006000 0x00206000 0x001000>,	/* ap 13 */
6962306a36Sopenharmony_ci			 <0x00007000 0x00207000 0x001000>,	/* ap 14 */
7062306a36Sopenharmony_ci			 <0x00008000 0x00208000 0x001000>,	/* ap 15 */
7162306a36Sopenharmony_ci			 <0x00009000 0x00209000 0x001000>,	/* ap 16 */
7262306a36Sopenharmony_ci			 <0x0000a000 0x0020a000 0x001000>,	/* ap 17 */
7362306a36Sopenharmony_ci			 <0x0000b000 0x0020b000 0x001000>,	/* ap 18 */
7462306a36Sopenharmony_ci			 <0x0000c000 0x0020c000 0x001000>,	/* ap 19 */
7562306a36Sopenharmony_ci			 <0x0000d000 0x0020d000 0x001000>,	/* ap 20 */
7662306a36Sopenharmony_ci			 <0x0000f000 0x0020f000 0x001000>,	/* ap 21 */
7762306a36Sopenharmony_ci			 <0x00010000 0x00210000 0x010000>,	/* ap 22 */
7862306a36Sopenharmony_ci			 <0x00020000 0x00220000 0x010000>,	/* ap 23 */
7962306a36Sopenharmony_ci			 <0x00030000 0x00230000 0x001000>,	/* ap 24 */
8062306a36Sopenharmony_ci			 <0x00031000 0x00231000 0x001000>,	/* ap 25 */
8162306a36Sopenharmony_ci			 <0x00032000 0x00232000 0x001000>,	/* ap 26 */
8262306a36Sopenharmony_ci			 <0x00033000 0x00233000 0x001000>,	/* ap 27 */
8362306a36Sopenharmony_ci			 <0x00034000 0x00234000 0x001000>,	/* ap 28 */
8462306a36Sopenharmony_ci			 <0x00035000 0x00235000 0x001000>,	/* ap 29 */
8562306a36Sopenharmony_ci			 <0x00036000 0x00236000 0x001000>,	/* ap 30 */
8662306a36Sopenharmony_ci			 <0x00037000 0x00237000 0x001000>,	/* ap 31 */
8762306a36Sopenharmony_ci			 <0x00038000 0x00238000 0x001000>,	/* ap 32 */
8862306a36Sopenharmony_ci			 <0x00039000 0x00239000 0x001000>,	/* ap 33 */
8962306a36Sopenharmony_ci			 <0x0003a000 0x0023a000 0x001000>,	/* ap 34 */
9062306a36Sopenharmony_ci			 <0x0003e000 0x0023e000 0x001000>,	/* ap 35 */
9162306a36Sopenharmony_ci			 <0x0003f000 0x0023f000 0x001000>,	/* ap 36 */
9262306a36Sopenharmony_ci			 <0x0000e000 0x0020e000 0x001000>,	/* ap 37 */
9362306a36Sopenharmony_ci			 <0x00040000 0x00240000 0x040000>,	/* ap 38 */
9462306a36Sopenharmony_ci			 <0x00080000 0x00280000 0x001000>;	/* ap 39 */
9562306a36Sopenharmony_ci
9662306a36Sopenharmony_ci		target-module@0 {			/* 0x44e00000, ap 8 58.0 */
9762306a36Sopenharmony_ci			compatible = "ti,sysc-omap4", "ti,sysc";
9862306a36Sopenharmony_ci			reg = <0 0x4>;
9962306a36Sopenharmony_ci			reg-names = "rev";
10062306a36Sopenharmony_ci			#address-cells = <1>;
10162306a36Sopenharmony_ci			#size-cells = <1>;
10262306a36Sopenharmony_ci			ranges = <0x0 0x0 0x2000>;
10362306a36Sopenharmony_ci
10462306a36Sopenharmony_ci			prcm: prcm@0 {
10562306a36Sopenharmony_ci				compatible = "ti,am3-prcm", "simple-bus";
10662306a36Sopenharmony_ci				reg = <0 0x2000>;
10762306a36Sopenharmony_ci				#address-cells = <1>;
10862306a36Sopenharmony_ci				#size-cells = <1>;
10962306a36Sopenharmony_ci				ranges = <0 0 0x2000>;
11062306a36Sopenharmony_ci
11162306a36Sopenharmony_ci				prcm_clocks: clocks {
11262306a36Sopenharmony_ci					#address-cells = <1>;
11362306a36Sopenharmony_ci					#size-cells = <0>;
11462306a36Sopenharmony_ci				};
11562306a36Sopenharmony_ci
11662306a36Sopenharmony_ci				prcm_clockdomains: clockdomains {
11762306a36Sopenharmony_ci				};
11862306a36Sopenharmony_ci			};
11962306a36Sopenharmony_ci		};
12062306a36Sopenharmony_ci
12162306a36Sopenharmony_ci		target-module@3000 {			/* 0x44e03000, ap 10 0a.0 */
12262306a36Sopenharmony_ci			compatible = "ti,sysc";
12362306a36Sopenharmony_ci			status = "disabled";
12462306a36Sopenharmony_ci			#address-cells = <1>;
12562306a36Sopenharmony_ci			#size-cells = <1>;
12662306a36Sopenharmony_ci			ranges = <0x0 0x3000 0x1000>;
12762306a36Sopenharmony_ci		};
12862306a36Sopenharmony_ci
12962306a36Sopenharmony_ci		target-module@5000 {			/* 0x44e05000, ap 12 30.0 */
13062306a36Sopenharmony_ci			compatible = "ti,sysc";
13162306a36Sopenharmony_ci			status = "disabled";
13262306a36Sopenharmony_ci			#address-cells = <1>;
13362306a36Sopenharmony_ci			#size-cells = <1>;
13462306a36Sopenharmony_ci			ranges = <0x0 0x5000 0x1000>;
13562306a36Sopenharmony_ci		};
13662306a36Sopenharmony_ci
13762306a36Sopenharmony_ci		gpio0_target: target-module@7000 {	/* 0x44e07000, ap 14 20.0 */
13862306a36Sopenharmony_ci			compatible = "ti,sysc-omap2", "ti,sysc";
13962306a36Sopenharmony_ci			reg = <0x7000 0x4>,
14062306a36Sopenharmony_ci			      <0x7010 0x4>,
14162306a36Sopenharmony_ci			      <0x7114 0x4>;
14262306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
14362306a36Sopenharmony_ci			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
14462306a36Sopenharmony_ci					 SYSC_OMAP2_SOFTRESET |
14562306a36Sopenharmony_ci					 SYSC_OMAP2_AUTOIDLE)>;
14662306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
14762306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
14862306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
14962306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
15062306a36Sopenharmony_ci			ti,syss-mask = <1>;
15162306a36Sopenharmony_ci			/* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
15262306a36Sopenharmony_ci			clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_GPIO1_CLKCTRL 0>,
15362306a36Sopenharmony_ci				 <&l4_wkup_clkctrl AM3_L4_WKUP_GPIO1_CLKCTRL 18>;
15462306a36Sopenharmony_ci			clock-names = "fck", "dbclk";
15562306a36Sopenharmony_ci			#address-cells = <1>;
15662306a36Sopenharmony_ci			#size-cells = <1>;
15762306a36Sopenharmony_ci			ranges = <0x0 0x7000 0x1000>;
15862306a36Sopenharmony_ci
15962306a36Sopenharmony_ci			gpio0: gpio@0 {
16062306a36Sopenharmony_ci				compatible = "ti,omap4-gpio";
16162306a36Sopenharmony_ci				gpio-ranges =	<&am33xx_pinmux  0  82 8>,
16262306a36Sopenharmony_ci						<&am33xx_pinmux  8  52 4>,
16362306a36Sopenharmony_ci						<&am33xx_pinmux 12  94 4>,
16462306a36Sopenharmony_ci						<&am33xx_pinmux 16  71 2>,
16562306a36Sopenharmony_ci						<&am33xx_pinmux 18 135 1>,
16662306a36Sopenharmony_ci						<&am33xx_pinmux 19 108 2>,
16762306a36Sopenharmony_ci						<&am33xx_pinmux 21  73 1>,
16862306a36Sopenharmony_ci						<&am33xx_pinmux 22   8 2>,
16962306a36Sopenharmony_ci						<&am33xx_pinmux 26  10 2>,
17062306a36Sopenharmony_ci						<&am33xx_pinmux 28  74 1>,
17162306a36Sopenharmony_ci						<&am33xx_pinmux 29  81 1>,
17262306a36Sopenharmony_ci						<&am33xx_pinmux 30  28 2>;
17362306a36Sopenharmony_ci				gpio-controller;
17462306a36Sopenharmony_ci				#gpio-cells = <2>;
17562306a36Sopenharmony_ci				interrupt-controller;
17662306a36Sopenharmony_ci				#interrupt-cells = <2>;
17762306a36Sopenharmony_ci				reg = <0x0 0x1000>;
17862306a36Sopenharmony_ci				interrupts = <96>;
17962306a36Sopenharmony_ci			};
18062306a36Sopenharmony_ci		};
18162306a36Sopenharmony_ci
18262306a36Sopenharmony_ci		target-module@9000 {			/* 0x44e09000, ap 16 04.0 */
18362306a36Sopenharmony_ci			compatible = "ti,sysc-omap2", "ti,sysc";
18462306a36Sopenharmony_ci			reg = <0x9050 0x4>,
18562306a36Sopenharmony_ci			      <0x9054 0x4>,
18662306a36Sopenharmony_ci			      <0x9058 0x4>;
18762306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
18862306a36Sopenharmony_ci			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
18962306a36Sopenharmony_ci					 SYSC_OMAP2_SOFTRESET |
19062306a36Sopenharmony_ci					 SYSC_OMAP2_AUTOIDLE)>;
19162306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
19262306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
19362306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
19462306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
19562306a36Sopenharmony_ci			/* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
19662306a36Sopenharmony_ci			clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_UART1_CLKCTRL 0>;
19762306a36Sopenharmony_ci			clock-names = "fck";
19862306a36Sopenharmony_ci			#address-cells = <1>;
19962306a36Sopenharmony_ci			#size-cells = <1>;
20062306a36Sopenharmony_ci			ranges = <0x0 0x9000 0x1000>;
20162306a36Sopenharmony_ci
20262306a36Sopenharmony_ci			uart0: serial@0 {
20362306a36Sopenharmony_ci				compatible = "ti,am3352-uart", "ti,omap3-uart";
20462306a36Sopenharmony_ci				clock-frequency = <48000000>;
20562306a36Sopenharmony_ci				reg = <0x0 0x1000>;
20662306a36Sopenharmony_ci				interrupts = <72>;
20762306a36Sopenharmony_ci				status = "disabled";
20862306a36Sopenharmony_ci				dmas = <&edma 26 0>, <&edma 27 0>;
20962306a36Sopenharmony_ci				dma-names = "tx", "rx";
21062306a36Sopenharmony_ci			};
21162306a36Sopenharmony_ci		};
21262306a36Sopenharmony_ci
21362306a36Sopenharmony_ci		target-module@b000 {			/* 0x44e0b000, ap 18 48.0 */
21462306a36Sopenharmony_ci			compatible = "ti,sysc-omap2", "ti,sysc";
21562306a36Sopenharmony_ci			reg = <0xb000 0x8>,
21662306a36Sopenharmony_ci			      <0xb010 0x8>,
21762306a36Sopenharmony_ci			      <0xb090 0x8>;
21862306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
21962306a36Sopenharmony_ci			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
22062306a36Sopenharmony_ci					 SYSC_OMAP2_ENAWAKEUP |
22162306a36Sopenharmony_ci					 SYSC_OMAP2_SOFTRESET |
22262306a36Sopenharmony_ci					 SYSC_OMAP2_AUTOIDLE)>;
22362306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
22462306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
22562306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
22662306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
22762306a36Sopenharmony_ci			ti,syss-mask = <1>;
22862306a36Sopenharmony_ci			/* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
22962306a36Sopenharmony_ci			clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_I2C1_CLKCTRL 0>;
23062306a36Sopenharmony_ci			clock-names = "fck";
23162306a36Sopenharmony_ci			#address-cells = <1>;
23262306a36Sopenharmony_ci			#size-cells = <1>;
23362306a36Sopenharmony_ci			ranges = <0x0 0xb000 0x1000>;
23462306a36Sopenharmony_ci
23562306a36Sopenharmony_ci			i2c0: i2c@0 {
23662306a36Sopenharmony_ci				compatible = "ti,omap4-i2c";
23762306a36Sopenharmony_ci				#address-cells = <1>;
23862306a36Sopenharmony_ci				#size-cells = <0>;
23962306a36Sopenharmony_ci				reg = <0x0 0x1000>;
24062306a36Sopenharmony_ci				interrupts = <70>;
24162306a36Sopenharmony_ci				status = "disabled";
24262306a36Sopenharmony_ci			};
24362306a36Sopenharmony_ci		};
24462306a36Sopenharmony_ci
24562306a36Sopenharmony_ci		target-module@d000 {			/* 0x44e0d000, ap 20 38.0 */
24662306a36Sopenharmony_ci			compatible = "ti,sysc-omap4", "ti,sysc";
24762306a36Sopenharmony_ci			reg = <0xd000 0x4>,
24862306a36Sopenharmony_ci			      <0xd010 0x4>;
24962306a36Sopenharmony_ci			reg-names = "rev", "sysc";
25062306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
25162306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
25262306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
25362306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
25462306a36Sopenharmony_ci			/* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
25562306a36Sopenharmony_ci			clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_ADC_TSC_CLKCTRL 0>;
25662306a36Sopenharmony_ci			clock-names = "fck";
25762306a36Sopenharmony_ci			#address-cells = <1>;
25862306a36Sopenharmony_ci			#size-cells = <1>;
25962306a36Sopenharmony_ci			ranges = <0x00000000 0x0000d000 0x00001000>,
26062306a36Sopenharmony_ci				 <0x00001000 0x0000e000 0x00001000>;
26162306a36Sopenharmony_ci
26262306a36Sopenharmony_ci			tscadc: tscadc@0 {
26362306a36Sopenharmony_ci				compatible = "ti,am3359-tscadc";
26462306a36Sopenharmony_ci				reg = <0x0 0x1000>;
26562306a36Sopenharmony_ci				interrupts = <16>;
26662306a36Sopenharmony_ci				clocks = <&adc_tsc_fck>;
26762306a36Sopenharmony_ci				clock-names = "fck";
26862306a36Sopenharmony_ci				status = "disabled";
26962306a36Sopenharmony_ci				dmas = <&edma 53 0>, <&edma 57 0>;
27062306a36Sopenharmony_ci				dma-names = "fifo0", "fifo1";
27162306a36Sopenharmony_ci
27262306a36Sopenharmony_ci				tsc {
27362306a36Sopenharmony_ci					compatible = "ti,am3359-tsc";
27462306a36Sopenharmony_ci				};
27562306a36Sopenharmony_ci				am335x_adc: adc {
27662306a36Sopenharmony_ci					#io-channel-cells = <1>;
27762306a36Sopenharmony_ci					compatible = "ti,am3359-adc";
27862306a36Sopenharmony_ci				};
27962306a36Sopenharmony_ci			};
28062306a36Sopenharmony_ci		};
28162306a36Sopenharmony_ci
28262306a36Sopenharmony_ci		target-module@10000 {			/* 0x44e10000, ap 22 0c.0 */
28362306a36Sopenharmony_ci			compatible = "ti,sysc-omap4", "ti,sysc";
28462306a36Sopenharmony_ci			reg = <0x10000 0x4>;
28562306a36Sopenharmony_ci			reg-names = "rev";
28662306a36Sopenharmony_ci			clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_CONTROL_CLKCTRL 0>;
28762306a36Sopenharmony_ci			clock-names = "fck";
28862306a36Sopenharmony_ci			ti,no-idle;
28962306a36Sopenharmony_ci			#address-cells = <1>;
29062306a36Sopenharmony_ci			#size-cells = <1>;
29162306a36Sopenharmony_ci			ranges = <0x00000000 0x00010000 0x00010000>,
29262306a36Sopenharmony_ci				 <0x00010000 0x00020000 0x00010000>;
29362306a36Sopenharmony_ci
29462306a36Sopenharmony_ci			scm: scm@0 {
29562306a36Sopenharmony_ci				compatible = "ti,am3-scm", "simple-bus";
29662306a36Sopenharmony_ci				reg = <0x0 0x2000>;
29762306a36Sopenharmony_ci				#address-cells = <1>;
29862306a36Sopenharmony_ci				#size-cells = <1>;
29962306a36Sopenharmony_ci				#pinctrl-cells = <1>;
30062306a36Sopenharmony_ci				ranges = <0 0 0x2000>;
30162306a36Sopenharmony_ci
30262306a36Sopenharmony_ci				am33xx_pinmux: pinmux@800 {
30362306a36Sopenharmony_ci					compatible = "pinctrl-single";
30462306a36Sopenharmony_ci					reg = <0x800 0x238>;
30562306a36Sopenharmony_ci					#pinctrl-cells = <2>;
30662306a36Sopenharmony_ci					pinctrl-single,register-width = <32>;
30762306a36Sopenharmony_ci					pinctrl-single,function-mask = <0x7f>;
30862306a36Sopenharmony_ci				};
30962306a36Sopenharmony_ci
31062306a36Sopenharmony_ci				scm_conf: scm_conf@0 {
31162306a36Sopenharmony_ci					compatible = "syscon", "simple-bus";
31262306a36Sopenharmony_ci					reg = <0x0 0x800>;
31362306a36Sopenharmony_ci					#address-cells = <1>;
31462306a36Sopenharmony_ci					#size-cells = <1>;
31562306a36Sopenharmony_ci					ranges = <0 0 0x800>;
31662306a36Sopenharmony_ci
31762306a36Sopenharmony_ci					phy_gmii_sel: phy-gmii-sel {
31862306a36Sopenharmony_ci						compatible = "ti,am3352-phy-gmii-sel";
31962306a36Sopenharmony_ci						reg = <0x650 0x4>;
32062306a36Sopenharmony_ci						#phy-cells = <2>;
32162306a36Sopenharmony_ci					};
32262306a36Sopenharmony_ci
32362306a36Sopenharmony_ci					scm_clocks: clocks {
32462306a36Sopenharmony_ci						#address-cells = <1>;
32562306a36Sopenharmony_ci						#size-cells = <0>;
32662306a36Sopenharmony_ci					};
32762306a36Sopenharmony_ci				};
32862306a36Sopenharmony_ci
32962306a36Sopenharmony_ci				usb_ctrl_mod: control@620 {
33062306a36Sopenharmony_ci					compatible = "ti,am335x-usb-ctrl-module";
33162306a36Sopenharmony_ci					reg = <0x620 0x10>,
33262306a36Sopenharmony_ci					      <0x648 0x4>;
33362306a36Sopenharmony_ci					reg-names = "phy_ctrl", "wakeup";
33462306a36Sopenharmony_ci				};
33562306a36Sopenharmony_ci
33662306a36Sopenharmony_ci				wkup_m3_ipc: wkup_m3_ipc@1324 {
33762306a36Sopenharmony_ci					compatible = "ti,am3352-wkup-m3-ipc";
33862306a36Sopenharmony_ci					reg = <0x1324 0x24>;
33962306a36Sopenharmony_ci					interrupts = <78>;
34062306a36Sopenharmony_ci					ti,rproc = <&wkup_m3>;
34162306a36Sopenharmony_ci					mboxes = <&mailbox &mbox_wkupm3>;
34262306a36Sopenharmony_ci				};
34362306a36Sopenharmony_ci
34462306a36Sopenharmony_ci				edma_xbar: dma-router@f90 {
34562306a36Sopenharmony_ci					compatible = "ti,am335x-edma-crossbar";
34662306a36Sopenharmony_ci					reg = <0xf90 0x40>;
34762306a36Sopenharmony_ci					#dma-cells = <3>;
34862306a36Sopenharmony_ci					dma-requests = <32>;
34962306a36Sopenharmony_ci					dma-masters = <&edma>;
35062306a36Sopenharmony_ci				};
35162306a36Sopenharmony_ci
35262306a36Sopenharmony_ci				scm_clockdomains: clockdomains {
35362306a36Sopenharmony_ci				};
35462306a36Sopenharmony_ci			};
35562306a36Sopenharmony_ci		};
35662306a36Sopenharmony_ci
35762306a36Sopenharmony_ci		timer1_target: target-module@31000 {	/* 0x44e31000, ap 25 40.0 */
35862306a36Sopenharmony_ci			compatible = "ti,sysc-omap2-timer", "ti,sysc";
35962306a36Sopenharmony_ci			reg = <0x31000 0x4>,
36062306a36Sopenharmony_ci			      <0x31010 0x4>,
36162306a36Sopenharmony_ci			      <0x31014 0x4>;
36262306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
36362306a36Sopenharmony_ci			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
36462306a36Sopenharmony_ci					 SYSC_OMAP2_SOFTRESET |
36562306a36Sopenharmony_ci					 SYSC_OMAP2_AUTOIDLE)>;
36662306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
36762306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
36862306a36Sopenharmony_ci					<SYSC_IDLE_SMART>;
36962306a36Sopenharmony_ci			ti,syss-mask = <1>;
37062306a36Sopenharmony_ci			/* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
37162306a36Sopenharmony_ci			clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_TIMER1_CLKCTRL 0>;
37262306a36Sopenharmony_ci			clock-names = "fck";
37362306a36Sopenharmony_ci			#address-cells = <1>;
37462306a36Sopenharmony_ci			#size-cells = <1>;
37562306a36Sopenharmony_ci			ranges = <0x0 0x31000 0x1000>;
37662306a36Sopenharmony_ci
37762306a36Sopenharmony_ci			timer1: timer@0 {
37862306a36Sopenharmony_ci				compatible = "ti,am335x-timer-1ms";
37962306a36Sopenharmony_ci				reg = <0x0 0x400>;
38062306a36Sopenharmony_ci				interrupts = <67>;
38162306a36Sopenharmony_ci				ti,timer-alwon;
38262306a36Sopenharmony_ci				clocks = <&timer1_fck>;
38362306a36Sopenharmony_ci				clock-names = "fck";
38462306a36Sopenharmony_ci			};
38562306a36Sopenharmony_ci		};
38662306a36Sopenharmony_ci
38762306a36Sopenharmony_ci		target-module@33000 {			/* 0x44e33000, ap 27 18.0 */
38862306a36Sopenharmony_ci			compatible = "ti,sysc";
38962306a36Sopenharmony_ci			status = "disabled";
39062306a36Sopenharmony_ci			#address-cells = <1>;
39162306a36Sopenharmony_ci			#size-cells = <1>;
39262306a36Sopenharmony_ci			ranges = <0x0 0x33000 0x1000>;
39362306a36Sopenharmony_ci		};
39462306a36Sopenharmony_ci
39562306a36Sopenharmony_ci		target-module@35000 {			/* 0x44e35000, ap 29 50.0 */
39662306a36Sopenharmony_ci			compatible = "ti,sysc-omap2", "ti,sysc";
39762306a36Sopenharmony_ci			reg = <0x35000 0x4>,
39862306a36Sopenharmony_ci			      <0x35010 0x4>,
39962306a36Sopenharmony_ci			      <0x35014 0x4>;
40062306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
40162306a36Sopenharmony_ci			ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
40262306a36Sopenharmony_ci					 SYSC_OMAP2_SOFTRESET)>;
40362306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
40462306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
40562306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
40662306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
40762306a36Sopenharmony_ci			ti,syss-mask = <1>;
40862306a36Sopenharmony_ci			/* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
40962306a36Sopenharmony_ci			clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_WD_TIMER2_CLKCTRL 0>;
41062306a36Sopenharmony_ci			clock-names = "fck";
41162306a36Sopenharmony_ci			#address-cells = <1>;
41262306a36Sopenharmony_ci			#size-cells = <1>;
41362306a36Sopenharmony_ci			ranges = <0x0 0x35000 0x1000>;
41462306a36Sopenharmony_ci
41562306a36Sopenharmony_ci			wdt2: wdt@0 {
41662306a36Sopenharmony_ci				compatible = "ti,omap3-wdt";
41762306a36Sopenharmony_ci				reg = <0x0 0x1000>;
41862306a36Sopenharmony_ci				interrupts = <91>;
41962306a36Sopenharmony_ci			};
42062306a36Sopenharmony_ci		};
42162306a36Sopenharmony_ci
42262306a36Sopenharmony_ci		target-module@37000 {			/* 0x44e37000, ap 31 08.0 */
42362306a36Sopenharmony_ci			compatible = "ti,sysc";
42462306a36Sopenharmony_ci			status = "disabled";
42562306a36Sopenharmony_ci			#address-cells = <1>;
42662306a36Sopenharmony_ci			#size-cells = <1>;
42762306a36Sopenharmony_ci			ranges = <0x0 0x37000 0x1000>;
42862306a36Sopenharmony_ci		};
42962306a36Sopenharmony_ci
43062306a36Sopenharmony_ci		target-module@39000 {			/* 0x44e39000, ap 33 02.0 */
43162306a36Sopenharmony_ci			compatible = "ti,sysc";
43262306a36Sopenharmony_ci			status = "disabled";
43362306a36Sopenharmony_ci			#address-cells = <1>;
43462306a36Sopenharmony_ci			#size-cells = <1>;
43562306a36Sopenharmony_ci			ranges = <0x0 0x39000 0x1000>;
43662306a36Sopenharmony_ci		};
43762306a36Sopenharmony_ci
43862306a36Sopenharmony_ci		target-module@3e000 {			/* 0x44e3e000, ap 35 60.0 */
43962306a36Sopenharmony_ci			compatible = "ti,sysc-omap4-simple", "ti,sysc";
44062306a36Sopenharmony_ci			reg = <0x3e074 0x4>,
44162306a36Sopenharmony_ci			      <0x3e078 0x4>;
44262306a36Sopenharmony_ci			reg-names = "rev", "sysc";
44362306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
44462306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
44562306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
44662306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
44762306a36Sopenharmony_ci			/* Domains (P, C): rtc_pwrdm, l4_rtc_clkdm */
44862306a36Sopenharmony_ci			power-domains = <&prm_rtc>;
44962306a36Sopenharmony_ci			clocks = <&l4_rtc_clkctrl AM3_L4_RTC_RTC_CLKCTRL 0>;
45062306a36Sopenharmony_ci			clock-names = "fck";
45162306a36Sopenharmony_ci			#address-cells = <1>;
45262306a36Sopenharmony_ci			#size-cells = <1>;
45362306a36Sopenharmony_ci			ranges = <0x0 0x3e000 0x1000>;
45462306a36Sopenharmony_ci
45562306a36Sopenharmony_ci			rtc: rtc@0 {
45662306a36Sopenharmony_ci				compatible = "ti,am3352-rtc", "ti,da830-rtc";
45762306a36Sopenharmony_ci				reg = <0x0 0x1000>;
45862306a36Sopenharmony_ci				interrupts = <75>,
45962306a36Sopenharmony_ci					     <76>;
46062306a36Sopenharmony_ci			};
46162306a36Sopenharmony_ci		};
46262306a36Sopenharmony_ci
46362306a36Sopenharmony_ci		target-module@40000 {			/* 0x44e40000, ap 38 68.0 */
46462306a36Sopenharmony_ci			compatible = "ti,sysc";
46562306a36Sopenharmony_ci			status = "disabled";
46662306a36Sopenharmony_ci			#address-cells = <1>;
46762306a36Sopenharmony_ci			#size-cells = <1>;
46862306a36Sopenharmony_ci			ranges = <0x0 0x40000 0x40000>;
46962306a36Sopenharmony_ci		};
47062306a36Sopenharmony_ci	};
47162306a36Sopenharmony_ci};
47262306a36Sopenharmony_ci
47362306a36Sopenharmony_ci&l4_fw {						/* 0x47c00000 */
47462306a36Sopenharmony_ci	compatible = "ti,am33xx-l4-fw", "simple-bus";
47562306a36Sopenharmony_ci	reg = <0x47c00000 0x800>,
47662306a36Sopenharmony_ci	      <0x47c00800 0x800>,
47762306a36Sopenharmony_ci	      <0x47c01000 0x400>;
47862306a36Sopenharmony_ci	reg-names = "ap", "la", "ia0";
47962306a36Sopenharmony_ci	#address-cells = <1>;
48062306a36Sopenharmony_ci	#size-cells = <1>;
48162306a36Sopenharmony_ci	ranges = <0x00000000 0x47c00000 0x1000000>;	/* segment 0 */
48262306a36Sopenharmony_ci
48362306a36Sopenharmony_ci	segment@0 {					/* 0x47c00000 */
48462306a36Sopenharmony_ci		compatible = "simple-bus";
48562306a36Sopenharmony_ci		#address-cells = <1>;
48662306a36Sopenharmony_ci		#size-cells = <1>;
48762306a36Sopenharmony_ci		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
48862306a36Sopenharmony_ci			 <0x00000800 0x00000800 0x000800>,	/* ap 1 */
48962306a36Sopenharmony_ci			 <0x00001000 0x00001000 0x000400>,	/* ap 2 */
49062306a36Sopenharmony_ci			 <0x0000c000 0x0000c000 0x001000>,	/* ap 3 */
49162306a36Sopenharmony_ci			 <0x0000d000 0x0000d000 0x001000>,	/* ap 4 */
49262306a36Sopenharmony_ci			 <0x0000e000 0x0000e000 0x001000>,	/* ap 5 */
49362306a36Sopenharmony_ci			 <0x0000f000 0x0000f000 0x001000>,	/* ap 6 */
49462306a36Sopenharmony_ci			 <0x00010000 0x00010000 0x001000>,	/* ap 7 */
49562306a36Sopenharmony_ci			 <0x00011000 0x00011000 0x001000>,	/* ap 8 */
49662306a36Sopenharmony_ci			 <0x0001a000 0x0001a000 0x001000>,	/* ap 9 */
49762306a36Sopenharmony_ci			 <0x0001b000 0x0001b000 0x001000>,	/* ap 10 */
49862306a36Sopenharmony_ci			 <0x00024000 0x00024000 0x001000>,	/* ap 11 */
49962306a36Sopenharmony_ci			 <0x00025000 0x00025000 0x001000>,	/* ap 12 */
50062306a36Sopenharmony_ci			 <0x00026000 0x00026000 0x001000>,	/* ap 13 */
50162306a36Sopenharmony_ci			 <0x00027000 0x00027000 0x001000>,	/* ap 14 */
50262306a36Sopenharmony_ci			 <0x00030000 0x00030000 0x001000>,	/* ap 15 */
50362306a36Sopenharmony_ci			 <0x00031000 0x00031000 0x001000>,	/* ap 16 */
50462306a36Sopenharmony_ci			 <0x00038000 0x00038000 0x001000>,	/* ap 17 */
50562306a36Sopenharmony_ci			 <0x00039000 0x00039000 0x001000>,	/* ap 18 */
50662306a36Sopenharmony_ci			 <0x0003a000 0x0003a000 0x001000>,	/* ap 19 */
50762306a36Sopenharmony_ci			 <0x0003b000 0x0003b000 0x001000>,	/* ap 20 */
50862306a36Sopenharmony_ci			 <0x0003e000 0x0003e000 0x001000>,	/* ap 21 */
50962306a36Sopenharmony_ci			 <0x0003f000 0x0003f000 0x001000>,	/* ap 22 */
51062306a36Sopenharmony_ci			 <0x0003c000 0x0003c000 0x001000>,	/* ap 23 */
51162306a36Sopenharmony_ci			 <0x00040000 0x00040000 0x001000>,	/* ap 24 */
51262306a36Sopenharmony_ci			 <0x00046000 0x00046000 0x001000>,	/* ap 25 */
51362306a36Sopenharmony_ci			 <0x00047000 0x00047000 0x001000>,	/* ap 26 */
51462306a36Sopenharmony_ci			 <0x00044000 0x00044000 0x001000>,	/* ap 27 */
51562306a36Sopenharmony_ci			 <0x00045000 0x00045000 0x001000>,	/* ap 28 */
51662306a36Sopenharmony_ci			 <0x00028000 0x00028000 0x001000>,	/* ap 29 */
51762306a36Sopenharmony_ci			 <0x00029000 0x00029000 0x001000>,	/* ap 30 */
51862306a36Sopenharmony_ci			 <0x00032000 0x00032000 0x001000>,	/* ap 31 */
51962306a36Sopenharmony_ci			 <0x00033000 0x00033000 0x001000>,	/* ap 32 */
52062306a36Sopenharmony_ci			 <0x0003d000 0x0003d000 0x001000>,	/* ap 33 */
52162306a36Sopenharmony_ci			 <0x00041000 0x00041000 0x001000>,	/* ap 34 */
52262306a36Sopenharmony_ci			 <0x00042000 0x00042000 0x001000>,	/* ap 35 */
52362306a36Sopenharmony_ci			 <0x00043000 0x00043000 0x001000>,	/* ap 36 */
52462306a36Sopenharmony_ci			 <0x00014000 0x00014000 0x001000>,	/* ap 37 */
52562306a36Sopenharmony_ci			 <0x00015000 0x00015000 0x001000>;	/* ap 38 */
52662306a36Sopenharmony_ci
52762306a36Sopenharmony_ci		target-module@c000 {			/* 0x47c0c000, ap 3 04.0 */
52862306a36Sopenharmony_ci			compatible = "ti,sysc";
52962306a36Sopenharmony_ci			status = "disabled";
53062306a36Sopenharmony_ci			#address-cells = <1>;
53162306a36Sopenharmony_ci			#size-cells = <1>;
53262306a36Sopenharmony_ci			ranges = <0x0 0xc000 0x1000>;
53362306a36Sopenharmony_ci		};
53462306a36Sopenharmony_ci
53562306a36Sopenharmony_ci		target-module@e000 {			/* 0x47c0e000, ap 5 0c.0 */
53662306a36Sopenharmony_ci			compatible = "ti,sysc";
53762306a36Sopenharmony_ci			status = "disabled";
53862306a36Sopenharmony_ci			#address-cells = <1>;
53962306a36Sopenharmony_ci			#size-cells = <1>;
54062306a36Sopenharmony_ci			ranges = <0x0 0xe000 0x1000>;
54162306a36Sopenharmony_ci		};
54262306a36Sopenharmony_ci
54362306a36Sopenharmony_ci		target-module@10000 {			/* 0x47c10000, ap 7 20.0 */
54462306a36Sopenharmony_ci			compatible = "ti,sysc";
54562306a36Sopenharmony_ci			status = "disabled";
54662306a36Sopenharmony_ci			#address-cells = <1>;
54762306a36Sopenharmony_ci			#size-cells = <1>;
54862306a36Sopenharmony_ci			ranges = <0x0 0x10000 0x1000>;
54962306a36Sopenharmony_ci		};
55062306a36Sopenharmony_ci
55162306a36Sopenharmony_ci		target-module@14000 {			/* 0x47c14000, ap 37 3c.0 */
55262306a36Sopenharmony_ci			compatible = "ti,sysc";
55362306a36Sopenharmony_ci			status = "disabled";
55462306a36Sopenharmony_ci			#address-cells = <1>;
55562306a36Sopenharmony_ci			#size-cells = <1>;
55662306a36Sopenharmony_ci			ranges = <0x0 0x14000 0x1000>;
55762306a36Sopenharmony_ci		};
55862306a36Sopenharmony_ci
55962306a36Sopenharmony_ci		target-module@1a000 {			/* 0x47c1a000, ap 9 08.0 */
56062306a36Sopenharmony_ci			compatible = "ti,sysc";
56162306a36Sopenharmony_ci			status = "disabled";
56262306a36Sopenharmony_ci			#address-cells = <1>;
56362306a36Sopenharmony_ci			#size-cells = <1>;
56462306a36Sopenharmony_ci			ranges = <0x0 0x1a000 0x1000>;
56562306a36Sopenharmony_ci		};
56662306a36Sopenharmony_ci
56762306a36Sopenharmony_ci		target-module@24000 {			/* 0x47c24000, ap 11 28.0 */
56862306a36Sopenharmony_ci			compatible = "ti,sysc";
56962306a36Sopenharmony_ci			status = "disabled";
57062306a36Sopenharmony_ci			#address-cells = <1>;
57162306a36Sopenharmony_ci			#size-cells = <1>;
57262306a36Sopenharmony_ci			ranges = <0x0 0x24000 0x1000>;
57362306a36Sopenharmony_ci		};
57462306a36Sopenharmony_ci
57562306a36Sopenharmony_ci		target-module@26000 {			/* 0x47c26000, ap 13 30.0 */
57662306a36Sopenharmony_ci			compatible = "ti,sysc";
57762306a36Sopenharmony_ci			status = "disabled";
57862306a36Sopenharmony_ci			#address-cells = <1>;
57962306a36Sopenharmony_ci			#size-cells = <1>;
58062306a36Sopenharmony_ci			ranges = <0x0 0x26000 0x1000>;
58162306a36Sopenharmony_ci		};
58262306a36Sopenharmony_ci
58362306a36Sopenharmony_ci		target-module@28000 {			/* 0x47c28000, ap 29 40.0 */
58462306a36Sopenharmony_ci			compatible = "ti,sysc";
58562306a36Sopenharmony_ci			status = "disabled";
58662306a36Sopenharmony_ci			#address-cells = <1>;
58762306a36Sopenharmony_ci			#size-cells = <1>;
58862306a36Sopenharmony_ci			ranges = <0x0 0x28000 0x1000>;
58962306a36Sopenharmony_ci		};
59062306a36Sopenharmony_ci
59162306a36Sopenharmony_ci		target-module@30000 {			/* 0x47c30000, ap 15 14.0 */
59262306a36Sopenharmony_ci			compatible = "ti,sysc";
59362306a36Sopenharmony_ci			status = "disabled";
59462306a36Sopenharmony_ci			#address-cells = <1>;
59562306a36Sopenharmony_ci			#size-cells = <1>;
59662306a36Sopenharmony_ci			ranges = <0x0 0x30000 0x1000>;
59762306a36Sopenharmony_ci		};
59862306a36Sopenharmony_ci
59962306a36Sopenharmony_ci		target-module@32000 {			/* 0x47c32000, ap 31 06.0 */
60062306a36Sopenharmony_ci			compatible = "ti,sysc";
60162306a36Sopenharmony_ci			status = "disabled";
60262306a36Sopenharmony_ci			#address-cells = <1>;
60362306a36Sopenharmony_ci			#size-cells = <1>;
60462306a36Sopenharmony_ci			ranges = <0x0 0x32000 0x1000>;
60562306a36Sopenharmony_ci		};
60662306a36Sopenharmony_ci
60762306a36Sopenharmony_ci		target-module@38000 {			/* 0x47c38000, ap 17 18.0 */
60862306a36Sopenharmony_ci			compatible = "ti,sysc";
60962306a36Sopenharmony_ci			status = "disabled";
61062306a36Sopenharmony_ci			#address-cells = <1>;
61162306a36Sopenharmony_ci			#size-cells = <1>;
61262306a36Sopenharmony_ci			ranges = <0x0 0x38000 0x1000>;
61362306a36Sopenharmony_ci		};
61462306a36Sopenharmony_ci
61562306a36Sopenharmony_ci		target-module@3a000 {			/* 0x47c3a000, ap 19 1c.0 */
61662306a36Sopenharmony_ci			compatible = "ti,sysc";
61762306a36Sopenharmony_ci			status = "disabled";
61862306a36Sopenharmony_ci			#address-cells = <1>;
61962306a36Sopenharmony_ci			#size-cells = <1>;
62062306a36Sopenharmony_ci			ranges = <0x0 0x3a000 0x1000>;
62162306a36Sopenharmony_ci		};
62262306a36Sopenharmony_ci
62362306a36Sopenharmony_ci		target-module@3c000 {			/* 0x47c3c000, ap 23 38.0 */
62462306a36Sopenharmony_ci			compatible = "ti,sysc";
62562306a36Sopenharmony_ci			status = "disabled";
62662306a36Sopenharmony_ci			#address-cells = <1>;
62762306a36Sopenharmony_ci			#size-cells = <1>;
62862306a36Sopenharmony_ci			ranges = <0x0 0x3c000 0x1000>;
62962306a36Sopenharmony_ci		};
63062306a36Sopenharmony_ci
63162306a36Sopenharmony_ci		target-module@3e000 {			/* 0x47c3e000, ap 21 10.0 */
63262306a36Sopenharmony_ci			compatible = "ti,sysc";
63362306a36Sopenharmony_ci			status = "disabled";
63462306a36Sopenharmony_ci			#address-cells = <1>;
63562306a36Sopenharmony_ci			#size-cells = <1>;
63662306a36Sopenharmony_ci			ranges = <0x0 0x3e000 0x1000>;
63762306a36Sopenharmony_ci		};
63862306a36Sopenharmony_ci
63962306a36Sopenharmony_ci		target-module@40000 {			/* 0x47c40000, ap 24 02.0 */
64062306a36Sopenharmony_ci			compatible = "ti,sysc";
64162306a36Sopenharmony_ci			status = "disabled";
64262306a36Sopenharmony_ci			#address-cells = <1>;
64362306a36Sopenharmony_ci			#size-cells = <1>;
64462306a36Sopenharmony_ci			ranges = <0x0 0x40000 0x1000>;
64562306a36Sopenharmony_ci		};
64662306a36Sopenharmony_ci
64762306a36Sopenharmony_ci		target-module@42000 {			/* 0x47c42000, ap 35 34.0 */
64862306a36Sopenharmony_ci			compatible = "ti,sysc";
64962306a36Sopenharmony_ci			status = "disabled";
65062306a36Sopenharmony_ci			#address-cells = <1>;
65162306a36Sopenharmony_ci			#size-cells = <1>;
65262306a36Sopenharmony_ci			ranges = <0x0 0x42000 0x1000>;
65362306a36Sopenharmony_ci		};
65462306a36Sopenharmony_ci
65562306a36Sopenharmony_ci		target-module@44000 {			/* 0x47c44000, ap 27 24.0 */
65662306a36Sopenharmony_ci			compatible = "ti,sysc";
65762306a36Sopenharmony_ci			status = "disabled";
65862306a36Sopenharmony_ci			#address-cells = <1>;
65962306a36Sopenharmony_ci			#size-cells = <1>;
66062306a36Sopenharmony_ci			ranges = <0x0 0x44000 0x1000>;
66162306a36Sopenharmony_ci		};
66262306a36Sopenharmony_ci
66362306a36Sopenharmony_ci		target-module@46000 {			/* 0x47c46000, ap 25 2c.0 */
66462306a36Sopenharmony_ci			compatible = "ti,sysc";
66562306a36Sopenharmony_ci			status = "disabled";
66662306a36Sopenharmony_ci			#address-cells = <1>;
66762306a36Sopenharmony_ci			#size-cells = <1>;
66862306a36Sopenharmony_ci			ranges = <0x0 0x46000 0x1000>;
66962306a36Sopenharmony_ci		};
67062306a36Sopenharmony_ci	};
67162306a36Sopenharmony_ci};
67262306a36Sopenharmony_ci
67362306a36Sopenharmony_ci&l4_fast {					/* 0x4a000000 */
67462306a36Sopenharmony_ci	compatible = "ti,am33xx-l4-fast", "simple-pm-bus";
67562306a36Sopenharmony_ci	power-domains = <&prm_per>;
67662306a36Sopenharmony_ci	clocks = <&l4hs_clkctrl AM3_L4HS_L4_HS_CLKCTRL 0>;
67762306a36Sopenharmony_ci	clock-names = "fck";
67862306a36Sopenharmony_ci	reg = <0x4a000000 0x800>,
67962306a36Sopenharmony_ci	      <0x4a000800 0x800>,
68062306a36Sopenharmony_ci	      <0x4a001000 0x400>;
68162306a36Sopenharmony_ci	reg-names = "ap", "la", "ia0";
68262306a36Sopenharmony_ci	#address-cells = <1>;
68362306a36Sopenharmony_ci	#size-cells = <1>;
68462306a36Sopenharmony_ci	ranges = <0x00000000 0x4a000000 0x1000000>;	/* segment 0 */
68562306a36Sopenharmony_ci
68662306a36Sopenharmony_ci	segment@0 {					/* 0x4a000000 */
68762306a36Sopenharmony_ci		compatible = "simple-pm-bus";
68862306a36Sopenharmony_ci		#address-cells = <1>;
68962306a36Sopenharmony_ci		#size-cells = <1>;
69062306a36Sopenharmony_ci		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
69162306a36Sopenharmony_ci			 <0x00000800 0x00000800 0x000800>,	/* ap 1 */
69262306a36Sopenharmony_ci			 <0x00001000 0x00001000 0x000400>,	/* ap 2 */
69362306a36Sopenharmony_ci			 <0x00100000 0x00100000 0x008000>,	/* ap 3 */
69462306a36Sopenharmony_ci			 <0x00108000 0x00108000 0x001000>,	/* ap 4 */
69562306a36Sopenharmony_ci			 <0x00180000 0x00180000 0x020000>,	/* ap 5 */
69662306a36Sopenharmony_ci			 <0x001a0000 0x001a0000 0x001000>,	/* ap 6 */
69762306a36Sopenharmony_ci			 <0x00200000 0x00200000 0x080000>,	/* ap 7 */
69862306a36Sopenharmony_ci			 <0x00280000 0x00280000 0x001000>,	/* ap 8 */
69962306a36Sopenharmony_ci			 <0x00300000 0x00300000 0x080000>,	/* ap 9 */
70062306a36Sopenharmony_ci			 <0x00380000 0x00380000 0x001000>;	/* ap 10 */
70162306a36Sopenharmony_ci
70262306a36Sopenharmony_ci		target-module@100000 {			/* 0x4a100000, ap 3 08.0 */
70362306a36Sopenharmony_ci			compatible = "ti,sysc-omap4-simple", "ti,sysc";
70462306a36Sopenharmony_ci			reg = <0x101200 0x4>,
70562306a36Sopenharmony_ci			      <0x101208 0x4>,
70662306a36Sopenharmony_ci			      <0x101204 0x4>;
70762306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
70862306a36Sopenharmony_ci			ti,sysc-mask = <0>;
70962306a36Sopenharmony_ci			ti,sysc-midle = <SYSC_IDLE_FORCE>,
71062306a36Sopenharmony_ci					<SYSC_IDLE_NO>;
71162306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
71262306a36Sopenharmony_ci					<SYSC_IDLE_NO>;
71362306a36Sopenharmony_ci			ti,syss-mask = <1>;
71462306a36Sopenharmony_ci			clocks = <&cpsw_125mhz_clkctrl AM3_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>;
71562306a36Sopenharmony_ci			clock-names = "fck";
71662306a36Sopenharmony_ci			#address-cells = <1>;
71762306a36Sopenharmony_ci			#size-cells = <1>;
71862306a36Sopenharmony_ci			ranges = <0x0 0x100000 0x8000>;
71962306a36Sopenharmony_ci
72062306a36Sopenharmony_ci			mac: ethernet@0 {
72162306a36Sopenharmony_ci				compatible = "ti,am335x-cpsw","ti,cpsw";
72262306a36Sopenharmony_ci				clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
72362306a36Sopenharmony_ci				clock-names = "fck", "cpts";
72462306a36Sopenharmony_ci				cpdma_channels = <8>;
72562306a36Sopenharmony_ci				ale_entries = <1024>;
72662306a36Sopenharmony_ci				bd_ram_size = <0x2000>;
72762306a36Sopenharmony_ci				mac_control = <0x20>;
72862306a36Sopenharmony_ci				slaves = <2>;
72962306a36Sopenharmony_ci				active_slave = <0>;
73062306a36Sopenharmony_ci				cpts_clock_mult = <0x80000000>;
73162306a36Sopenharmony_ci				cpts_clock_shift = <29>;
73262306a36Sopenharmony_ci				reg = <0x0 0x800
73362306a36Sopenharmony_ci				       0x1200 0x100>;
73462306a36Sopenharmony_ci				#address-cells = <1>;
73562306a36Sopenharmony_ci				#size-cells = <1>;
73662306a36Sopenharmony_ci				/*
73762306a36Sopenharmony_ci				 * c0_rx_thresh_pend
73862306a36Sopenharmony_ci				 * c0_rx_pend
73962306a36Sopenharmony_ci				 * c0_tx_pend
74062306a36Sopenharmony_ci				 * c0_misc_pend
74162306a36Sopenharmony_ci				 */
74262306a36Sopenharmony_ci				interrupts = <40>, <41>, <42>, <43>;
74362306a36Sopenharmony_ci				ranges = <0 0 0x8000>;
74462306a36Sopenharmony_ci				syscon = <&scm_conf>;
74562306a36Sopenharmony_ci				status = "disabled";
74662306a36Sopenharmony_ci
74762306a36Sopenharmony_ci				davinci_mdio: mdio@1000 {
74862306a36Sopenharmony_ci					compatible = "ti,cpsw-mdio","ti,davinci_mdio";
74962306a36Sopenharmony_ci					clocks = <&cpsw_125mhz_clkctrl AM3_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>;
75062306a36Sopenharmony_ci					clock-names = "fck";
75162306a36Sopenharmony_ci					#address-cells = <1>;
75262306a36Sopenharmony_ci					#size-cells = <0>;
75362306a36Sopenharmony_ci					bus_freq = <1000000>;
75462306a36Sopenharmony_ci					reg = <0x1000 0x100>;
75562306a36Sopenharmony_ci					status = "disabled";
75662306a36Sopenharmony_ci				};
75762306a36Sopenharmony_ci
75862306a36Sopenharmony_ci				cpsw_emac0: slave@200 {
75962306a36Sopenharmony_ci					/* Filled in by U-Boot */
76062306a36Sopenharmony_ci					mac-address = [ 00 00 00 00 00 00 ];
76162306a36Sopenharmony_ci					phys = <&phy_gmii_sel 1 1>;
76262306a36Sopenharmony_ci				};
76362306a36Sopenharmony_ci
76462306a36Sopenharmony_ci				cpsw_emac1: slave@300 {
76562306a36Sopenharmony_ci					/* Filled in by U-Boot */
76662306a36Sopenharmony_ci					mac-address = [ 00 00 00 00 00 00 ];
76762306a36Sopenharmony_ci					phys = <&phy_gmii_sel 2 1>;
76862306a36Sopenharmony_ci				};
76962306a36Sopenharmony_ci			};
77062306a36Sopenharmony_ci
77162306a36Sopenharmony_ci			mac_sw: switch@0 {
77262306a36Sopenharmony_ci				compatible = "ti,am335x-cpsw-switch", "ti,cpsw-switch";
77362306a36Sopenharmony_ci				reg = <0x0 0x4000>;
77462306a36Sopenharmony_ci				ranges = <0 0 0x4000>;
77562306a36Sopenharmony_ci				clocks = <&cpsw_125mhz_gclk>;
77662306a36Sopenharmony_ci				clock-names = "fck";
77762306a36Sopenharmony_ci				#address-cells = <1>;
77862306a36Sopenharmony_ci				#size-cells = <1>;
77962306a36Sopenharmony_ci				syscon = <&scm_conf>;
78062306a36Sopenharmony_ci				status = "disabled";
78162306a36Sopenharmony_ci
78262306a36Sopenharmony_ci				interrupts = <40>, <41>, <42>, <43>;
78362306a36Sopenharmony_ci				interrupt-names = "rx_thresh", "rx", "tx", "misc";
78462306a36Sopenharmony_ci
78562306a36Sopenharmony_ci				ethernet-ports {
78662306a36Sopenharmony_ci					#address-cells = <1>;
78762306a36Sopenharmony_ci					#size-cells = <0>;
78862306a36Sopenharmony_ci
78962306a36Sopenharmony_ci					cpsw_port1: port@1 {
79062306a36Sopenharmony_ci						reg = <1>;
79162306a36Sopenharmony_ci						label = "port1";
79262306a36Sopenharmony_ci						mac-address = [ 00 00 00 00 00 00 ];
79362306a36Sopenharmony_ci						phys = <&phy_gmii_sel 1 1>;
79462306a36Sopenharmony_ci					};
79562306a36Sopenharmony_ci
79662306a36Sopenharmony_ci					cpsw_port2: port@2 {
79762306a36Sopenharmony_ci						reg = <2>;
79862306a36Sopenharmony_ci						label = "port2";
79962306a36Sopenharmony_ci						mac-address = [ 00 00 00 00 00 00 ];
80062306a36Sopenharmony_ci						phys = <&phy_gmii_sel 2 1>;
80162306a36Sopenharmony_ci					};
80262306a36Sopenharmony_ci				};
80362306a36Sopenharmony_ci
80462306a36Sopenharmony_ci				davinci_mdio_sw: mdio@1000 {
80562306a36Sopenharmony_ci					compatible = "ti,cpsw-mdio","ti,davinci_mdio";
80662306a36Sopenharmony_ci					clocks = <&cpsw_125mhz_gclk>;
80762306a36Sopenharmony_ci					clock-names = "fck";
80862306a36Sopenharmony_ci					#address-cells = <1>;
80962306a36Sopenharmony_ci					#size-cells = <0>;
81062306a36Sopenharmony_ci					bus_freq = <1000000>;
81162306a36Sopenharmony_ci					reg = <0x1000 0x100>;
81262306a36Sopenharmony_ci				};
81362306a36Sopenharmony_ci
81462306a36Sopenharmony_ci				cpts {
81562306a36Sopenharmony_ci					clocks = <&cpsw_cpts_rft_clk>;
81662306a36Sopenharmony_ci					clock-names = "cpts";
81762306a36Sopenharmony_ci				};
81862306a36Sopenharmony_ci			};
81962306a36Sopenharmony_ci		};
82062306a36Sopenharmony_ci
82162306a36Sopenharmony_ci		target-module@180000 {			/* 0x4a180000, ap 5 10.0 */
82262306a36Sopenharmony_ci			compatible = "ti,sysc";
82362306a36Sopenharmony_ci			status = "disabled";
82462306a36Sopenharmony_ci			#address-cells = <1>;
82562306a36Sopenharmony_ci			#size-cells = <1>;
82662306a36Sopenharmony_ci			ranges = <0x0 0x180000 0x20000>;
82762306a36Sopenharmony_ci		};
82862306a36Sopenharmony_ci
82962306a36Sopenharmony_ci		target-module@200000 {			/* 0x4a200000, ap 7 02.0 */
83062306a36Sopenharmony_ci			compatible = "ti,sysc";
83162306a36Sopenharmony_ci			status = "disabled";
83262306a36Sopenharmony_ci			#address-cells = <1>;
83362306a36Sopenharmony_ci			#size-cells = <1>;
83462306a36Sopenharmony_ci			ranges = <0x0 0x200000 0x80000>;
83562306a36Sopenharmony_ci		};
83662306a36Sopenharmony_ci
83762306a36Sopenharmony_ci		pruss_tm: target-module@300000 {	/* 0x4a300000, ap 9 04.0 */
83862306a36Sopenharmony_ci			compatible = "ti,sysc-pruss", "ti,sysc";
83962306a36Sopenharmony_ci			reg = <0x326000 0x4>,
84062306a36Sopenharmony_ci			      <0x326004 0x4>;
84162306a36Sopenharmony_ci			reg-names = "rev", "sysc";
84262306a36Sopenharmony_ci			ti,sysc-mask = <(SYSC_PRUSS_STANDBY_INIT |
84362306a36Sopenharmony_ci					 SYSC_PRUSS_SUB_MWAIT)>;
84462306a36Sopenharmony_ci			ti,sysc-midle = <SYSC_IDLE_FORCE>,
84562306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
84662306a36Sopenharmony_ci					<SYSC_IDLE_SMART>;
84762306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
84862306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
84962306a36Sopenharmony_ci					<SYSC_IDLE_SMART>;
85062306a36Sopenharmony_ci			clocks = <&pruss_ocp_clkctrl AM3_PRUSS_OCP_PRUSS_CLKCTRL 0>;
85162306a36Sopenharmony_ci			clock-names = "fck";
85262306a36Sopenharmony_ci			resets = <&prm_per 1>;
85362306a36Sopenharmony_ci			reset-names = "rstctrl";
85462306a36Sopenharmony_ci			#address-cells = <1>;
85562306a36Sopenharmony_ci			#size-cells = <1>;
85662306a36Sopenharmony_ci			ranges = <0x0 0x300000 0x80000>;
85762306a36Sopenharmony_ci			status = "disabled";
85862306a36Sopenharmony_ci
85962306a36Sopenharmony_ci			pruss: pruss@0 {
86062306a36Sopenharmony_ci				compatible = "ti,am3356-pruss";
86162306a36Sopenharmony_ci				reg = <0x0 0x80000>;
86262306a36Sopenharmony_ci				#address-cells = <1>;
86362306a36Sopenharmony_ci				#size-cells = <1>;
86462306a36Sopenharmony_ci				ranges;
86562306a36Sopenharmony_ci
86662306a36Sopenharmony_ci				pruss_mem: memories@0 {
86762306a36Sopenharmony_ci					reg = <0x0 0x2000>,
86862306a36Sopenharmony_ci					      <0x2000 0x2000>,
86962306a36Sopenharmony_ci					      <0x10000 0x3000>;
87062306a36Sopenharmony_ci					reg-names = "dram0", "dram1",
87162306a36Sopenharmony_ci						    "shrdram2";
87262306a36Sopenharmony_ci				};
87362306a36Sopenharmony_ci
87462306a36Sopenharmony_ci				pruss_cfg: cfg@26000 {
87562306a36Sopenharmony_ci					compatible = "ti,pruss-cfg", "syscon";
87662306a36Sopenharmony_ci					reg = <0x26000 0x2000>;
87762306a36Sopenharmony_ci					#address-cells = <1>;
87862306a36Sopenharmony_ci					#size-cells = <1>;
87962306a36Sopenharmony_ci					ranges = <0x0 0x26000 0x2000>;
88062306a36Sopenharmony_ci
88162306a36Sopenharmony_ci					clocks {
88262306a36Sopenharmony_ci						#address-cells = <1>;
88362306a36Sopenharmony_ci						#size-cells = <0>;
88462306a36Sopenharmony_ci
88562306a36Sopenharmony_ci						pruss_iepclk_mux: iepclk-mux@30 {
88662306a36Sopenharmony_ci							reg = <0x30>;
88762306a36Sopenharmony_ci							#clock-cells = <0>;
88862306a36Sopenharmony_ci							clocks = <&l3_gclk>,        /* icss_iep_gclk */
88962306a36Sopenharmony_ci								 <&pruss_ocp_gclk>; /* icss_ocp_gclk */
89062306a36Sopenharmony_ci						};
89162306a36Sopenharmony_ci					};
89262306a36Sopenharmony_ci				};
89362306a36Sopenharmony_ci
89462306a36Sopenharmony_ci				pruss_mii_rt: mii-rt@32000 {
89562306a36Sopenharmony_ci					compatible = "ti,pruss-mii", "syscon";
89662306a36Sopenharmony_ci					reg = <0x32000 0x58>;
89762306a36Sopenharmony_ci				};
89862306a36Sopenharmony_ci
89962306a36Sopenharmony_ci				pruss_intc: interrupt-controller@20000 {
90062306a36Sopenharmony_ci					compatible = "ti,pruss-intc";
90162306a36Sopenharmony_ci					reg = <0x20000 0x2000>;
90262306a36Sopenharmony_ci					interrupts = <20>, <21>, <22>, <23>, <24>, <25>, <26>, <27>;
90362306a36Sopenharmony_ci					interrupt-names = "host_intr0", "host_intr1",
90462306a36Sopenharmony_ci							  "host_intr2", "host_intr3",
90562306a36Sopenharmony_ci							  "host_intr4", "host_intr5",
90662306a36Sopenharmony_ci							  "host_intr6", "host_intr7";
90762306a36Sopenharmony_ci					interrupt-controller;
90862306a36Sopenharmony_ci					#interrupt-cells = <3>;
90962306a36Sopenharmony_ci				};
91062306a36Sopenharmony_ci
91162306a36Sopenharmony_ci				pru0: pru@34000 {
91262306a36Sopenharmony_ci					compatible = "ti,am3356-pru";
91362306a36Sopenharmony_ci					reg = <0x34000 0x2000>,
91462306a36Sopenharmony_ci					      <0x22000 0x400>,
91562306a36Sopenharmony_ci					      <0x22400 0x100>;
91662306a36Sopenharmony_ci					reg-names = "iram", "control", "debug";
91762306a36Sopenharmony_ci					firmware-name = "am335x-pru0-fw";
91862306a36Sopenharmony_ci				};
91962306a36Sopenharmony_ci
92062306a36Sopenharmony_ci				pru1: pru@38000 {
92162306a36Sopenharmony_ci					compatible = "ti,am3356-pru";
92262306a36Sopenharmony_ci					reg = <0x38000 0x2000>,
92362306a36Sopenharmony_ci					      <0x24000 0x400>,
92462306a36Sopenharmony_ci					      <0x24400 0x100>;
92562306a36Sopenharmony_ci					reg-names = "iram", "control", "debug";
92662306a36Sopenharmony_ci					firmware-name = "am335x-pru1-fw";
92762306a36Sopenharmony_ci				};
92862306a36Sopenharmony_ci
92962306a36Sopenharmony_ci				pruss_mdio: mdio@32400 {
93062306a36Sopenharmony_ci					compatible = "ti,davinci_mdio";
93162306a36Sopenharmony_ci					reg = <0x32400 0x90>;
93262306a36Sopenharmony_ci					clocks = <&dpll_core_m4_ck>;
93362306a36Sopenharmony_ci					clock-names = "fck";
93462306a36Sopenharmony_ci					bus_freq = <1000000>;
93562306a36Sopenharmony_ci					#address-cells = <1>;
93662306a36Sopenharmony_ci					#size-cells = <0>;
93762306a36Sopenharmony_ci					status = "disabled";
93862306a36Sopenharmony_ci				};
93962306a36Sopenharmony_ci			};
94062306a36Sopenharmony_ci		};
94162306a36Sopenharmony_ci	};
94262306a36Sopenharmony_ci};
94362306a36Sopenharmony_ci
94462306a36Sopenharmony_ci&l4_mpuss {						/* 0x4b140000 */
94562306a36Sopenharmony_ci	compatible = "ti,am33xx-l4-mpuss", "simple-bus";
94662306a36Sopenharmony_ci	reg = <0x4b144400 0x100>,
94762306a36Sopenharmony_ci	      <0x4b144800 0x400>;
94862306a36Sopenharmony_ci	reg-names = "la", "ap";
94962306a36Sopenharmony_ci	#address-cells = <1>;
95062306a36Sopenharmony_ci	#size-cells = <1>;
95162306a36Sopenharmony_ci	ranges = <0x00000000 0x4b140000 0x008000>;	/* segment 0 */
95262306a36Sopenharmony_ci
95362306a36Sopenharmony_ci	segment@0 {					/* 0x4b140000 */
95462306a36Sopenharmony_ci		compatible = "simple-bus";
95562306a36Sopenharmony_ci		#address-cells = <1>;
95662306a36Sopenharmony_ci		#size-cells = <1>;
95762306a36Sopenharmony_ci		ranges = <0x00004800 0x00004800 0x000400>,	/* ap 0 */
95862306a36Sopenharmony_ci			 <0x00001000 0x00001000 0x001000>,	/* ap 1 */
95962306a36Sopenharmony_ci			 <0x00002000 0x00002000 0x001000>,	/* ap 2 */
96062306a36Sopenharmony_ci			 <0x00004000 0x00004000 0x000400>,	/* ap 3 */
96162306a36Sopenharmony_ci			 <0x00005000 0x00005000 0x000400>,	/* ap 4 */
96262306a36Sopenharmony_ci			 <0x00000000 0x00000000 0x001000>,	/* ap 5 */
96362306a36Sopenharmony_ci			 <0x00003000 0x00003000 0x001000>,	/* ap 6 */
96462306a36Sopenharmony_ci			 <0x00000800 0x00000800 0x000800>;	/* ap 7 */
96562306a36Sopenharmony_ci
96662306a36Sopenharmony_ci		target-module@0 {			/* 0x4b140000, ap 5 02.2 */
96762306a36Sopenharmony_ci			compatible = "ti,sysc";
96862306a36Sopenharmony_ci			status = "disabled";
96962306a36Sopenharmony_ci			#address-cells = <1>;
97062306a36Sopenharmony_ci			#size-cells = <1>;
97162306a36Sopenharmony_ci			ranges = <0x00000000 0x00000000 0x00001000>,
97262306a36Sopenharmony_ci				 <0x00001000 0x00001000 0x00001000>,
97362306a36Sopenharmony_ci				 <0x00002000 0x00002000 0x00001000>;
97462306a36Sopenharmony_ci		};
97562306a36Sopenharmony_ci
97662306a36Sopenharmony_ci		target-module@3000 {			/* 0x4b143000, ap 6 04.0 */
97762306a36Sopenharmony_ci			compatible = "ti,sysc";
97862306a36Sopenharmony_ci			status = "disabled";
97962306a36Sopenharmony_ci			#address-cells = <1>;
98062306a36Sopenharmony_ci			#size-cells = <1>;
98162306a36Sopenharmony_ci			ranges = <0x0 0x3000 0x1000>;
98262306a36Sopenharmony_ci		};
98362306a36Sopenharmony_ci	};
98462306a36Sopenharmony_ci};
98562306a36Sopenharmony_ci
98662306a36Sopenharmony_ci&l4_per {						/* 0x48000000 */
98762306a36Sopenharmony_ci	compatible = "ti,am33xx-l4-per", "simple-pm-bus";
98862306a36Sopenharmony_ci	power-domains = <&prm_per>;
98962306a36Sopenharmony_ci	clocks = <&l4ls_clkctrl AM3_L4LS_L4_LS_CLKCTRL 0>;
99062306a36Sopenharmony_ci	clock-names = "fck";
99162306a36Sopenharmony_ci	reg = <0x48000000 0x800>,
99262306a36Sopenharmony_ci	      <0x48000800 0x800>,
99362306a36Sopenharmony_ci	      <0x48001000 0x400>,
99462306a36Sopenharmony_ci	      <0x48001400 0x400>,
99562306a36Sopenharmony_ci	      <0x48001800 0x400>,
99662306a36Sopenharmony_ci	      <0x48001c00 0x400>;
99762306a36Sopenharmony_ci	reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
99862306a36Sopenharmony_ci	#address-cells = <1>;
99962306a36Sopenharmony_ci	#size-cells = <1>;
100062306a36Sopenharmony_ci	ranges = <0x00000000 0x48000000 0x100000>,	/* segment 0 */
100162306a36Sopenharmony_ci		 <0x00100000 0x48100000 0x100000>,	/* segment 1 */
100262306a36Sopenharmony_ci		 <0x00200000 0x48200000 0x100000>,	/* segment 2 */
100362306a36Sopenharmony_ci		 <0x00300000 0x48300000 0x100000>,	/* segment 3 */
100462306a36Sopenharmony_ci		 <0x46000000 0x46000000 0x400000>,	/* l3 data port */
100562306a36Sopenharmony_ci		 <0x46400000 0x46400000 0x400000>;	/* l3 data port */
100662306a36Sopenharmony_ci
100762306a36Sopenharmony_ci	segment@0 {					/* 0x48000000 */
100862306a36Sopenharmony_ci		compatible = "simple-pm-bus";
100962306a36Sopenharmony_ci		#address-cells = <1>;
101062306a36Sopenharmony_ci		#size-cells = <1>;
101162306a36Sopenharmony_ci		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
101262306a36Sopenharmony_ci			 <0x00000800 0x00000800 0x000800>,	/* ap 1 */
101362306a36Sopenharmony_ci			 <0x00001000 0x00001000 0x000400>,	/* ap 2 */
101462306a36Sopenharmony_ci			 <0x00001400 0x00001400 0x000400>,	/* ap 3 */
101562306a36Sopenharmony_ci			 <0x00001800 0x00001800 0x000400>,	/* ap 4 */
101662306a36Sopenharmony_ci			 <0x00001c00 0x00001c00 0x000400>,	/* ap 5 */
101762306a36Sopenharmony_ci			 <0x00008000 0x00008000 0x001000>,	/* ap 6 */
101862306a36Sopenharmony_ci			 <0x00009000 0x00009000 0x001000>,	/* ap 7 */
101962306a36Sopenharmony_ci			 <0x00016000 0x00016000 0x001000>,	/* ap 8 */
102062306a36Sopenharmony_ci			 <0x00017000 0x00017000 0x001000>,	/* ap 9 */
102162306a36Sopenharmony_ci			 <0x00022000 0x00022000 0x001000>,	/* ap 10 */
102262306a36Sopenharmony_ci			 <0x00023000 0x00023000 0x001000>,	/* ap 11 */
102362306a36Sopenharmony_ci			 <0x00024000 0x00024000 0x001000>,	/* ap 12 */
102462306a36Sopenharmony_ci			 <0x00025000 0x00025000 0x001000>,	/* ap 13 */
102562306a36Sopenharmony_ci			 <0x0002a000 0x0002a000 0x001000>,	/* ap 14 */
102662306a36Sopenharmony_ci			 <0x0002b000 0x0002b000 0x001000>,	/* ap 15 */
102762306a36Sopenharmony_ci			 <0x00038000 0x00038000 0x002000>,	/* ap 16 */
102862306a36Sopenharmony_ci			 <0x0003a000 0x0003a000 0x001000>,	/* ap 17 */
102962306a36Sopenharmony_ci			 <0x00014000 0x00014000 0x001000>,	/* ap 18 */
103062306a36Sopenharmony_ci			 <0x00015000 0x00015000 0x001000>,	/* ap 19 */
103162306a36Sopenharmony_ci			 <0x0003c000 0x0003c000 0x002000>,	/* ap 20 */
103262306a36Sopenharmony_ci			 <0x0003e000 0x0003e000 0x001000>,	/* ap 21 */
103362306a36Sopenharmony_ci			 <0x00040000 0x00040000 0x001000>,	/* ap 22 */
103462306a36Sopenharmony_ci			 <0x00041000 0x00041000 0x001000>,	/* ap 23 */
103562306a36Sopenharmony_ci			 <0x00042000 0x00042000 0x001000>,	/* ap 24 */
103662306a36Sopenharmony_ci			 <0x00043000 0x00043000 0x001000>,	/* ap 25 */
103762306a36Sopenharmony_ci			 <0x00044000 0x00044000 0x001000>,	/* ap 26 */
103862306a36Sopenharmony_ci			 <0x00045000 0x00045000 0x001000>,	/* ap 27 */
103962306a36Sopenharmony_ci			 <0x00046000 0x00046000 0x001000>,	/* ap 28 */
104062306a36Sopenharmony_ci			 <0x00047000 0x00047000 0x001000>,	/* ap 29 */
104162306a36Sopenharmony_ci			 <0x00048000 0x00048000 0x001000>,	/* ap 30 */
104262306a36Sopenharmony_ci			 <0x00049000 0x00049000 0x001000>,	/* ap 31 */
104362306a36Sopenharmony_ci			 <0x0004c000 0x0004c000 0x001000>,	/* ap 32 */
104462306a36Sopenharmony_ci			 <0x0004d000 0x0004d000 0x001000>,	/* ap 33 */
104562306a36Sopenharmony_ci			 <0x00050000 0x00050000 0x002000>,	/* ap 34 */
104662306a36Sopenharmony_ci			 <0x00052000 0x00052000 0x001000>,	/* ap 35 */
104762306a36Sopenharmony_ci			 <0x00060000 0x00060000 0x001000>,	/* ap 36 */
104862306a36Sopenharmony_ci			 <0x00061000 0x00061000 0x001000>,	/* ap 37 */
104962306a36Sopenharmony_ci			 <0x00080000 0x00080000 0x010000>,	/* ap 38 */
105062306a36Sopenharmony_ci			 <0x00090000 0x00090000 0x001000>,	/* ap 39 */
105162306a36Sopenharmony_ci			 <0x000a0000 0x000a0000 0x010000>,	/* ap 40 */
105262306a36Sopenharmony_ci			 <0x000b0000 0x000b0000 0x001000>,	/* ap 41 */
105362306a36Sopenharmony_ci			 <0x00030000 0x00030000 0x001000>,	/* ap 77 */
105462306a36Sopenharmony_ci			 <0x00031000 0x00031000 0x001000>,	/* ap 78 */
105562306a36Sopenharmony_ci			 <0x0004a000 0x0004a000 0x001000>,	/* ap 85 */
105662306a36Sopenharmony_ci			 <0x0004b000 0x0004b000 0x001000>,	/* ap 86 */
105762306a36Sopenharmony_ci			 <0x000c8000 0x000c8000 0x001000>,	/* ap 87 */
105862306a36Sopenharmony_ci			 <0x000c9000 0x000c9000 0x001000>,	/* ap 88 */
105962306a36Sopenharmony_ci			 <0x000cc000 0x000cc000 0x001000>,	/* ap 89 */
106062306a36Sopenharmony_ci			 <0x000cd000 0x000cd000 0x001000>,	/* ap 90 */
106162306a36Sopenharmony_ci			 <0x000ca000 0x000ca000 0x001000>,	/* ap 91 */
106262306a36Sopenharmony_ci			 <0x000cb000 0x000cb000 0x001000>,	/* ap 92 */
106362306a36Sopenharmony_ci			 <0x46000000 0x46000000 0x400000>,	/* l3 data port */
106462306a36Sopenharmony_ci			 <0x46400000 0x46400000 0x400000>;	/* l3 data port */
106562306a36Sopenharmony_ci
106662306a36Sopenharmony_ci		target-module@8000 {			/* 0x48008000, ap 6 10.0 */
106762306a36Sopenharmony_ci			compatible = "ti,sysc";
106862306a36Sopenharmony_ci			status = "disabled";
106962306a36Sopenharmony_ci			#address-cells = <1>;
107062306a36Sopenharmony_ci			#size-cells = <1>;
107162306a36Sopenharmony_ci			ranges = <0x0 0x8000 0x1000>;
107262306a36Sopenharmony_ci		};
107362306a36Sopenharmony_ci
107462306a36Sopenharmony_ci		target-module@14000 {			/* 0x48014000, ap 18 58.0 */
107562306a36Sopenharmony_ci			compatible = "ti,sysc";
107662306a36Sopenharmony_ci			status = "disabled";
107762306a36Sopenharmony_ci			#address-cells = <1>;
107862306a36Sopenharmony_ci			#size-cells = <1>;
107962306a36Sopenharmony_ci			ranges = <0x0 0x14000 0x1000>;
108062306a36Sopenharmony_ci		};
108162306a36Sopenharmony_ci
108262306a36Sopenharmony_ci		target-module@16000 {			/* 0x48016000, ap 8 3c.0 */
108362306a36Sopenharmony_ci			compatible = "ti,sysc";
108462306a36Sopenharmony_ci			status = "disabled";
108562306a36Sopenharmony_ci			#address-cells = <1>;
108662306a36Sopenharmony_ci			#size-cells = <1>;
108762306a36Sopenharmony_ci			ranges = <0x0 0x16000 0x1000>;
108862306a36Sopenharmony_ci		};
108962306a36Sopenharmony_ci
109062306a36Sopenharmony_ci		target-module@22000 {			/* 0x48022000, ap 10 12.0 */
109162306a36Sopenharmony_ci			compatible = "ti,sysc-omap2", "ti,sysc";
109262306a36Sopenharmony_ci			reg = <0x22050 0x4>,
109362306a36Sopenharmony_ci			      <0x22054 0x4>,
109462306a36Sopenharmony_ci			      <0x22058 0x4>;
109562306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
109662306a36Sopenharmony_ci			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
109762306a36Sopenharmony_ci					 SYSC_OMAP2_SOFTRESET |
109862306a36Sopenharmony_ci					 SYSC_OMAP2_AUTOIDLE)>;
109962306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
110062306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
110162306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
110262306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
110362306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
110462306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_UART2_CLKCTRL 0>;
110562306a36Sopenharmony_ci			clock-names = "fck";
110662306a36Sopenharmony_ci			#address-cells = <1>;
110762306a36Sopenharmony_ci			#size-cells = <1>;
110862306a36Sopenharmony_ci			ranges = <0x0 0x22000 0x1000>;
110962306a36Sopenharmony_ci
111062306a36Sopenharmony_ci			uart1: serial@0 {
111162306a36Sopenharmony_ci				compatible = "ti,am3352-uart", "ti,omap3-uart";
111262306a36Sopenharmony_ci				clock-frequency = <48000000>;
111362306a36Sopenharmony_ci				reg = <0x0 0x1000>;
111462306a36Sopenharmony_ci				interrupts = <73>;
111562306a36Sopenharmony_ci				status = "disabled";
111662306a36Sopenharmony_ci				dmas = <&edma 28 0>, <&edma 29 0>;
111762306a36Sopenharmony_ci				dma-names = "tx", "rx";
111862306a36Sopenharmony_ci			};
111962306a36Sopenharmony_ci		};
112062306a36Sopenharmony_ci
112162306a36Sopenharmony_ci		target-module@24000 {			/* 0x48024000, ap 12 14.0 */
112262306a36Sopenharmony_ci			compatible = "ti,sysc-omap2", "ti,sysc";
112362306a36Sopenharmony_ci			reg = <0x24050 0x4>,
112462306a36Sopenharmony_ci			      <0x24054 0x4>,
112562306a36Sopenharmony_ci			      <0x24058 0x4>;
112662306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
112762306a36Sopenharmony_ci			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
112862306a36Sopenharmony_ci					 SYSC_OMAP2_SOFTRESET |
112962306a36Sopenharmony_ci					 SYSC_OMAP2_AUTOIDLE)>;
113062306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
113162306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
113262306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
113362306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
113462306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
113562306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_UART3_CLKCTRL 0>;
113662306a36Sopenharmony_ci			clock-names = "fck";
113762306a36Sopenharmony_ci			#address-cells = <1>;
113862306a36Sopenharmony_ci			#size-cells = <1>;
113962306a36Sopenharmony_ci			ranges = <0x0 0x24000 0x1000>;
114062306a36Sopenharmony_ci
114162306a36Sopenharmony_ci			uart2: serial@0 {
114262306a36Sopenharmony_ci				compatible = "ti,am3352-uart", "ti,omap3-uart";
114362306a36Sopenharmony_ci				clock-frequency = <48000000>;
114462306a36Sopenharmony_ci				reg = <0x0 0x1000>;
114562306a36Sopenharmony_ci				interrupts = <74>;
114662306a36Sopenharmony_ci				status = "disabled";
114762306a36Sopenharmony_ci				dmas = <&edma 30 0>, <&edma 31 0>;
114862306a36Sopenharmony_ci				dma-names = "tx", "rx";
114962306a36Sopenharmony_ci			};
115062306a36Sopenharmony_ci		};
115162306a36Sopenharmony_ci
115262306a36Sopenharmony_ci		target-module@2a000 {			/* 0x4802a000, ap 14 2a.0 */
115362306a36Sopenharmony_ci			compatible = "ti,sysc-omap2", "ti,sysc";
115462306a36Sopenharmony_ci			reg = <0x2a000 0x8>,
115562306a36Sopenharmony_ci			      <0x2a010 0x8>,
115662306a36Sopenharmony_ci			      <0x2a090 0x8>;
115762306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
115862306a36Sopenharmony_ci			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
115962306a36Sopenharmony_ci					 SYSC_OMAP2_ENAWAKEUP |
116062306a36Sopenharmony_ci					 SYSC_OMAP2_SOFTRESET |
116162306a36Sopenharmony_ci					 SYSC_OMAP2_AUTOIDLE)>;
116262306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
116362306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
116462306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
116562306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
116662306a36Sopenharmony_ci			ti,syss-mask = <1>;
116762306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
116862306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_I2C2_CLKCTRL 0>;
116962306a36Sopenharmony_ci			clock-names = "fck";
117062306a36Sopenharmony_ci			#address-cells = <1>;
117162306a36Sopenharmony_ci			#size-cells = <1>;
117262306a36Sopenharmony_ci			ranges = <0x0 0x2a000 0x1000>;
117362306a36Sopenharmony_ci
117462306a36Sopenharmony_ci			i2c1: i2c@0 {
117562306a36Sopenharmony_ci				compatible = "ti,omap4-i2c";
117662306a36Sopenharmony_ci				#address-cells = <1>;
117762306a36Sopenharmony_ci				#size-cells = <0>;
117862306a36Sopenharmony_ci				reg = <0x0 0x1000>;
117962306a36Sopenharmony_ci				interrupts = <71>;
118062306a36Sopenharmony_ci				status = "disabled";
118162306a36Sopenharmony_ci			};
118262306a36Sopenharmony_ci		};
118362306a36Sopenharmony_ci
118462306a36Sopenharmony_ci		target-module@30000 {			/* 0x48030000, ap 77 08.0 */
118562306a36Sopenharmony_ci			compatible = "ti,sysc-omap2", "ti,sysc";
118662306a36Sopenharmony_ci			reg = <0x30000 0x4>,
118762306a36Sopenharmony_ci			      <0x30110 0x4>,
118862306a36Sopenharmony_ci			      <0x30114 0x4>;
118962306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
119062306a36Sopenharmony_ci			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
119162306a36Sopenharmony_ci					 SYSC_OMAP2_SOFTRESET |
119262306a36Sopenharmony_ci					 SYSC_OMAP2_AUTOIDLE)>;
119362306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
119462306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
119562306a36Sopenharmony_ci					<SYSC_IDLE_SMART>;
119662306a36Sopenharmony_ci			ti,syss-mask = <1>;
119762306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
119862306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_SPI0_CLKCTRL 0>;
119962306a36Sopenharmony_ci			clock-names = "fck";
120062306a36Sopenharmony_ci			#address-cells = <1>;
120162306a36Sopenharmony_ci			#size-cells = <1>;
120262306a36Sopenharmony_ci			ranges = <0x0 0x30000 0x1000>;
120362306a36Sopenharmony_ci
120462306a36Sopenharmony_ci			spi0: spi@0 {
120562306a36Sopenharmony_ci				compatible = "ti,omap4-mcspi";
120662306a36Sopenharmony_ci				#address-cells = <1>;
120762306a36Sopenharmony_ci				#size-cells = <0>;
120862306a36Sopenharmony_ci				reg = <0x0 0x400>;
120962306a36Sopenharmony_ci				interrupts = <65>;
121062306a36Sopenharmony_ci				ti,spi-num-cs = <2>;
121162306a36Sopenharmony_ci				dmas = <&edma 16 0
121262306a36Sopenharmony_ci					&edma 17 0
121362306a36Sopenharmony_ci					&edma 18 0
121462306a36Sopenharmony_ci					&edma 19 0>;
121562306a36Sopenharmony_ci				dma-names = "tx0", "rx0", "tx1", "rx1";
121662306a36Sopenharmony_ci				status = "disabled";
121762306a36Sopenharmony_ci			};
121862306a36Sopenharmony_ci		};
121962306a36Sopenharmony_ci
122062306a36Sopenharmony_ci		target-module@38000 {			/* 0x48038000, ap 16 02.0 */
122162306a36Sopenharmony_ci			compatible = "ti,sysc-omap4-simple", "ti,sysc";
122262306a36Sopenharmony_ci			reg = <0x38000 0x4>,
122362306a36Sopenharmony_ci			      <0x38004 0x4>;
122462306a36Sopenharmony_ci			reg-names = "rev", "sysc";
122562306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
122662306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
122762306a36Sopenharmony_ci					<SYSC_IDLE_SMART>;
122862306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l3s_clkdm */
122962306a36Sopenharmony_ci			clocks = <&l3s_clkctrl AM3_L3S_MCASP0_CLKCTRL 0>;
123062306a36Sopenharmony_ci			clock-names = "fck";
123162306a36Sopenharmony_ci			#address-cells = <1>;
123262306a36Sopenharmony_ci			#size-cells = <1>;
123362306a36Sopenharmony_ci			ranges = <0x0 0x38000 0x2000>,
123462306a36Sopenharmony_ci				 <0x46000000 0x46000000 0x400000>;
123562306a36Sopenharmony_ci
123662306a36Sopenharmony_ci			mcasp0: mcasp@0 {
123762306a36Sopenharmony_ci				compatible = "ti,am33xx-mcasp-audio";
123862306a36Sopenharmony_ci				reg = <0x0 0x2000>,
123962306a36Sopenharmony_ci				      <0x46000000 0x400000>;
124062306a36Sopenharmony_ci				reg-names = "mpu", "dat";
124162306a36Sopenharmony_ci				interrupts = <80>, <81>;
124262306a36Sopenharmony_ci				interrupt-names = "tx", "rx";
124362306a36Sopenharmony_ci				status = "disabled";
124462306a36Sopenharmony_ci				dmas = <&edma 8 2>,
124562306a36Sopenharmony_ci					<&edma 9 2>;
124662306a36Sopenharmony_ci				dma-names = "tx", "rx";
124762306a36Sopenharmony_ci			};
124862306a36Sopenharmony_ci		};
124962306a36Sopenharmony_ci
125062306a36Sopenharmony_ci		target-module@3c000 {			/* 0x4803c000, ap 20 32.0 */
125162306a36Sopenharmony_ci			compatible = "ti,sysc-omap4-simple", "ti,sysc";
125262306a36Sopenharmony_ci			reg = <0x3c000 0x4>,
125362306a36Sopenharmony_ci			      <0x3c004 0x4>;
125462306a36Sopenharmony_ci			reg-names = "rev", "sysc";
125562306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
125662306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
125762306a36Sopenharmony_ci					<SYSC_IDLE_SMART>;
125862306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l3s_clkdm */
125962306a36Sopenharmony_ci			clocks = <&l3s_clkctrl AM3_L3S_MCASP1_CLKCTRL 0>;
126062306a36Sopenharmony_ci			clock-names = "fck";
126162306a36Sopenharmony_ci			#address-cells = <1>;
126262306a36Sopenharmony_ci			#size-cells = <1>;
126362306a36Sopenharmony_ci			ranges = <0x0 0x3c000 0x2000>,
126462306a36Sopenharmony_ci				 <0x46400000 0x46400000 0x400000>;
126562306a36Sopenharmony_ci
126662306a36Sopenharmony_ci			mcasp1: mcasp@0 {
126762306a36Sopenharmony_ci				compatible = "ti,am33xx-mcasp-audio";
126862306a36Sopenharmony_ci				reg = <0x0 0x2000>,
126962306a36Sopenharmony_ci				      <0x46400000 0x400000>;
127062306a36Sopenharmony_ci				reg-names = "mpu", "dat";
127162306a36Sopenharmony_ci				interrupts = <82>, <83>;
127262306a36Sopenharmony_ci				interrupt-names = "tx", "rx";
127362306a36Sopenharmony_ci				status = "disabled";
127462306a36Sopenharmony_ci				dmas = <&edma 10 2>,
127562306a36Sopenharmony_ci					<&edma 11 2>;
127662306a36Sopenharmony_ci				dma-names = "tx", "rx";
127762306a36Sopenharmony_ci			};
127862306a36Sopenharmony_ci		};
127962306a36Sopenharmony_ci
128062306a36Sopenharmony_ci		timer2_target: target-module@40000 {	/* 0x48040000, ap 22 1e.0 */
128162306a36Sopenharmony_ci			compatible = "ti,sysc-omap4-timer", "ti,sysc";
128262306a36Sopenharmony_ci			reg = <0x40000 0x4>,
128362306a36Sopenharmony_ci			      <0x40010 0x4>,
128462306a36Sopenharmony_ci			      <0x40014 0x4>;
128562306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
128662306a36Sopenharmony_ci			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
128762306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
128862306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
128962306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
129062306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
129162306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
129262306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_TIMER2_CLKCTRL 0>;
129362306a36Sopenharmony_ci			clock-names = "fck";
129462306a36Sopenharmony_ci			#address-cells = <1>;
129562306a36Sopenharmony_ci			#size-cells = <1>;
129662306a36Sopenharmony_ci			ranges = <0x0 0x40000 0x1000>;
129762306a36Sopenharmony_ci
129862306a36Sopenharmony_ci			timer2: timer@0 {
129962306a36Sopenharmony_ci				compatible = "ti,am335x-timer";
130062306a36Sopenharmony_ci				reg = <0x0 0x400>;
130162306a36Sopenharmony_ci				interrupts = <68>;
130262306a36Sopenharmony_ci				clocks = <&timer2_fck>;
130362306a36Sopenharmony_ci				clock-names = "fck";
130462306a36Sopenharmony_ci			};
130562306a36Sopenharmony_ci		};
130662306a36Sopenharmony_ci
130762306a36Sopenharmony_ci		target-module@42000 {			/* 0x48042000, ap 24 1c.0 */
130862306a36Sopenharmony_ci			compatible = "ti,sysc-omap4-timer", "ti,sysc";
130962306a36Sopenharmony_ci			reg = <0x42000 0x4>,
131062306a36Sopenharmony_ci			      <0x42010 0x4>,
131162306a36Sopenharmony_ci			      <0x42014 0x4>;
131262306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
131362306a36Sopenharmony_ci			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
131462306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
131562306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
131662306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
131762306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
131862306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
131962306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_TIMER3_CLKCTRL 0>;
132062306a36Sopenharmony_ci			clock-names = "fck";
132162306a36Sopenharmony_ci			#address-cells = <1>;
132262306a36Sopenharmony_ci			#size-cells = <1>;
132362306a36Sopenharmony_ci			ranges = <0x0 0x42000 0x1000>;
132462306a36Sopenharmony_ci
132562306a36Sopenharmony_ci			timer3: timer@0 {
132662306a36Sopenharmony_ci				compatible = "ti,am335x-timer";
132762306a36Sopenharmony_ci				reg = <0x0 0x400>;
132862306a36Sopenharmony_ci				interrupts = <69>;
132962306a36Sopenharmony_ci			};
133062306a36Sopenharmony_ci		};
133162306a36Sopenharmony_ci
133262306a36Sopenharmony_ci		target-module@44000 {			/* 0x48044000, ap 26 26.0 */
133362306a36Sopenharmony_ci			compatible = "ti,sysc-omap4-timer", "ti,sysc";
133462306a36Sopenharmony_ci			reg = <0x44000 0x4>,
133562306a36Sopenharmony_ci			      <0x44010 0x4>,
133662306a36Sopenharmony_ci			      <0x44014 0x4>;
133762306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
133862306a36Sopenharmony_ci			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
133962306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
134062306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
134162306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
134262306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
134362306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
134462306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_TIMER4_CLKCTRL 0>;
134562306a36Sopenharmony_ci			clock-names = "fck";
134662306a36Sopenharmony_ci			#address-cells = <1>;
134762306a36Sopenharmony_ci			#size-cells = <1>;
134862306a36Sopenharmony_ci			ranges = <0x0 0x44000 0x1000>;
134962306a36Sopenharmony_ci
135062306a36Sopenharmony_ci			timer4: timer@0 {
135162306a36Sopenharmony_ci				compatible = "ti,am335x-timer";
135262306a36Sopenharmony_ci				reg = <0x0 0x400>;
135362306a36Sopenharmony_ci				interrupts = <92>;
135462306a36Sopenharmony_ci				ti,timer-pwm;
135562306a36Sopenharmony_ci			};
135662306a36Sopenharmony_ci		};
135762306a36Sopenharmony_ci
135862306a36Sopenharmony_ci		target-module@46000 {			/* 0x48046000, ap 28 28.0 */
135962306a36Sopenharmony_ci			compatible = "ti,sysc-omap4-timer", "ti,sysc";
136062306a36Sopenharmony_ci			reg = <0x46000 0x4>,
136162306a36Sopenharmony_ci			      <0x46010 0x4>,
136262306a36Sopenharmony_ci			      <0x46014 0x4>;
136362306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
136462306a36Sopenharmony_ci			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
136562306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
136662306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
136762306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
136862306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
136962306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
137062306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_TIMER5_CLKCTRL 0>;
137162306a36Sopenharmony_ci			clock-names = "fck";
137262306a36Sopenharmony_ci			#address-cells = <1>;
137362306a36Sopenharmony_ci			#size-cells = <1>;
137462306a36Sopenharmony_ci			ranges = <0x0 0x46000 0x1000>;
137562306a36Sopenharmony_ci
137662306a36Sopenharmony_ci			timer5: timer@0 {
137762306a36Sopenharmony_ci				compatible = "ti,am335x-timer";
137862306a36Sopenharmony_ci				reg = <0x0 0x400>;
137962306a36Sopenharmony_ci				interrupts = <93>;
138062306a36Sopenharmony_ci				ti,timer-pwm;
138162306a36Sopenharmony_ci			};
138262306a36Sopenharmony_ci		};
138362306a36Sopenharmony_ci
138462306a36Sopenharmony_ci		target-module@48000 {			/* 0x48048000, ap 30 22.0 */
138562306a36Sopenharmony_ci			compatible = "ti,sysc-omap4-timer", "ti,sysc";
138662306a36Sopenharmony_ci			reg = <0x48000 0x4>,
138762306a36Sopenharmony_ci			      <0x48010 0x4>,
138862306a36Sopenharmony_ci			      <0x48014 0x4>;
138962306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
139062306a36Sopenharmony_ci			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
139162306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
139262306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
139362306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
139462306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
139562306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
139662306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_TIMER6_CLKCTRL 0>;
139762306a36Sopenharmony_ci			clock-names = "fck";
139862306a36Sopenharmony_ci			#address-cells = <1>;
139962306a36Sopenharmony_ci			#size-cells = <1>;
140062306a36Sopenharmony_ci			ranges = <0x0 0x48000 0x1000>;
140162306a36Sopenharmony_ci
140262306a36Sopenharmony_ci			timer6: timer@0 {
140362306a36Sopenharmony_ci				compatible = "ti,am335x-timer";
140462306a36Sopenharmony_ci				reg = <0x0 0x400>;
140562306a36Sopenharmony_ci				interrupts = <94>;
140662306a36Sopenharmony_ci				ti,timer-pwm;
140762306a36Sopenharmony_ci			};
140862306a36Sopenharmony_ci		};
140962306a36Sopenharmony_ci
141062306a36Sopenharmony_ci		target-module@4a000 {			/* 0x4804a000, ap 85 60.0 */
141162306a36Sopenharmony_ci			compatible = "ti,sysc-omap4-timer", "ti,sysc";
141262306a36Sopenharmony_ci			reg = <0x4a000 0x4>,
141362306a36Sopenharmony_ci			      <0x4a010 0x4>,
141462306a36Sopenharmony_ci			      <0x4a014 0x4>;
141562306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
141662306a36Sopenharmony_ci			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
141762306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
141862306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
141962306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
142062306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
142162306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
142262306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_TIMER7_CLKCTRL 0>;
142362306a36Sopenharmony_ci			clock-names = "fck";
142462306a36Sopenharmony_ci			#address-cells = <1>;
142562306a36Sopenharmony_ci			#size-cells = <1>;
142662306a36Sopenharmony_ci			ranges = <0x0 0x4a000 0x1000>;
142762306a36Sopenharmony_ci
142862306a36Sopenharmony_ci			timer7: timer@0 {
142962306a36Sopenharmony_ci				compatible = "ti,am335x-timer";
143062306a36Sopenharmony_ci				reg = <0x0 0x400>;
143162306a36Sopenharmony_ci				interrupts = <95>;
143262306a36Sopenharmony_ci				ti,timer-pwm;
143362306a36Sopenharmony_ci			};
143462306a36Sopenharmony_ci		};
143562306a36Sopenharmony_ci
143662306a36Sopenharmony_ci		target-module@4c000 {			/* 0x4804c000, ap 32 36.0 */
143762306a36Sopenharmony_ci			compatible = "ti,sysc-omap2", "ti,sysc";
143862306a36Sopenharmony_ci			reg = <0x4c000 0x4>,
143962306a36Sopenharmony_ci			      <0x4c010 0x4>,
144062306a36Sopenharmony_ci			      <0x4c114 0x4>;
144162306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
144262306a36Sopenharmony_ci			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
144362306a36Sopenharmony_ci					 SYSC_OMAP2_SOFTRESET |
144462306a36Sopenharmony_ci					 SYSC_OMAP2_AUTOIDLE)>;
144562306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
144662306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
144762306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
144862306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
144962306a36Sopenharmony_ci			ti,syss-mask = <1>;
145062306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
145162306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_GPIO2_CLKCTRL 0>,
145262306a36Sopenharmony_ci				 <&l4ls_clkctrl AM3_L4LS_GPIO2_CLKCTRL 18>;
145362306a36Sopenharmony_ci			clock-names = "fck", "dbclk";
145462306a36Sopenharmony_ci			#address-cells = <1>;
145562306a36Sopenharmony_ci			#size-cells = <1>;
145662306a36Sopenharmony_ci			ranges = <0x0 0x4c000 0x1000>;
145762306a36Sopenharmony_ci
145862306a36Sopenharmony_ci			gpio1: gpio@0 {
145962306a36Sopenharmony_ci				compatible = "ti,omap4-gpio";
146062306a36Sopenharmony_ci				gpio-ranges =   <&am33xx_pinmux  0  0  8>,
146162306a36Sopenharmony_ci						<&am33xx_pinmux  8 90  4>,
146262306a36Sopenharmony_ci						<&am33xx_pinmux 12 12 16>,
146362306a36Sopenharmony_ci						<&am33xx_pinmux 28 30  4>;
146462306a36Sopenharmony_ci				gpio-controller;
146562306a36Sopenharmony_ci				#gpio-cells = <2>;
146662306a36Sopenharmony_ci				interrupt-controller;
146762306a36Sopenharmony_ci				#interrupt-cells = <2>;
146862306a36Sopenharmony_ci				reg = <0x0 0x1000>;
146962306a36Sopenharmony_ci				interrupts = <98>;
147062306a36Sopenharmony_ci			};
147162306a36Sopenharmony_ci		};
147262306a36Sopenharmony_ci
147362306a36Sopenharmony_ci		target-module@50000 {			/* 0x48050000, ap 34 2c.0 */
147462306a36Sopenharmony_ci			compatible = "ti,sysc";
147562306a36Sopenharmony_ci			status = "disabled";
147662306a36Sopenharmony_ci			#address-cells = <1>;
147762306a36Sopenharmony_ci			#size-cells = <1>;
147862306a36Sopenharmony_ci			ranges = <0x0 0x50000 0x2000>;
147962306a36Sopenharmony_ci		};
148062306a36Sopenharmony_ci
148162306a36Sopenharmony_ci		target-module@60000 {			/* 0x48060000, ap 36 0c.0 */
148262306a36Sopenharmony_ci			compatible = "ti,sysc-omap2", "ti,sysc";
148362306a36Sopenharmony_ci			reg = <0x602fc 0x4>,
148462306a36Sopenharmony_ci			      <0x60110 0x4>,
148562306a36Sopenharmony_ci			      <0x60114 0x4>;
148662306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
148762306a36Sopenharmony_ci			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
148862306a36Sopenharmony_ci					 SYSC_OMAP2_ENAWAKEUP |
148962306a36Sopenharmony_ci					 SYSC_OMAP2_SOFTRESET |
149062306a36Sopenharmony_ci					 SYSC_OMAP2_AUTOIDLE)>;
149162306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
149262306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
149362306a36Sopenharmony_ci					<SYSC_IDLE_SMART>;
149462306a36Sopenharmony_ci			ti,syss-mask = <1>;
149562306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
149662306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_MMC1_CLKCTRL 0>;
149762306a36Sopenharmony_ci			clock-names = "fck";
149862306a36Sopenharmony_ci			#address-cells = <1>;
149962306a36Sopenharmony_ci			#size-cells = <1>;
150062306a36Sopenharmony_ci			ranges = <0x0 0x60000 0x1000>;
150162306a36Sopenharmony_ci
150262306a36Sopenharmony_ci			mmc1: mmc@0 {
150362306a36Sopenharmony_ci				compatible = "ti,am335-sdhci";
150462306a36Sopenharmony_ci				ti,needs-special-reset;
150562306a36Sopenharmony_ci				dmas = <&edma 24 0>, <&edma 25 0>;
150662306a36Sopenharmony_ci				dma-names = "tx", "rx";
150762306a36Sopenharmony_ci				interrupts = <64>;
150862306a36Sopenharmony_ci				reg = <0x0 0x1000>;
150962306a36Sopenharmony_ci				status = "disabled";
151062306a36Sopenharmony_ci			};
151162306a36Sopenharmony_ci		};
151262306a36Sopenharmony_ci
151362306a36Sopenharmony_ci		target-module@80000 {			/* 0x48080000, ap 38 18.0 */
151462306a36Sopenharmony_ci			compatible = "ti,sysc-omap2", "ti,sysc";
151562306a36Sopenharmony_ci			reg = <0x80000 0x4>,
151662306a36Sopenharmony_ci			      <0x80010 0x4>,
151762306a36Sopenharmony_ci			      <0x80014 0x4>;
151862306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
151962306a36Sopenharmony_ci			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
152062306a36Sopenharmony_ci					 SYSC_OMAP2_SOFTRESET |
152162306a36Sopenharmony_ci					 SYSC_OMAP2_AUTOIDLE)>;
152262306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
152362306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
152462306a36Sopenharmony_ci					<SYSC_IDLE_SMART>;
152562306a36Sopenharmony_ci			ti,syss-mask = <1>;
152662306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
152762306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_ELM_CLKCTRL 0>;
152862306a36Sopenharmony_ci			clock-names = "fck";
152962306a36Sopenharmony_ci			#address-cells = <1>;
153062306a36Sopenharmony_ci			#size-cells = <1>;
153162306a36Sopenharmony_ci			ranges = <0x0 0x80000 0x10000>;
153262306a36Sopenharmony_ci
153362306a36Sopenharmony_ci			elm: elm@0 {
153462306a36Sopenharmony_ci				compatible = "ti,am3352-elm";
153562306a36Sopenharmony_ci				reg = <0x0 0x2000>;
153662306a36Sopenharmony_ci				interrupts = <4>;
153762306a36Sopenharmony_ci				status = "disabled";
153862306a36Sopenharmony_ci			};
153962306a36Sopenharmony_ci		};
154062306a36Sopenharmony_ci
154162306a36Sopenharmony_ci		target-module@a0000 {			/* 0x480a0000, ap 40 5e.0 */
154262306a36Sopenharmony_ci			compatible = "ti,sysc";
154362306a36Sopenharmony_ci			status = "disabled";
154462306a36Sopenharmony_ci			#address-cells = <1>;
154562306a36Sopenharmony_ci			#size-cells = <1>;
154662306a36Sopenharmony_ci			ranges = <0x0 0xa0000 0x10000>;
154762306a36Sopenharmony_ci		};
154862306a36Sopenharmony_ci
154962306a36Sopenharmony_ci		target-module@c8000 {			/* 0x480c8000, ap 87 06.0 */
155062306a36Sopenharmony_ci			compatible = "ti,sysc-omap4", "ti,sysc";
155162306a36Sopenharmony_ci			reg = <0xc8000 0x4>,
155262306a36Sopenharmony_ci			      <0xc8010 0x4>;
155362306a36Sopenharmony_ci			reg-names = "rev", "sysc";
155462306a36Sopenharmony_ci			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
155562306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
155662306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
155762306a36Sopenharmony_ci					<SYSC_IDLE_SMART>;
155862306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
155962306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_MAILBOX_CLKCTRL 0>;
156062306a36Sopenharmony_ci			clock-names = "fck";
156162306a36Sopenharmony_ci			#address-cells = <1>;
156262306a36Sopenharmony_ci			#size-cells = <1>;
156362306a36Sopenharmony_ci			ranges = <0x0 0xc8000 0x1000>;
156462306a36Sopenharmony_ci
156562306a36Sopenharmony_ci			mailbox: mailbox@0 {
156662306a36Sopenharmony_ci				compatible = "ti,omap4-mailbox";
156762306a36Sopenharmony_ci				reg = <0x0 0x200>;
156862306a36Sopenharmony_ci				interrupts = <77>;
156962306a36Sopenharmony_ci				#mbox-cells = <1>;
157062306a36Sopenharmony_ci				ti,mbox-num-users = <4>;
157162306a36Sopenharmony_ci				ti,mbox-num-fifos = <8>;
157262306a36Sopenharmony_ci				mbox_wkupm3: mbox-wkup-m3 {
157362306a36Sopenharmony_ci					ti,mbox-send-noirq;
157462306a36Sopenharmony_ci					ti,mbox-tx = <0 0 0>;
157562306a36Sopenharmony_ci					ti,mbox-rx = <0 0 3>;
157662306a36Sopenharmony_ci				};
157762306a36Sopenharmony_ci			};
157862306a36Sopenharmony_ci		};
157962306a36Sopenharmony_ci
158062306a36Sopenharmony_ci		target-module@ca000 {			/* 0x480ca000, ap 91 40.0 */
158162306a36Sopenharmony_ci			compatible = "ti,sysc-omap2", "ti,sysc";
158262306a36Sopenharmony_ci			reg = <0xca000 0x4>,
158362306a36Sopenharmony_ci			      <0xca010 0x4>,
158462306a36Sopenharmony_ci			      <0xca014 0x4>;
158562306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
158662306a36Sopenharmony_ci			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
158762306a36Sopenharmony_ci					 SYSC_OMAP2_ENAWAKEUP |
158862306a36Sopenharmony_ci					 SYSC_OMAP2_SOFTRESET |
158962306a36Sopenharmony_ci					 SYSC_OMAP2_AUTOIDLE)>;
159062306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
159162306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
159262306a36Sopenharmony_ci					<SYSC_IDLE_SMART>;
159362306a36Sopenharmony_ci			ti,syss-mask = <1>;
159462306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
159562306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_SPINLOCK_CLKCTRL 0>;
159662306a36Sopenharmony_ci			clock-names = "fck";
159762306a36Sopenharmony_ci			#address-cells = <1>;
159862306a36Sopenharmony_ci			#size-cells = <1>;
159962306a36Sopenharmony_ci			ranges = <0x0 0xca000 0x1000>;
160062306a36Sopenharmony_ci
160162306a36Sopenharmony_ci			hwspinlock: spinlock@0 {
160262306a36Sopenharmony_ci				compatible = "ti,omap4-hwspinlock";
160362306a36Sopenharmony_ci				reg = <0x0 0x1000>;
160462306a36Sopenharmony_ci				#hwlock-cells = <1>;
160562306a36Sopenharmony_ci			};
160662306a36Sopenharmony_ci		};
160762306a36Sopenharmony_ci
160862306a36Sopenharmony_ci		target-module@cc000 {			/* 0x480cc000, ap 89 0e.0 */
160962306a36Sopenharmony_ci			compatible = "ti,sysc";
161062306a36Sopenharmony_ci			status = "disabled";
161162306a36Sopenharmony_ci			#address-cells = <1>;
161262306a36Sopenharmony_ci			#size-cells = <1>;
161362306a36Sopenharmony_ci			ranges = <0x0 0xcc000 0x1000>;
161462306a36Sopenharmony_ci		};
161562306a36Sopenharmony_ci	};
161662306a36Sopenharmony_ci
161762306a36Sopenharmony_ci	segment@100000 {					/* 0x48100000 */
161862306a36Sopenharmony_ci		compatible = "simple-pm-bus";
161962306a36Sopenharmony_ci		#address-cells = <1>;
162062306a36Sopenharmony_ci		#size-cells = <1>;
162162306a36Sopenharmony_ci		ranges = <0x0008c000 0x0018c000 0x001000>,	/* ap 42 */
162262306a36Sopenharmony_ci			 <0x0008d000 0x0018d000 0x001000>,	/* ap 43 */
162362306a36Sopenharmony_ci			 <0x0008e000 0x0018e000 0x001000>,	/* ap 44 */
162462306a36Sopenharmony_ci			 <0x0008f000 0x0018f000 0x001000>,	/* ap 45 */
162562306a36Sopenharmony_ci			 <0x0009c000 0x0019c000 0x001000>,	/* ap 46 */
162662306a36Sopenharmony_ci			 <0x0009d000 0x0019d000 0x001000>,	/* ap 47 */
162762306a36Sopenharmony_ci			 <0x000a6000 0x001a6000 0x001000>,	/* ap 48 */
162862306a36Sopenharmony_ci			 <0x000a7000 0x001a7000 0x001000>,	/* ap 49 */
162962306a36Sopenharmony_ci			 <0x000a8000 0x001a8000 0x001000>,	/* ap 50 */
163062306a36Sopenharmony_ci			 <0x000a9000 0x001a9000 0x001000>,	/* ap 51 */
163162306a36Sopenharmony_ci			 <0x000aa000 0x001aa000 0x001000>,	/* ap 52 */
163262306a36Sopenharmony_ci			 <0x000ab000 0x001ab000 0x001000>,	/* ap 53 */
163362306a36Sopenharmony_ci			 <0x000ac000 0x001ac000 0x001000>,	/* ap 54 */
163462306a36Sopenharmony_ci			 <0x000ad000 0x001ad000 0x001000>,	/* ap 55 */
163562306a36Sopenharmony_ci			 <0x000ae000 0x001ae000 0x001000>,	/* ap 56 */
163662306a36Sopenharmony_ci			 <0x000af000 0x001af000 0x001000>,	/* ap 57 */
163762306a36Sopenharmony_ci			 <0x000b0000 0x001b0000 0x010000>,	/* ap 58 */
163862306a36Sopenharmony_ci			 <0x000c0000 0x001c0000 0x001000>,	/* ap 59 */
163962306a36Sopenharmony_ci			 <0x000cc000 0x001cc000 0x002000>,	/* ap 60 */
164062306a36Sopenharmony_ci			 <0x000ce000 0x001ce000 0x002000>,	/* ap 61 */
164162306a36Sopenharmony_ci			 <0x000d0000 0x001d0000 0x002000>,	/* ap 62 */
164262306a36Sopenharmony_ci			 <0x000d2000 0x001d2000 0x002000>,	/* ap 63 */
164362306a36Sopenharmony_ci			 <0x000d8000 0x001d8000 0x001000>,	/* ap 64 */
164462306a36Sopenharmony_ci			 <0x000d9000 0x001d9000 0x001000>,	/* ap 65 */
164562306a36Sopenharmony_ci			 <0x000a0000 0x001a0000 0x001000>,	/* ap 79 */
164662306a36Sopenharmony_ci			 <0x000a1000 0x001a1000 0x001000>,	/* ap 80 */
164762306a36Sopenharmony_ci			 <0x000a2000 0x001a2000 0x001000>,	/* ap 81 */
164862306a36Sopenharmony_ci			 <0x000a3000 0x001a3000 0x001000>,	/* ap 82 */
164962306a36Sopenharmony_ci			 <0x000a4000 0x001a4000 0x001000>,	/* ap 83 */
165062306a36Sopenharmony_ci			 <0x000a5000 0x001a5000 0x001000>;	/* ap 84 */
165162306a36Sopenharmony_ci
165262306a36Sopenharmony_ci		target-module@8c000 {			/* 0x4818c000, ap 42 04.0 */
165362306a36Sopenharmony_ci			compatible = "ti,sysc";
165462306a36Sopenharmony_ci			status = "disabled";
165562306a36Sopenharmony_ci			#address-cells = <1>;
165662306a36Sopenharmony_ci			#size-cells = <1>;
165762306a36Sopenharmony_ci			ranges = <0x0 0x8c000 0x1000>;
165862306a36Sopenharmony_ci		};
165962306a36Sopenharmony_ci
166062306a36Sopenharmony_ci		target-module@8e000 {			/* 0x4818e000, ap 44 0a.0 */
166162306a36Sopenharmony_ci			compatible = "ti,sysc";
166262306a36Sopenharmony_ci			status = "disabled";
166362306a36Sopenharmony_ci			#address-cells = <1>;
166462306a36Sopenharmony_ci			#size-cells = <1>;
166562306a36Sopenharmony_ci			ranges = <0x0 0x8e000 0x1000>;
166662306a36Sopenharmony_ci		};
166762306a36Sopenharmony_ci
166862306a36Sopenharmony_ci		target-module@9c000 {			/* 0x4819c000, ap 46 5a.0 */
166962306a36Sopenharmony_ci			compatible = "ti,sysc-omap2", "ti,sysc";
167062306a36Sopenharmony_ci			reg = <0x9c000 0x8>,
167162306a36Sopenharmony_ci			      <0x9c010 0x8>,
167262306a36Sopenharmony_ci			      <0x9c090 0x8>;
167362306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
167462306a36Sopenharmony_ci			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
167562306a36Sopenharmony_ci					 SYSC_OMAP2_ENAWAKEUP |
167662306a36Sopenharmony_ci					 SYSC_OMAP2_SOFTRESET |
167762306a36Sopenharmony_ci					 SYSC_OMAP2_AUTOIDLE)>;
167862306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
167962306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
168062306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
168162306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
168262306a36Sopenharmony_ci			ti,syss-mask = <1>;
168362306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
168462306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_I2C3_CLKCTRL 0>;
168562306a36Sopenharmony_ci			clock-names = "fck";
168662306a36Sopenharmony_ci			#address-cells = <1>;
168762306a36Sopenharmony_ci			#size-cells = <1>;
168862306a36Sopenharmony_ci			ranges = <0x0 0x9c000 0x1000>;
168962306a36Sopenharmony_ci
169062306a36Sopenharmony_ci			i2c2: i2c@0 {
169162306a36Sopenharmony_ci				compatible = "ti,omap4-i2c";
169262306a36Sopenharmony_ci				#address-cells = <1>;
169362306a36Sopenharmony_ci				#size-cells = <0>;
169462306a36Sopenharmony_ci				reg = <0x0 0x1000>;
169562306a36Sopenharmony_ci				interrupts = <30>;
169662306a36Sopenharmony_ci				status = "disabled";
169762306a36Sopenharmony_ci			};
169862306a36Sopenharmony_ci		};
169962306a36Sopenharmony_ci
170062306a36Sopenharmony_ci		target-module@a0000 {			/* 0x481a0000, ap 79 24.0 */
170162306a36Sopenharmony_ci			compatible = "ti,sysc-omap2", "ti,sysc";
170262306a36Sopenharmony_ci			reg = <0xa0000 0x4>,
170362306a36Sopenharmony_ci			      <0xa0110 0x4>,
170462306a36Sopenharmony_ci			      <0xa0114 0x4>;
170562306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
170662306a36Sopenharmony_ci			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
170762306a36Sopenharmony_ci					 SYSC_OMAP2_SOFTRESET |
170862306a36Sopenharmony_ci					 SYSC_OMAP2_AUTOIDLE)>;
170962306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
171062306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
171162306a36Sopenharmony_ci					<SYSC_IDLE_SMART>;
171262306a36Sopenharmony_ci			ti,syss-mask = <1>;
171362306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
171462306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_SPI1_CLKCTRL 0>;
171562306a36Sopenharmony_ci			clock-names = "fck";
171662306a36Sopenharmony_ci			#address-cells = <1>;
171762306a36Sopenharmony_ci			#size-cells = <1>;
171862306a36Sopenharmony_ci			ranges = <0x0 0xa0000 0x1000>;
171962306a36Sopenharmony_ci
172062306a36Sopenharmony_ci			spi1: spi@0 {
172162306a36Sopenharmony_ci				compatible = "ti,omap4-mcspi";
172262306a36Sopenharmony_ci				#address-cells = <1>;
172362306a36Sopenharmony_ci				#size-cells = <0>;
172462306a36Sopenharmony_ci				reg = <0x0 0x400>;
172562306a36Sopenharmony_ci				interrupts = <125>;
172662306a36Sopenharmony_ci				ti,spi-num-cs = <2>;
172762306a36Sopenharmony_ci				dmas = <&edma 42 0
172862306a36Sopenharmony_ci					&edma 43 0
172962306a36Sopenharmony_ci					&edma 44 0
173062306a36Sopenharmony_ci					&edma 45 0>;
173162306a36Sopenharmony_ci				dma-names = "tx0", "rx0", "tx1", "rx1";
173262306a36Sopenharmony_ci				status = "disabled";
173362306a36Sopenharmony_ci			};
173462306a36Sopenharmony_ci		};
173562306a36Sopenharmony_ci
173662306a36Sopenharmony_ci		target-module@a2000 {			/* 0x481a2000, ap 81 2e.0 */
173762306a36Sopenharmony_ci			compatible = "ti,sysc";
173862306a36Sopenharmony_ci			status = "disabled";
173962306a36Sopenharmony_ci			#address-cells = <1>;
174062306a36Sopenharmony_ci			#size-cells = <1>;
174162306a36Sopenharmony_ci			ranges = <0x0 0xa2000 0x1000>;
174262306a36Sopenharmony_ci		};
174362306a36Sopenharmony_ci
174462306a36Sopenharmony_ci		target-module@a4000 {			/* 0x481a4000, ap 83 30.0 */
174562306a36Sopenharmony_ci			compatible = "ti,sysc";
174662306a36Sopenharmony_ci			status = "disabled";
174762306a36Sopenharmony_ci			#address-cells = <1>;
174862306a36Sopenharmony_ci			#size-cells = <1>;
174962306a36Sopenharmony_ci			ranges = <0x0 0xa4000 0x1000>;
175062306a36Sopenharmony_ci		};
175162306a36Sopenharmony_ci
175262306a36Sopenharmony_ci		target-module@a6000 {			/* 0x481a6000, ap 48 16.0 */
175362306a36Sopenharmony_ci			compatible = "ti,sysc-omap2", "ti,sysc";
175462306a36Sopenharmony_ci			reg = <0xa6050 0x4>,
175562306a36Sopenharmony_ci			      <0xa6054 0x4>,
175662306a36Sopenharmony_ci			      <0xa6058 0x4>;
175762306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
175862306a36Sopenharmony_ci			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
175962306a36Sopenharmony_ci					 SYSC_OMAP2_SOFTRESET |
176062306a36Sopenharmony_ci					 SYSC_OMAP2_AUTOIDLE)>;
176162306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
176262306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
176362306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
176462306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
176562306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
176662306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_UART4_CLKCTRL 0>;
176762306a36Sopenharmony_ci			clock-names = "fck";
176862306a36Sopenharmony_ci			#address-cells = <1>;
176962306a36Sopenharmony_ci			#size-cells = <1>;
177062306a36Sopenharmony_ci			ranges = <0x0 0xa6000 0x1000>;
177162306a36Sopenharmony_ci
177262306a36Sopenharmony_ci			uart3: serial@0 {
177362306a36Sopenharmony_ci				compatible = "ti,am3352-uart", "ti,omap3-uart";
177462306a36Sopenharmony_ci				clock-frequency = <48000000>;
177562306a36Sopenharmony_ci				reg = <0x0 0x1000>;
177662306a36Sopenharmony_ci				interrupts = <44>;
177762306a36Sopenharmony_ci				status = "disabled";
177862306a36Sopenharmony_ci			};
177962306a36Sopenharmony_ci		};
178062306a36Sopenharmony_ci
178162306a36Sopenharmony_ci		target-module@a8000 {			/* 0x481a8000, ap 50 20.0 */
178262306a36Sopenharmony_ci			compatible = "ti,sysc-omap2", "ti,sysc";
178362306a36Sopenharmony_ci			reg = <0xa8050 0x4>,
178462306a36Sopenharmony_ci			      <0xa8054 0x4>,
178562306a36Sopenharmony_ci			      <0xa8058 0x4>;
178662306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
178762306a36Sopenharmony_ci			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
178862306a36Sopenharmony_ci					 SYSC_OMAP2_SOFTRESET |
178962306a36Sopenharmony_ci					 SYSC_OMAP2_AUTOIDLE)>;
179062306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
179162306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
179262306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
179362306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
179462306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
179562306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_UART5_CLKCTRL 0>;
179662306a36Sopenharmony_ci			clock-names = "fck";
179762306a36Sopenharmony_ci			#address-cells = <1>;
179862306a36Sopenharmony_ci			#size-cells = <1>;
179962306a36Sopenharmony_ci			ranges = <0x0 0xa8000 0x1000>;
180062306a36Sopenharmony_ci
180162306a36Sopenharmony_ci			uart4: serial@0 {
180262306a36Sopenharmony_ci				compatible = "ti,am3352-uart", "ti,omap3-uart";
180362306a36Sopenharmony_ci				clock-frequency = <48000000>;
180462306a36Sopenharmony_ci				reg = <0x0 0x1000>;
180562306a36Sopenharmony_ci				interrupts = <45>;
180662306a36Sopenharmony_ci				status = "disabled";
180762306a36Sopenharmony_ci			};
180862306a36Sopenharmony_ci		};
180962306a36Sopenharmony_ci
181062306a36Sopenharmony_ci		target-module@aa000 {			/* 0x481aa000, ap 52 1a.0 */
181162306a36Sopenharmony_ci			compatible = "ti,sysc-omap2", "ti,sysc";
181262306a36Sopenharmony_ci			reg = <0xaa050 0x4>,
181362306a36Sopenharmony_ci			      <0xaa054 0x4>,
181462306a36Sopenharmony_ci			      <0xaa058 0x4>;
181562306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
181662306a36Sopenharmony_ci			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
181762306a36Sopenharmony_ci					 SYSC_OMAP2_SOFTRESET |
181862306a36Sopenharmony_ci					 SYSC_OMAP2_AUTOIDLE)>;
181962306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
182062306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
182162306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
182262306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
182362306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
182462306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_UART6_CLKCTRL 0>;
182562306a36Sopenharmony_ci			clock-names = "fck";
182662306a36Sopenharmony_ci			#address-cells = <1>;
182762306a36Sopenharmony_ci			#size-cells = <1>;
182862306a36Sopenharmony_ci			ranges = <0x0 0xaa000 0x1000>;
182962306a36Sopenharmony_ci
183062306a36Sopenharmony_ci			uart5: serial@0 {
183162306a36Sopenharmony_ci				compatible = "ti,am3352-uart", "ti,omap3-uart";
183262306a36Sopenharmony_ci				clock-frequency = <48000000>;
183362306a36Sopenharmony_ci				reg = <0x0 0x1000>;
183462306a36Sopenharmony_ci				interrupts = <46>;
183562306a36Sopenharmony_ci				status = "disabled";
183662306a36Sopenharmony_ci			};
183762306a36Sopenharmony_ci		};
183862306a36Sopenharmony_ci
183962306a36Sopenharmony_ci		target-module@ac000 {			/* 0x481ac000, ap 54 38.0 */
184062306a36Sopenharmony_ci			compatible = "ti,sysc-omap2", "ti,sysc";
184162306a36Sopenharmony_ci			reg = <0xac000 0x4>,
184262306a36Sopenharmony_ci			      <0xac010 0x4>,
184362306a36Sopenharmony_ci			      <0xac114 0x4>;
184462306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
184562306a36Sopenharmony_ci			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
184662306a36Sopenharmony_ci					 SYSC_OMAP2_SOFTRESET |
184762306a36Sopenharmony_ci					 SYSC_OMAP2_AUTOIDLE)>;
184862306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
184962306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
185062306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
185162306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
185262306a36Sopenharmony_ci			ti,syss-mask = <1>;
185362306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
185462306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_GPIO3_CLKCTRL 0>,
185562306a36Sopenharmony_ci				 <&l4ls_clkctrl AM3_L4LS_GPIO3_CLKCTRL 18>;
185662306a36Sopenharmony_ci			clock-names = "fck", "dbclk";
185762306a36Sopenharmony_ci			#address-cells = <1>;
185862306a36Sopenharmony_ci			#size-cells = <1>;
185962306a36Sopenharmony_ci			ranges = <0x0 0xac000 0x1000>;
186062306a36Sopenharmony_ci
186162306a36Sopenharmony_ci			gpio2: gpio@0 {
186262306a36Sopenharmony_ci				compatible = "ti,omap4-gpio";
186362306a36Sopenharmony_ci                                gpio-ranges =	<&am33xx_pinmux  0 34 18>,
186462306a36Sopenharmony_ci						<&am33xx_pinmux 18 77  4>,
186562306a36Sopenharmony_ci						<&am33xx_pinmux 22 56 10>;
186662306a36Sopenharmony_ci				gpio-controller;
186762306a36Sopenharmony_ci				#gpio-cells = <2>;
186862306a36Sopenharmony_ci				interrupt-controller;
186962306a36Sopenharmony_ci				#interrupt-cells = <2>;
187062306a36Sopenharmony_ci				reg = <0x0 0x1000>;
187162306a36Sopenharmony_ci				interrupts = <32>;
187262306a36Sopenharmony_ci			};
187362306a36Sopenharmony_ci		};
187462306a36Sopenharmony_ci
187562306a36Sopenharmony_ci		gpio3_target: target-module@ae000 {		/* 0x481ae000, ap 56 3a.0 */
187662306a36Sopenharmony_ci			compatible = "ti,sysc-omap2", "ti,sysc";
187762306a36Sopenharmony_ci			reg = <0xae000 0x4>,
187862306a36Sopenharmony_ci			      <0xae010 0x4>,
187962306a36Sopenharmony_ci			      <0xae114 0x4>;
188062306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
188162306a36Sopenharmony_ci			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
188262306a36Sopenharmony_ci					 SYSC_OMAP2_SOFTRESET |
188362306a36Sopenharmony_ci					 SYSC_OMAP2_AUTOIDLE)>;
188462306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
188562306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
188662306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
188762306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
188862306a36Sopenharmony_ci			ti,syss-mask = <1>;
188962306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
189062306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_GPIO4_CLKCTRL 0>,
189162306a36Sopenharmony_ci				 <&l4ls_clkctrl AM3_L4LS_GPIO4_CLKCTRL 18>;
189262306a36Sopenharmony_ci			clock-names = "fck", "dbclk";
189362306a36Sopenharmony_ci			#address-cells = <1>;
189462306a36Sopenharmony_ci			#size-cells = <1>;
189562306a36Sopenharmony_ci			ranges = <0x0 0xae000 0x1000>;
189662306a36Sopenharmony_ci
189762306a36Sopenharmony_ci			gpio3: gpio@0 {
189862306a36Sopenharmony_ci				compatible = "ti,omap4-gpio";
189962306a36Sopenharmony_ci				gpio-ranges =	<&am33xx_pinmux  0  66 5>,
190062306a36Sopenharmony_ci						<&am33xx_pinmux  5  98 2>,
190162306a36Sopenharmony_ci						<&am33xx_pinmux  7  75 2>,
190262306a36Sopenharmony_ci						<&am33xx_pinmux 13 141 1>,
190362306a36Sopenharmony_ci						<&am33xx_pinmux 14 100 8>;
190462306a36Sopenharmony_ci				gpio-controller;
190562306a36Sopenharmony_ci				#gpio-cells = <2>;
190662306a36Sopenharmony_ci				interrupt-controller;
190762306a36Sopenharmony_ci				#interrupt-cells = <2>;
190862306a36Sopenharmony_ci				reg = <0x0 0x1000>;
190962306a36Sopenharmony_ci				interrupts = <62>;
191062306a36Sopenharmony_ci			};
191162306a36Sopenharmony_ci		};
191262306a36Sopenharmony_ci
191362306a36Sopenharmony_ci		target-module@b0000 {			/* 0x481b0000, ap 58 50.0 */
191462306a36Sopenharmony_ci			compatible = "ti,sysc";
191562306a36Sopenharmony_ci			status = "disabled";
191662306a36Sopenharmony_ci			#address-cells = <1>;
191762306a36Sopenharmony_ci			#size-cells = <1>;
191862306a36Sopenharmony_ci			ranges = <0x0 0xb0000 0x10000>;
191962306a36Sopenharmony_ci		};
192062306a36Sopenharmony_ci
192162306a36Sopenharmony_ci		target-module@cc000 {			/* 0x481cc000, ap 60 46.0 */
192262306a36Sopenharmony_ci			compatible = "ti,sysc-omap4", "ti,sysc";
192362306a36Sopenharmony_ci			reg = <0xcc020 0x4>;
192462306a36Sopenharmony_ci			reg-names = "rev";
192562306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
192662306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN0_CLKCTRL 0>,
192762306a36Sopenharmony_ci				 <&dcan0_fck>;
192862306a36Sopenharmony_ci			clock-names = "fck", "osc";
192962306a36Sopenharmony_ci			#address-cells = <1>;
193062306a36Sopenharmony_ci			#size-cells = <1>;
193162306a36Sopenharmony_ci			ranges = <0x0 0xcc000 0x2000>;
193262306a36Sopenharmony_ci
193362306a36Sopenharmony_ci			dcan0: can@0 {
193462306a36Sopenharmony_ci				compatible = "ti,am3352-d_can";
193562306a36Sopenharmony_ci				reg = <0x0 0x2000>;
193662306a36Sopenharmony_ci				clocks = <&dcan0_fck>;
193762306a36Sopenharmony_ci				clock-names = "fck";
193862306a36Sopenharmony_ci				syscon-raminit = <&scm_conf 0x644 0>;
193962306a36Sopenharmony_ci				interrupts = <52>;
194062306a36Sopenharmony_ci				status = "disabled";
194162306a36Sopenharmony_ci			};
194262306a36Sopenharmony_ci		};
194362306a36Sopenharmony_ci
194462306a36Sopenharmony_ci		target-module@d0000 {			/* 0x481d0000, ap 62 42.0 */
194562306a36Sopenharmony_ci			compatible = "ti,sysc-omap4", "ti,sysc";
194662306a36Sopenharmony_ci			reg = <0xd0020 0x4>;
194762306a36Sopenharmony_ci			reg-names = "rev";
194862306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
194962306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN1_CLKCTRL 0>,
195062306a36Sopenharmony_ci				 <&dcan1_fck>;
195162306a36Sopenharmony_ci			clock-names = "fck", "osc";
195262306a36Sopenharmony_ci			#address-cells = <1>;
195362306a36Sopenharmony_ci			#size-cells = <1>;
195462306a36Sopenharmony_ci			ranges = <0x0 0xd0000 0x2000>;
195562306a36Sopenharmony_ci
195662306a36Sopenharmony_ci			dcan1: can@0 {
195762306a36Sopenharmony_ci				compatible = "ti,am3352-d_can";
195862306a36Sopenharmony_ci				reg = <0x0 0x2000>;
195962306a36Sopenharmony_ci				clocks = <&dcan1_fck>;
196062306a36Sopenharmony_ci				clock-names = "fck";
196162306a36Sopenharmony_ci				syscon-raminit = <&scm_conf 0x644 1>;
196262306a36Sopenharmony_ci				interrupts = <55>;
196362306a36Sopenharmony_ci				status = "disabled";
196462306a36Sopenharmony_ci			};
196562306a36Sopenharmony_ci		};
196662306a36Sopenharmony_ci
196762306a36Sopenharmony_ci		target-module@d8000 {			/* 0x481d8000, ap 64 66.0 */
196862306a36Sopenharmony_ci			compatible = "ti,sysc-omap2", "ti,sysc";
196962306a36Sopenharmony_ci			reg = <0xd82fc 0x4>,
197062306a36Sopenharmony_ci			      <0xd8110 0x4>,
197162306a36Sopenharmony_ci			      <0xd8114 0x4>;
197262306a36Sopenharmony_ci			reg-names = "rev", "sysc", "syss";
197362306a36Sopenharmony_ci			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
197462306a36Sopenharmony_ci					 SYSC_OMAP2_ENAWAKEUP |
197562306a36Sopenharmony_ci					 SYSC_OMAP2_SOFTRESET |
197662306a36Sopenharmony_ci					 SYSC_OMAP2_AUTOIDLE)>;
197762306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
197862306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
197962306a36Sopenharmony_ci					<SYSC_IDLE_SMART>;
198062306a36Sopenharmony_ci			ti,syss-mask = <1>;
198162306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
198262306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_MMC2_CLKCTRL 0>;
198362306a36Sopenharmony_ci			clock-names = "fck";
198462306a36Sopenharmony_ci			#address-cells = <1>;
198562306a36Sopenharmony_ci			#size-cells = <1>;
198662306a36Sopenharmony_ci			ranges = <0x0 0xd8000 0x1000>;
198762306a36Sopenharmony_ci
198862306a36Sopenharmony_ci			mmc2: mmc@0 {
198962306a36Sopenharmony_ci				compatible = "ti,am335-sdhci";
199062306a36Sopenharmony_ci				ti,needs-special-reset;
199162306a36Sopenharmony_ci				dmas = <&edma 2 0
199262306a36Sopenharmony_ci					&edma 3 0>;
199362306a36Sopenharmony_ci				dma-names = "tx", "rx";
199462306a36Sopenharmony_ci				interrupts = <28>;
199562306a36Sopenharmony_ci				reg = <0x0 0x1000>;
199662306a36Sopenharmony_ci				status = "disabled";
199762306a36Sopenharmony_ci			};
199862306a36Sopenharmony_ci		};
199962306a36Sopenharmony_ci	};
200062306a36Sopenharmony_ci
200162306a36Sopenharmony_ci	segment@200000 {					/* 0x48200000 */
200262306a36Sopenharmony_ci		compatible = "simple-pm-bus";
200362306a36Sopenharmony_ci		#address-cells = <1>;
200462306a36Sopenharmony_ci		#size-cells = <1>;
200562306a36Sopenharmony_ci		ranges = <0x00000000 0x00200000 0x010000>;
200662306a36Sopenharmony_ci
200762306a36Sopenharmony_ci		target-module@0 {
200862306a36Sopenharmony_ci			compatible = "ti,sysc-omap4-simple", "ti,sysc";
200962306a36Sopenharmony_ci			power-domains = <&prm_mpu>;
201062306a36Sopenharmony_ci			clocks = <&mpu_clkctrl AM3_MPU_MPU_CLKCTRL 0>;
201162306a36Sopenharmony_ci			clock-names = "fck";
201262306a36Sopenharmony_ci			ti,no-idle;
201362306a36Sopenharmony_ci			#address-cells = <1>;
201462306a36Sopenharmony_ci			#size-cells = <1>;
201562306a36Sopenharmony_ci			ranges = <0 0 0x10000>;
201662306a36Sopenharmony_ci
201762306a36Sopenharmony_ci			mpu@0 {
201862306a36Sopenharmony_ci				compatible = "ti,omap3-mpu";
201962306a36Sopenharmony_ci				pm-sram = <&pm_sram_code
202062306a36Sopenharmony_ci					   &pm_sram_data>;
202162306a36Sopenharmony_ci			};
202262306a36Sopenharmony_ci		};
202362306a36Sopenharmony_ci	};
202462306a36Sopenharmony_ci
202562306a36Sopenharmony_ci	segment@300000 {					/* 0x48300000 */
202662306a36Sopenharmony_ci		compatible = "simple-pm-bus";
202762306a36Sopenharmony_ci		#address-cells = <1>;
202862306a36Sopenharmony_ci		#size-cells = <1>;
202962306a36Sopenharmony_ci		ranges = <0x00000000 0x00300000 0x001000>,	/* ap 66 */
203062306a36Sopenharmony_ci			 <0x00001000 0x00301000 0x001000>,	/* ap 67 */
203162306a36Sopenharmony_ci			 <0x00002000 0x00302000 0x001000>,	/* ap 68 */
203262306a36Sopenharmony_ci			 <0x00003000 0x00303000 0x001000>,	/* ap 69 */
203362306a36Sopenharmony_ci			 <0x00004000 0x00304000 0x001000>,	/* ap 70 */
203462306a36Sopenharmony_ci			 <0x00005000 0x00305000 0x001000>,	/* ap 71 */
203562306a36Sopenharmony_ci			 <0x0000e000 0x0030e000 0x001000>,	/* ap 72 */
203662306a36Sopenharmony_ci			 <0x0000f000 0x0030f000 0x001000>,	/* ap 73 */
203762306a36Sopenharmony_ci			 <0x00018000 0x00318000 0x004000>,	/* ap 74 */
203862306a36Sopenharmony_ci			 <0x0001c000 0x0031c000 0x001000>,	/* ap 75 */
203962306a36Sopenharmony_ci			 <0x00010000 0x00310000 0x002000>,	/* ap 76 */
204062306a36Sopenharmony_ci			 <0x00012000 0x00312000 0x001000>,	/* ap 93 */
204162306a36Sopenharmony_ci			 <0x00015000 0x00315000 0x001000>,	/* ap 94 */
204262306a36Sopenharmony_ci			 <0x00016000 0x00316000 0x001000>,	/* ap 95 */
204362306a36Sopenharmony_ci			 <0x00017000 0x00317000 0x001000>,	/* ap 96 */
204462306a36Sopenharmony_ci			 <0x00013000 0x00313000 0x001000>,	/* ap 97 */
204562306a36Sopenharmony_ci			 <0x00014000 0x00314000 0x001000>,	/* ap 98 */
204662306a36Sopenharmony_ci			 <0x00020000 0x00320000 0x001000>,	/* ap 99 */
204762306a36Sopenharmony_ci			 <0x00021000 0x00321000 0x001000>,	/* ap 100 */
204862306a36Sopenharmony_ci			 <0x00022000 0x00322000 0x001000>,	/* ap 101 */
204962306a36Sopenharmony_ci			 <0x00023000 0x00323000 0x001000>,	/* ap 102 */
205062306a36Sopenharmony_ci			 <0x00024000 0x00324000 0x001000>,	/* ap 103 */
205162306a36Sopenharmony_ci			 <0x00025000 0x00325000 0x001000>;	/* ap 104 */
205262306a36Sopenharmony_ci
205362306a36Sopenharmony_ci		target-module@0 {			/* 0x48300000, ap 66 48.0 */
205462306a36Sopenharmony_ci			compatible = "ti,sysc-omap4", "ti,sysc";
205562306a36Sopenharmony_ci			reg = <0x0 0x4>,
205662306a36Sopenharmony_ci			      <0x4 0x4>;
205762306a36Sopenharmony_ci			reg-names = "rev", "sysc";
205862306a36Sopenharmony_ci			ti,sysc-midle = <SYSC_IDLE_FORCE>,
205962306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
206062306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
206162306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
206262306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
206362306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
206462306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
206562306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
206662306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
206762306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_EPWMSS0_CLKCTRL 0>;
206862306a36Sopenharmony_ci			clock-names = "fck";
206962306a36Sopenharmony_ci			#address-cells = <1>;
207062306a36Sopenharmony_ci			#size-cells = <1>;
207162306a36Sopenharmony_ci			ranges = <0x0 0x0 0x1000>;
207262306a36Sopenharmony_ci
207362306a36Sopenharmony_ci			epwmss0: epwmss@0 {
207462306a36Sopenharmony_ci				compatible = "ti,am33xx-pwmss";
207562306a36Sopenharmony_ci				reg = <0x0 0x10>;
207662306a36Sopenharmony_ci				#address-cells = <1>;
207762306a36Sopenharmony_ci				#size-cells = <1>;
207862306a36Sopenharmony_ci				status = "disabled";
207962306a36Sopenharmony_ci				ranges = <0 0 0x1000>;
208062306a36Sopenharmony_ci
208162306a36Sopenharmony_ci				ecap0: pwm@100 {
208262306a36Sopenharmony_ci					compatible = "ti,am3352-ecap";
208362306a36Sopenharmony_ci					#pwm-cells = <3>;
208462306a36Sopenharmony_ci					reg = <0x100 0x80>;
208562306a36Sopenharmony_ci					clocks = <&l4ls_gclk>;
208662306a36Sopenharmony_ci					clock-names = "fck";
208762306a36Sopenharmony_ci					status = "disabled";
208862306a36Sopenharmony_ci				};
208962306a36Sopenharmony_ci
209062306a36Sopenharmony_ci				eqep0: counter@180 {
209162306a36Sopenharmony_ci					compatible = "ti,am3352-eqep";
209262306a36Sopenharmony_ci					reg = <0x180 0x80>;
209362306a36Sopenharmony_ci					clocks = <&l4ls_gclk>;
209462306a36Sopenharmony_ci					clock-names = "sysclkout";
209562306a36Sopenharmony_ci					interrupts = <79>;
209662306a36Sopenharmony_ci					status = "disabled";
209762306a36Sopenharmony_ci				};
209862306a36Sopenharmony_ci
209962306a36Sopenharmony_ci				ehrpwm0: pwm@200 {
210062306a36Sopenharmony_ci					compatible = "ti,am3352-ehrpwm";
210162306a36Sopenharmony_ci					#pwm-cells = <3>;
210262306a36Sopenharmony_ci					reg = <0x200 0x80>;
210362306a36Sopenharmony_ci					clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
210462306a36Sopenharmony_ci					clock-names = "tbclk", "fck";
210562306a36Sopenharmony_ci					status = "disabled";
210662306a36Sopenharmony_ci				};
210762306a36Sopenharmony_ci			};
210862306a36Sopenharmony_ci		};
210962306a36Sopenharmony_ci
211062306a36Sopenharmony_ci		target-module@2000 {			/* 0x48302000, ap 68 52.0 */
211162306a36Sopenharmony_ci			compatible = "ti,sysc-omap4", "ti,sysc";
211262306a36Sopenharmony_ci			reg = <0x2000 0x4>,
211362306a36Sopenharmony_ci			      <0x2004 0x4>;
211462306a36Sopenharmony_ci			reg-names = "rev", "sysc";
211562306a36Sopenharmony_ci			ti,sysc-midle = <SYSC_IDLE_FORCE>,
211662306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
211762306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
211862306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
211962306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
212062306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
212162306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
212262306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
212362306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
212462306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_EPWMSS1_CLKCTRL 0>;
212562306a36Sopenharmony_ci			clock-names = "fck";
212662306a36Sopenharmony_ci			#address-cells = <1>;
212762306a36Sopenharmony_ci			#size-cells = <1>;
212862306a36Sopenharmony_ci			ranges = <0x0 0x2000 0x1000>;
212962306a36Sopenharmony_ci
213062306a36Sopenharmony_ci			epwmss1: epwmss@0 {
213162306a36Sopenharmony_ci				compatible = "ti,am33xx-pwmss";
213262306a36Sopenharmony_ci				reg = <0x0 0x10>;
213362306a36Sopenharmony_ci				#address-cells = <1>;
213462306a36Sopenharmony_ci				#size-cells = <1>;
213562306a36Sopenharmony_ci				status = "disabled";
213662306a36Sopenharmony_ci				ranges = <0 0 0x1000>;
213762306a36Sopenharmony_ci
213862306a36Sopenharmony_ci				ecap1: pwm@100 {
213962306a36Sopenharmony_ci					compatible = "ti,am3352-ecap";
214062306a36Sopenharmony_ci					#pwm-cells = <3>;
214162306a36Sopenharmony_ci					reg = <0x100 0x80>;
214262306a36Sopenharmony_ci					clocks = <&l4ls_gclk>;
214362306a36Sopenharmony_ci					clock-names = "fck";
214462306a36Sopenharmony_ci					status = "disabled";
214562306a36Sopenharmony_ci				};
214662306a36Sopenharmony_ci
214762306a36Sopenharmony_ci				eqep1: counter@180 {
214862306a36Sopenharmony_ci					compatible = "ti,am3352-eqep";
214962306a36Sopenharmony_ci					reg = <0x180 0x80>;
215062306a36Sopenharmony_ci					clocks = <&l4ls_gclk>;
215162306a36Sopenharmony_ci					clock-names = "sysclkout";
215262306a36Sopenharmony_ci					interrupts = <88>;
215362306a36Sopenharmony_ci					status = "disabled";
215462306a36Sopenharmony_ci				};
215562306a36Sopenharmony_ci
215662306a36Sopenharmony_ci				ehrpwm1: pwm@200 {
215762306a36Sopenharmony_ci					compatible = "ti,am3352-ehrpwm";
215862306a36Sopenharmony_ci					#pwm-cells = <3>;
215962306a36Sopenharmony_ci					reg = <0x200 0x80>;
216062306a36Sopenharmony_ci					clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
216162306a36Sopenharmony_ci					clock-names = "tbclk", "fck";
216262306a36Sopenharmony_ci					status = "disabled";
216362306a36Sopenharmony_ci				};
216462306a36Sopenharmony_ci			};
216562306a36Sopenharmony_ci		};
216662306a36Sopenharmony_ci
216762306a36Sopenharmony_ci		target-module@4000 {			/* 0x48304000, ap 70 44.0 */
216862306a36Sopenharmony_ci			compatible = "ti,sysc-omap4", "ti,sysc";
216962306a36Sopenharmony_ci			reg = <0x4000 0x4>,
217062306a36Sopenharmony_ci			      <0x4004 0x4>;
217162306a36Sopenharmony_ci			reg-names = "rev", "sysc";
217262306a36Sopenharmony_ci			ti,sysc-midle = <SYSC_IDLE_FORCE>,
217362306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
217462306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
217562306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
217662306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
217762306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
217862306a36Sopenharmony_ci					<SYSC_IDLE_SMART>,
217962306a36Sopenharmony_ci					<SYSC_IDLE_SMART_WKUP>;
218062306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
218162306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_EPWMSS2_CLKCTRL 0>;
218262306a36Sopenharmony_ci			clock-names = "fck";
218362306a36Sopenharmony_ci			#address-cells = <1>;
218462306a36Sopenharmony_ci			#size-cells = <1>;
218562306a36Sopenharmony_ci			ranges = <0x0 0x4000 0x1000>;
218662306a36Sopenharmony_ci
218762306a36Sopenharmony_ci			epwmss2: epwmss@0 {
218862306a36Sopenharmony_ci				compatible = "ti,am33xx-pwmss";
218962306a36Sopenharmony_ci				reg = <0x0 0x10>;
219062306a36Sopenharmony_ci				#address-cells = <1>;
219162306a36Sopenharmony_ci				#size-cells = <1>;
219262306a36Sopenharmony_ci				status = "disabled";
219362306a36Sopenharmony_ci				ranges = <0 0 0x1000>;
219462306a36Sopenharmony_ci
219562306a36Sopenharmony_ci				ecap2: pwm@100 {
219662306a36Sopenharmony_ci					compatible = "ti,am3352-ecap";
219762306a36Sopenharmony_ci					#pwm-cells = <3>;
219862306a36Sopenharmony_ci					reg = <0x100 0x80>;
219962306a36Sopenharmony_ci					clocks = <&l4ls_gclk>;
220062306a36Sopenharmony_ci					clock-names = "fck";
220162306a36Sopenharmony_ci					status = "disabled";
220262306a36Sopenharmony_ci				};
220362306a36Sopenharmony_ci
220462306a36Sopenharmony_ci				eqep2: counter@180 {
220562306a36Sopenharmony_ci					compatible = "ti,am3352-eqep";
220662306a36Sopenharmony_ci					reg = <0x180 0x80>;
220762306a36Sopenharmony_ci					clocks = <&l4ls_gclk>;
220862306a36Sopenharmony_ci					clock-names = "sysclkout";
220962306a36Sopenharmony_ci					interrupts = <89>;
221062306a36Sopenharmony_ci					status = "disabled";
221162306a36Sopenharmony_ci				};
221262306a36Sopenharmony_ci
221362306a36Sopenharmony_ci				ehrpwm2: pwm@200 {
221462306a36Sopenharmony_ci					compatible = "ti,am3352-ehrpwm";
221562306a36Sopenharmony_ci					#pwm-cells = <3>;
221662306a36Sopenharmony_ci					reg = <0x200 0x80>;
221762306a36Sopenharmony_ci					clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
221862306a36Sopenharmony_ci					clock-names = "tbclk", "fck";
221962306a36Sopenharmony_ci					status = "disabled";
222062306a36Sopenharmony_ci				};
222162306a36Sopenharmony_ci			};
222262306a36Sopenharmony_ci		};
222362306a36Sopenharmony_ci
222462306a36Sopenharmony_ci		target-module@e000 {			/* 0x4830e000, ap 72 4a.0 */
222562306a36Sopenharmony_ci			compatible = "ti,sysc-omap4", "ti,sysc";
222662306a36Sopenharmony_ci			reg = <0xe000 0x4>,
222762306a36Sopenharmony_ci			      <0xe054 0x4>;
222862306a36Sopenharmony_ci			reg-names = "rev", "sysc";
222962306a36Sopenharmony_ci			ti,sysc-midle = <SYSC_IDLE_FORCE>,
223062306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
223162306a36Sopenharmony_ci					<SYSC_IDLE_SMART>;
223262306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
223362306a36Sopenharmony_ci					<SYSC_IDLE_NO>,
223462306a36Sopenharmony_ci					<SYSC_IDLE_SMART>;
223562306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, lcdc_clkdm */
223662306a36Sopenharmony_ci			clocks = <&lcdc_clkctrl AM3_LCDC_LCDC_CLKCTRL 0>;
223762306a36Sopenharmony_ci			clock-names = "fck";
223862306a36Sopenharmony_ci			#address-cells = <1>;
223962306a36Sopenharmony_ci			#size-cells = <1>;
224062306a36Sopenharmony_ci			ranges = <0x0 0xe000 0x1000>;
224162306a36Sopenharmony_ci
224262306a36Sopenharmony_ci			lcdc: lcdc@0 {
224362306a36Sopenharmony_ci				compatible = "ti,am33xx-tilcdc";
224462306a36Sopenharmony_ci				reg = <0x0 0x1000>;
224562306a36Sopenharmony_ci				interrupts = <36>;
224662306a36Sopenharmony_ci				status = "disabled";
224762306a36Sopenharmony_ci			};
224862306a36Sopenharmony_ci		};
224962306a36Sopenharmony_ci
225062306a36Sopenharmony_ci		target-module@10000 {			/* 0x48310000, ap 76 4e.1 */
225162306a36Sopenharmony_ci			compatible = "ti,sysc-omap2", "ti,sysc";
225262306a36Sopenharmony_ci			reg = <0x11fe0 0x4>,
225362306a36Sopenharmony_ci			      <0x11fe4 0x4>;
225462306a36Sopenharmony_ci			reg-names = "rev", "sysc";
225562306a36Sopenharmony_ci			ti,sysc-mask = <SYSC_OMAP2_AUTOIDLE>;
225662306a36Sopenharmony_ci			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
225762306a36Sopenharmony_ci					<SYSC_IDLE_NO>;
225862306a36Sopenharmony_ci			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
225962306a36Sopenharmony_ci			clocks = <&l4ls_clkctrl AM3_L4LS_RNG_CLKCTRL 0>;
226062306a36Sopenharmony_ci			clock-names = "fck";
226162306a36Sopenharmony_ci			#address-cells = <1>;
226262306a36Sopenharmony_ci			#size-cells = <1>;
226362306a36Sopenharmony_ci			ranges = <0x0 0x10000 0x2000>;
226462306a36Sopenharmony_ci
226562306a36Sopenharmony_ci			rng: rng@0 {
226662306a36Sopenharmony_ci				compatible = "ti,omap4-rng";
226762306a36Sopenharmony_ci				reg = <0x0 0x2000>;
226862306a36Sopenharmony_ci				interrupts = <111>;
226962306a36Sopenharmony_ci			};
227062306a36Sopenharmony_ci		};
227162306a36Sopenharmony_ci
227262306a36Sopenharmony_ci		target-module@13000 {			/* 0x48313000, ap 97 62.0 */
227362306a36Sopenharmony_ci			compatible = "ti,sysc";
227462306a36Sopenharmony_ci			status = "disabled";
227562306a36Sopenharmony_ci			#address-cells = <1>;
227662306a36Sopenharmony_ci			#size-cells = <1>;
227762306a36Sopenharmony_ci			ranges = <0x0 0x13000 0x1000>;
227862306a36Sopenharmony_ci		};
227962306a36Sopenharmony_ci
228062306a36Sopenharmony_ci		target-module@15000 {			/* 0x48315000, ap 94 56.0 */
228162306a36Sopenharmony_ci			compatible = "ti,sysc";
228262306a36Sopenharmony_ci			status = "disabled";
228362306a36Sopenharmony_ci			#address-cells = <1>;
228462306a36Sopenharmony_ci			#size-cells = <1>;
228562306a36Sopenharmony_ci			ranges = <0x00000000 0x00015000 0x00001000>,
228662306a36Sopenharmony_ci				 <0x00001000 0x00016000 0x00001000>;
228762306a36Sopenharmony_ci		};
228862306a36Sopenharmony_ci
228962306a36Sopenharmony_ci		target-module@18000 {			/* 0x48318000, ap 74 4c.0 */
229062306a36Sopenharmony_ci			compatible = "ti,sysc";
229162306a36Sopenharmony_ci			status = "disabled";
229262306a36Sopenharmony_ci			#address-cells = <1>;
229362306a36Sopenharmony_ci			#size-cells = <1>;
229462306a36Sopenharmony_ci			ranges = <0x0 0x18000 0x4000>;
229562306a36Sopenharmony_ci		};
229662306a36Sopenharmony_ci
229762306a36Sopenharmony_ci		target-module@20000 {			/* 0x48320000, ap 99 34.0 */
229862306a36Sopenharmony_ci			compatible = "ti,sysc";
229962306a36Sopenharmony_ci			status = "disabled";
230062306a36Sopenharmony_ci			#address-cells = <1>;
230162306a36Sopenharmony_ci			#size-cells = <1>;
230262306a36Sopenharmony_ci			ranges = <0x0 0x20000 0x1000>;
230362306a36Sopenharmony_ci		};
230462306a36Sopenharmony_ci
230562306a36Sopenharmony_ci		target-module@22000 {			/* 0x48322000, ap 101 3e.0 */
230662306a36Sopenharmony_ci			compatible = "ti,sysc";
230762306a36Sopenharmony_ci			status = "disabled";
230862306a36Sopenharmony_ci			#address-cells = <1>;
230962306a36Sopenharmony_ci			#size-cells = <1>;
231062306a36Sopenharmony_ci			ranges = <0x0 0x22000 0x1000>;
231162306a36Sopenharmony_ci		};
231262306a36Sopenharmony_ci
231362306a36Sopenharmony_ci		target-module@24000 {			/* 0x48324000, ap 103 68.0 */
231462306a36Sopenharmony_ci			compatible = "ti,sysc";
231562306a36Sopenharmony_ci			status = "disabled";
231662306a36Sopenharmony_ci			#address-cells = <1>;
231762306a36Sopenharmony_ci			#size-cells = <1>;
231862306a36Sopenharmony_ci			ranges = <0x0 0x24000 0x1000>;
231962306a36Sopenharmony_ci		};
232062306a36Sopenharmony_ci	};
232162306a36Sopenharmony_ci};
232262306a36Sopenharmony_ci
2323