162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0+ OR MIT 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Device tree for Colibri VF61 Cortex-M4 support 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (C) 2015 Stefan Agner 662306a36Sopenharmony_ci */ 762306a36Sopenharmony_ci 862306a36Sopenharmony_ci/dts-v1/; 962306a36Sopenharmony_ci#include "vf610m4.dtsi" 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci/ { 1262306a36Sopenharmony_ci model = "VF610 Cortex-M4"; 1362306a36Sopenharmony_ci compatible = "fsl,vf610m4"; 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ci chosen { 1662306a36Sopenharmony_ci bootargs = "clk_ignore_unused init=/linuxrc rw"; 1762306a36Sopenharmony_ci stdout-path = "serial2:115200"; 1862306a36Sopenharmony_ci }; 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_ci memory@8c000000 { 2162306a36Sopenharmony_ci device_type = "memory"; 2262306a36Sopenharmony_ci reg = <0x8c000000 0x3000000>; 2362306a36Sopenharmony_ci }; 2462306a36Sopenharmony_ci}; 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci&gpio0 { 2762306a36Sopenharmony_ci status = "disabled"; 2862306a36Sopenharmony_ci}; 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci&gpio1 { 3162306a36Sopenharmony_ci status = "disabled"; 3262306a36Sopenharmony_ci}; 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_ci&gpio2 { 3562306a36Sopenharmony_ci status = "disabled"; 3662306a36Sopenharmony_ci}; 3762306a36Sopenharmony_ci 3862306a36Sopenharmony_ci&gpio3 { 3962306a36Sopenharmony_ci status = "disabled"; 4062306a36Sopenharmony_ci}; 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci&gpio4 { 4362306a36Sopenharmony_ci status = "disabled"; 4462306a36Sopenharmony_ci}; 4562306a36Sopenharmony_ci 4662306a36Sopenharmony_ci&uart2 { 4762306a36Sopenharmony_ci pinctrl-names = "default"; 4862306a36Sopenharmony_ci pinctrl-0 = <&pinctrl_uart2>; 4962306a36Sopenharmony_ci status = "okay"; 5062306a36Sopenharmony_ci}; 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_ci&iomuxc { 5362306a36Sopenharmony_ci vf610-colibri { 5462306a36Sopenharmony_ci pinctrl_uart2: uart2grp { 5562306a36Sopenharmony_ci fsl,pins = < 5662306a36Sopenharmony_ci VF610_PAD_PTD0__UART2_TX 0x21a2 5762306a36Sopenharmony_ci VF610_PAD_PTD1__UART2_RX 0x21a1 5862306a36Sopenharmony_ci VF610_PAD_PTD2__UART2_RTS 0x21a2 5962306a36Sopenharmony_ci VF610_PAD_PTD3__UART2_CTS 0x21a1 6062306a36Sopenharmony_ci >; 6162306a36Sopenharmony_ci }; 6262306a36Sopenharmony_ci }; 6362306a36Sopenharmony_ci}; 64