162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci *  Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
462306a36Sopenharmony_ci */
562306a36Sopenharmony_ci
662306a36Sopenharmony_ci/ {
762306a36Sopenharmony_ci	#address-cells = <1>;
862306a36Sopenharmony_ci	#size-cells = <1>;
962306a36Sopenharmony_ci	interrupt-parent = <&intc>;
1062306a36Sopenharmony_ci
1162306a36Sopenharmony_ci	cpus {
1262306a36Sopenharmony_ci		#address-cells = <1>;
1362306a36Sopenharmony_ci		#size-cells = <0>;
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ci		cpu@0 {
1662306a36Sopenharmony_ci			compatible = "arm,arm926ej-s";
1762306a36Sopenharmony_ci			device_type = "cpu";
1862306a36Sopenharmony_ci			reg = <0>;
1962306a36Sopenharmony_ci		};
2062306a36Sopenharmony_ci	};
2162306a36Sopenharmony_ci
2262306a36Sopenharmony_ci	bootrom: bootrom@0 {
2362306a36Sopenharmony_ci		reg = <0x00000000 0x80000>;
2462306a36Sopenharmony_ci	};
2562306a36Sopenharmony_ci
2662306a36Sopenharmony_ci	sram: sram@a4000000 {
2762306a36Sopenharmony_ci		compatible = "mmio-sram";
2862306a36Sopenharmony_ci		reg = <0xa4000000 0x20000>; /* 128k */
2962306a36Sopenharmony_ci		#address-cells = <1>;
3062306a36Sopenharmony_ci		#size-cells = <1>;
3162306a36Sopenharmony_ci		ranges = <0 0xa4000000 0x20000>;
3262306a36Sopenharmony_ci
3362306a36Sopenharmony_ci		sram@0 {
3462306a36Sopenharmony_ci			reg = <0x0 0x20000>;
3562306a36Sopenharmony_ci		};
3662306a36Sopenharmony_ci	};
3762306a36Sopenharmony_ci
3862306a36Sopenharmony_ci	timer_clk: timer_clk {
3962306a36Sopenharmony_ci		#clock-cells = <0>;
4062306a36Sopenharmony_ci		compatible = "fixed-clock";
4162306a36Sopenharmony_ci		clock-frequency = <32768>;
4262306a36Sopenharmony_ci	};
4362306a36Sopenharmony_ci
4462306a36Sopenharmony_ci	base_clk: base_clk {
4562306a36Sopenharmony_ci		#clock-cells = <0>;
4662306a36Sopenharmony_ci		reg = <0x900b0024 0x4>;
4762306a36Sopenharmony_ci	};
4862306a36Sopenharmony_ci
4962306a36Sopenharmony_ci	ahb_clk: ahb_clk {
5062306a36Sopenharmony_ci		#clock-cells = <0>;
5162306a36Sopenharmony_ci		reg = <0x900b0024 0x4>;
5262306a36Sopenharmony_ci		clocks = <&base_clk>;
5362306a36Sopenharmony_ci	};
5462306a36Sopenharmony_ci
5562306a36Sopenharmony_ci	apb_pclk: apb_pclk {
5662306a36Sopenharmony_ci		#clock-cells = <0>;
5762306a36Sopenharmony_ci		compatible = "fixed-factor-clock";
5862306a36Sopenharmony_ci		clock-div = <2>;
5962306a36Sopenharmony_ci		clock-mult = <1>;
6062306a36Sopenharmony_ci		clocks = <&ahb_clk>;
6162306a36Sopenharmony_ci	};
6262306a36Sopenharmony_ci
6362306a36Sopenharmony_ci	usb_phy: usb_phy {
6462306a36Sopenharmony_ci		compatible = "usb-nop-xceiv";
6562306a36Sopenharmony_ci		#phy-cells = <0>;
6662306a36Sopenharmony_ci	};
6762306a36Sopenharmony_ci
6862306a36Sopenharmony_ci	vbus_reg: vbus_reg {
6962306a36Sopenharmony_ci		compatible = "regulator-fixed";
7062306a36Sopenharmony_ci
7162306a36Sopenharmony_ci		regulator-name = "USB VBUS output";
7262306a36Sopenharmony_ci
7362306a36Sopenharmony_ci		regulator-min-microvolt = <5000000>;
7462306a36Sopenharmony_ci		regulator-max-microvolt = <5000000>;
7562306a36Sopenharmony_ci	};
7662306a36Sopenharmony_ci
7762306a36Sopenharmony_ci	ahb {
7862306a36Sopenharmony_ci		compatible = "simple-bus";
7962306a36Sopenharmony_ci		#address-cells = <1>;
8062306a36Sopenharmony_ci		#size-cells = <1>;
8162306a36Sopenharmony_ci		ranges;
8262306a36Sopenharmony_ci
8362306a36Sopenharmony_ci		spi: spi@a9000000 {
8462306a36Sopenharmony_ci			reg = <0xa9000000 0x1000>;
8562306a36Sopenharmony_ci		};
8662306a36Sopenharmony_ci
8762306a36Sopenharmony_ci		usb0: usb@b0000000 {
8862306a36Sopenharmony_ci			compatible = "lsi,zevio-usb";
8962306a36Sopenharmony_ci			reg = <0xb0000000 0x1000>;
9062306a36Sopenharmony_ci			interrupts = <8>;
9162306a36Sopenharmony_ci
9262306a36Sopenharmony_ci			usb-phy = <&usb_phy>;
9362306a36Sopenharmony_ci			vbus-supply = <&vbus_reg>;
9462306a36Sopenharmony_ci		};
9562306a36Sopenharmony_ci
9662306a36Sopenharmony_ci		usb1: usb@b4000000 {
9762306a36Sopenharmony_ci			reg = <0xb4000000 0x1000>;
9862306a36Sopenharmony_ci			interrupts = <9>;
9962306a36Sopenharmony_ci			status = "disabled";
10062306a36Sopenharmony_ci		};
10162306a36Sopenharmony_ci
10262306a36Sopenharmony_ci		lcd: lcd@c0000000 {
10362306a36Sopenharmony_ci			compatible = "arm,pl111", "arm,primecell";
10462306a36Sopenharmony_ci			reg = <0xc0000000 0x1000>;
10562306a36Sopenharmony_ci			interrupts = <21>;
10662306a36Sopenharmony_ci
10762306a36Sopenharmony_ci			/*
10862306a36Sopenharmony_ci			 * We assume the same clock is fed to APB and CLCDCLK.
10962306a36Sopenharmony_ci			 * There is some code to scale the clock down by a factor
11062306a36Sopenharmony_ci			 * 48 for the display so likely the frequency to the
11162306a36Sopenharmony_ci			 * display is 1MHz and the CLCDCLK is 48 MHz.
11262306a36Sopenharmony_ci			 */
11362306a36Sopenharmony_ci			clocks = <&apb_pclk>, <&apb_pclk>;
11462306a36Sopenharmony_ci			clock-names = "clcdclk", "apb_pclk";
11562306a36Sopenharmony_ci		};
11662306a36Sopenharmony_ci
11762306a36Sopenharmony_ci		adc: adc@c4000000 {
11862306a36Sopenharmony_ci			reg = <0xc4000000 0x1000>;
11962306a36Sopenharmony_ci			interrupts = <11>;
12062306a36Sopenharmony_ci		};
12162306a36Sopenharmony_ci
12262306a36Sopenharmony_ci		tdes: crypto@c8010000 {
12362306a36Sopenharmony_ci			reg = <0xc8010000 0x1000>;
12462306a36Sopenharmony_ci		};
12562306a36Sopenharmony_ci
12662306a36Sopenharmony_ci		sha256: crypto@cc000000 {
12762306a36Sopenharmony_ci			reg = <0xcc000000 0x1000>;
12862306a36Sopenharmony_ci		};
12962306a36Sopenharmony_ci
13062306a36Sopenharmony_ci		apb@90000000 {
13162306a36Sopenharmony_ci			compatible = "simple-bus";
13262306a36Sopenharmony_ci			#address-cells = <1>;
13362306a36Sopenharmony_ci			#size-cells = <1>;
13462306a36Sopenharmony_ci			clock-ranges;
13562306a36Sopenharmony_ci			ranges;
13662306a36Sopenharmony_ci
13762306a36Sopenharmony_ci			gpio: gpio@90000000 {
13862306a36Sopenharmony_ci				compatible = "lsi,zevio-gpio";
13962306a36Sopenharmony_ci				reg = <0x90000000 0x1000>;
14062306a36Sopenharmony_ci				interrupts = <7>;
14162306a36Sopenharmony_ci				gpio-controller;
14262306a36Sopenharmony_ci				#gpio-cells = <2>;
14362306a36Sopenharmony_ci			};
14462306a36Sopenharmony_ci
14562306a36Sopenharmony_ci			fast_timer: timer@90010000 {
14662306a36Sopenharmony_ci				reg = <0x90010000 0x1000>;
14762306a36Sopenharmony_ci				interrupts = <17>;
14862306a36Sopenharmony_ci			};
14962306a36Sopenharmony_ci
15062306a36Sopenharmony_ci			uart: serial@90020000 {
15162306a36Sopenharmony_ci				reg = <0x90020000 0x1000>;
15262306a36Sopenharmony_ci				interrupts = <1>;
15362306a36Sopenharmony_ci			};
15462306a36Sopenharmony_ci
15562306a36Sopenharmony_ci			timer0: timer@900c0000 {
15662306a36Sopenharmony_ci				reg = <0x900c0000 0x1000>;
15762306a36Sopenharmony_ci				clocks = <&timer_clk>, <&timer_clk>,
15862306a36Sopenharmony_ci					 <&timer_clk>;
15962306a36Sopenharmony_ci				clock-names = "timer0clk", "timer1clk",
16062306a36Sopenharmony_ci					      "apb_pclk";
16162306a36Sopenharmony_ci			};
16262306a36Sopenharmony_ci
16362306a36Sopenharmony_ci			timer1: timer@900d0000 {
16462306a36Sopenharmony_ci				reg = <0x900d0000 0x1000>;
16562306a36Sopenharmony_ci				interrupts = <19>;
16662306a36Sopenharmony_ci				clocks = <&timer_clk>, <&timer_clk>,
16762306a36Sopenharmony_ci					 <&timer_clk>;
16862306a36Sopenharmony_ci				clock-names = "timer0clk", "timer1clk",
16962306a36Sopenharmony_ci					      "apb_pclk";
17062306a36Sopenharmony_ci			};
17162306a36Sopenharmony_ci
17262306a36Sopenharmony_ci			watchdog: watchdog@90060000 {
17362306a36Sopenharmony_ci				compatible = "arm,primecell";
17462306a36Sopenharmony_ci				reg = <0x90060000 0x1000>;
17562306a36Sopenharmony_ci				interrupts = <3>;
17662306a36Sopenharmony_ci			};
17762306a36Sopenharmony_ci
17862306a36Sopenharmony_ci			rtc: rtc@90090000 {
17962306a36Sopenharmony_ci				reg = <0x90090000 0x1000>;
18062306a36Sopenharmony_ci				interrupts = <4>;
18162306a36Sopenharmony_ci			};
18262306a36Sopenharmony_ci
18362306a36Sopenharmony_ci			misc: misc@900a0000 {
18462306a36Sopenharmony_ci				compatible = "ti,nspire-misc", "syscon", "simple-mfd";
18562306a36Sopenharmony_ci				reg = <0x900a0000 0x1000>;
18662306a36Sopenharmony_ci
18762306a36Sopenharmony_ci				reboot {
18862306a36Sopenharmony_ci					compatible = "syscon-reboot";
18962306a36Sopenharmony_ci					offset = <0x08>;
19062306a36Sopenharmony_ci					value = <0x02>;
19162306a36Sopenharmony_ci				};
19262306a36Sopenharmony_ci			};
19362306a36Sopenharmony_ci
19462306a36Sopenharmony_ci			pwr: pwr@900b0000 {
19562306a36Sopenharmony_ci				reg = <0x900b0000 0x1000>;
19662306a36Sopenharmony_ci				interrupts = <15>;
19762306a36Sopenharmony_ci			};
19862306a36Sopenharmony_ci
19962306a36Sopenharmony_ci			keypad: input@900e0000 {
20062306a36Sopenharmony_ci				compatible = "ti,nspire-keypad";
20162306a36Sopenharmony_ci				reg = <0x900e0000 0x1000>;
20262306a36Sopenharmony_ci				interrupts = <16>;
20362306a36Sopenharmony_ci
20462306a36Sopenharmony_ci				scan-interval = <1000>;
20562306a36Sopenharmony_ci				row-delay = <200>;
20662306a36Sopenharmony_ci
20762306a36Sopenharmony_ci				clocks = <&apb_pclk>;
20862306a36Sopenharmony_ci			};
20962306a36Sopenharmony_ci
21062306a36Sopenharmony_ci			contrast: contrast@900f0000 {
21162306a36Sopenharmony_ci				reg = <0x900f0000 0x1000>;
21262306a36Sopenharmony_ci			};
21362306a36Sopenharmony_ci
21462306a36Sopenharmony_ci			led: led@90110000 {
21562306a36Sopenharmony_ci				reg = <0x90110000 0x1000>;
21662306a36Sopenharmony_ci			};
21762306a36Sopenharmony_ci		};
21862306a36Sopenharmony_ci	};
21962306a36Sopenharmony_ci};
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