162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only
262306a36Sopenharmony_ci// Copyright (C) 2012 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
362306a36Sopenharmony_ci
462306a36Sopenharmony_ci/*
562306a36Sopenharmony_ci * TODO: add Orion USB device port init when kernel.org support is added.
662306a36Sopenharmony_ci * TODO: add flash write support: see below.
762306a36Sopenharmony_ci * TODO: add power-off support.
862306a36Sopenharmony_ci * TODO: add I2C EEPROM support.
962306a36Sopenharmony_ci */
1062306a36Sopenharmony_ci
1162306a36Sopenharmony_ci/dts-v1/;
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_ci#include <dt-bindings/gpio/gpio.h>
1462306a36Sopenharmony_ci#include <dt-bindings/input/input.h>
1562306a36Sopenharmony_ci#include <dt-bindings/interrupt-controller/irq.h>
1662306a36Sopenharmony_ci#include "orion5x-mv88f5182.dtsi"
1762306a36Sopenharmony_ci
1862306a36Sopenharmony_ci/ {
1962306a36Sopenharmony_ci	model = "LaCie Ethernet Disk mini V2";
2062306a36Sopenharmony_ci	compatible = "lacie,ethernet-disk-mini-v2", "marvell,orion5x-88f5182", "marvell,orion5x";
2162306a36Sopenharmony_ci
2262306a36Sopenharmony_ci	memory {
2362306a36Sopenharmony_ci		device_type = "memory";
2462306a36Sopenharmony_ci		reg = <0x00000000 0x4000000>; /* 64 MB */
2562306a36Sopenharmony_ci	};
2662306a36Sopenharmony_ci
2762306a36Sopenharmony_ci	chosen {
2862306a36Sopenharmony_ci		bootargs = "console=ttyS0,115200n8 earlyprintk";
2962306a36Sopenharmony_ci		stdout-path = &uart0;
3062306a36Sopenharmony_ci	};
3162306a36Sopenharmony_ci
3262306a36Sopenharmony_ci	soc {
3362306a36Sopenharmony_ci		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
3462306a36Sopenharmony_ci			 <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
3562306a36Sopenharmony_ci			 <MBUS_ID(0x01, 0x0f) 0 0xfff80000 0x80000>;
3662306a36Sopenharmony_ci	};
3762306a36Sopenharmony_ci
3862306a36Sopenharmony_ci	gpio-keys {
3962306a36Sopenharmony_ci		compatible = "gpio-keys";
4062306a36Sopenharmony_ci		pinctrl-0 = <&pmx_power_button>;
4162306a36Sopenharmony_ci		pinctrl-names = "default";
4262306a36Sopenharmony_ci		#address-cells = <1>;
4362306a36Sopenharmony_ci		#size-cells = <0>;
4462306a36Sopenharmony_ci		button@1 {
4562306a36Sopenharmony_ci			label = "Power-on Switch";
4662306a36Sopenharmony_ci			linux,code = <KEY_POWER>;
4762306a36Sopenharmony_ci			gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
4862306a36Sopenharmony_ci		};
4962306a36Sopenharmony_ci	};
5062306a36Sopenharmony_ci
5162306a36Sopenharmony_ci	gpio-leds {
5262306a36Sopenharmony_ci		compatible = "gpio-leds";
5362306a36Sopenharmony_ci		pinctrl-0 = <&pmx_power_led>;
5462306a36Sopenharmony_ci		pinctrl-names = "default";
5562306a36Sopenharmony_ci
5662306a36Sopenharmony_ci		led@1 {
5762306a36Sopenharmony_ci			label = "power:blue";
5862306a36Sopenharmony_ci			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
5962306a36Sopenharmony_ci		};
6062306a36Sopenharmony_ci	};
6162306a36Sopenharmony_ci};
6262306a36Sopenharmony_ci
6362306a36Sopenharmony_ci&devbus_bootcs {
6462306a36Sopenharmony_ci	status = "okay";
6562306a36Sopenharmony_ci
6662306a36Sopenharmony_ci	/* Read parameters */
6762306a36Sopenharmony_ci	devbus,bus-width    = <8>;
6862306a36Sopenharmony_ci	devbus,turn-off-ps  = <90000>;
6962306a36Sopenharmony_ci	devbus,badr-skew-ps = <0>;
7062306a36Sopenharmony_ci	devbus,acc-first-ps = <186000>;
7162306a36Sopenharmony_ci	devbus,acc-next-ps  = <186000>;
7262306a36Sopenharmony_ci
7362306a36Sopenharmony_ci	/* Write parameters */
7462306a36Sopenharmony_ci	devbus,wr-high-ps  = <90000>;
7562306a36Sopenharmony_ci	devbus,wr-low-ps   = <90000>;
7662306a36Sopenharmony_ci	devbus,ale-wr-ps   = <90000>;
7762306a36Sopenharmony_ci
7862306a36Sopenharmony_ci	/*
7962306a36Sopenharmony_ci	 * Currently the MTD code does not recognize the MX29LV400CBCT
8062306a36Sopenharmony_ci	 * as a bottom-type device. This could cause risks of
8162306a36Sopenharmony_ci	 * accidentally erasing critical flash sectors. We thus define
8262306a36Sopenharmony_ci	 * a single, write-protected partition covering the whole
8362306a36Sopenharmony_ci	 * flash.  TODO: once the flash part TOP/BOTTOM detection
8462306a36Sopenharmony_ci	 * issue is sorted out in the MTD code, break this into at
8562306a36Sopenharmony_ci	 * least three partitions: 'u-boot code', 'u-boot environment'
8662306a36Sopenharmony_ci	 * and 'whatever is left'.
8762306a36Sopenharmony_ci	 */
8862306a36Sopenharmony_ci	flash@0 {
8962306a36Sopenharmony_ci		compatible = "cfi-flash";
9062306a36Sopenharmony_ci		reg = <0 0x80000>;
9162306a36Sopenharmony_ci		bank-width = <1>;
9262306a36Sopenharmony_ci		#address-cells = <1>;
9362306a36Sopenharmony_ci		#size-cells = <1>;
9462306a36Sopenharmony_ci
9562306a36Sopenharmony_ci		partition@0 {
9662306a36Sopenharmony_ci			label = "Full512Kb";
9762306a36Sopenharmony_ci			reg = <0 0x80000>;
9862306a36Sopenharmony_ci			read-only;
9962306a36Sopenharmony_ci		};
10062306a36Sopenharmony_ci	};
10162306a36Sopenharmony_ci};
10262306a36Sopenharmony_ci
10362306a36Sopenharmony_ci&ehci0 {
10462306a36Sopenharmony_ci	status = "okay";
10562306a36Sopenharmony_ci};
10662306a36Sopenharmony_ci
10762306a36Sopenharmony_ci&eth {
10862306a36Sopenharmony_ci	status = "okay";
10962306a36Sopenharmony_ci
11062306a36Sopenharmony_ci	ethernet-port@0 {
11162306a36Sopenharmony_ci		phy-handle = <&ethphy>;
11262306a36Sopenharmony_ci	};
11362306a36Sopenharmony_ci};
11462306a36Sopenharmony_ci
11562306a36Sopenharmony_ci&i2c {
11662306a36Sopenharmony_ci	status = "okay";
11762306a36Sopenharmony_ci	clock-frequency = <100000>;
11862306a36Sopenharmony_ci	#address-cells = <1>;
11962306a36Sopenharmony_ci
12062306a36Sopenharmony_ci	rtc@32 {
12162306a36Sopenharmony_ci		compatible = "ricoh,rs5c372a";
12262306a36Sopenharmony_ci		reg = <0x32>;
12362306a36Sopenharmony_ci		interrupt-parent = <&gpio0>;
12462306a36Sopenharmony_ci		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
12562306a36Sopenharmony_ci	};
12662306a36Sopenharmony_ci};
12762306a36Sopenharmony_ci
12862306a36Sopenharmony_ci&mdio {
12962306a36Sopenharmony_ci	status = "okay";
13062306a36Sopenharmony_ci
13162306a36Sopenharmony_ci	ethphy: ethernet-phy {
13262306a36Sopenharmony_ci		reg = <8>;
13362306a36Sopenharmony_ci	};
13462306a36Sopenharmony_ci};
13562306a36Sopenharmony_ci
13662306a36Sopenharmony_ci&pinctrl {
13762306a36Sopenharmony_ci	pinctrl-0 = <&pmx_rtc &pmx_power_led_ctrl>;
13862306a36Sopenharmony_ci	pinctrl-names = "default";
13962306a36Sopenharmony_ci
14062306a36Sopenharmony_ci	pmx_power_button: pmx-power-button {
14162306a36Sopenharmony_ci		marvell,pins = "mpp18";
14262306a36Sopenharmony_ci		marvell,function = "gpio";
14362306a36Sopenharmony_ci	};
14462306a36Sopenharmony_ci
14562306a36Sopenharmony_ci	pmx_power_led: pmx-power-led {
14662306a36Sopenharmony_ci		marvell,pins = "mpp16";
14762306a36Sopenharmony_ci		marvell,function = "gpio";
14862306a36Sopenharmony_ci	};
14962306a36Sopenharmony_ci
15062306a36Sopenharmony_ci	pmx_power_led_ctrl: pmx-power-led-ctrl {
15162306a36Sopenharmony_ci		marvell,pins = "mpp17";
15262306a36Sopenharmony_ci		marvell,function = "gpio";
15362306a36Sopenharmony_ci	};
15462306a36Sopenharmony_ci
15562306a36Sopenharmony_ci	pmx_rtc: pmx-rtc {
15662306a36Sopenharmony_ci		marvell,pins = "mpp3";
15762306a36Sopenharmony_ci		marvell,function = "gpio";
15862306a36Sopenharmony_ci	};
15962306a36Sopenharmony_ci};
16062306a36Sopenharmony_ci
16162306a36Sopenharmony_ci&sata {
16262306a36Sopenharmony_ci	pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
16362306a36Sopenharmony_ci	pinctrl-names = "default";
16462306a36Sopenharmony_ci	status = "okay";
16562306a36Sopenharmony_ci	nr-ports = <2>;
16662306a36Sopenharmony_ci};
16762306a36Sopenharmony_ci
16862306a36Sopenharmony_ci&uart0 {
16962306a36Sopenharmony_ci	status = "okay";
17062306a36Sopenharmony_ci};
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