162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Marvell RD88F6181 A Board descrition 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Andrew Lunn <andrew@lunn.ch> 662306a36Sopenharmony_ci * 762306a36Sopenharmony_ci * This file contains the definitions for the board with the A0 or 862306a36Sopenharmony_ci * higher stepping of the SoC. The ethernet switch does not have a 962306a36Sopenharmony_ci * "wan" port. 1062306a36Sopenharmony_ci */ 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci/dts-v1/; 1362306a36Sopenharmony_ci#include "kirkwood-rd88f6281.dtsi" 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ci/ { 1662306a36Sopenharmony_ci model = "Marvell RD88f6281 Reference design, with A0 or higher SoC"; 1762306a36Sopenharmony_ci compatible = "marvell,rd88f6281-a", "marvell,rd88f6281","marvell,kirkwood-88f6281", "marvell,kirkwood"; 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci}; 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ci&mdio { 2262306a36Sopenharmony_ci status = "okay"; 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci ethphy1: ethernet-phy@11 { 2562306a36Sopenharmony_ci reg = <11>; 2662306a36Sopenharmony_ci }; 2762306a36Sopenharmony_ci}; 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci&switch { 3062306a36Sopenharmony_ci reg = <10>; 3162306a36Sopenharmony_ci}; 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_cið1 { 3462306a36Sopenharmony_ci status = "okay"; 3562306a36Sopenharmony_ci 3662306a36Sopenharmony_ci ethernet1-port@0 { 3762306a36Sopenharmony_ci phy-handle = <ðphy1>; 3862306a36Sopenharmony_ci }; 3962306a36Sopenharmony_ci}; 40