162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_ci/ { 362306a36Sopenharmony_ci mbus@f1000000 { 462306a36Sopenharmony_ci pciec: pcie@82000000 { 562306a36Sopenharmony_ci compatible = "marvell,kirkwood-pcie"; 662306a36Sopenharmony_ci status = "disabled"; 762306a36Sopenharmony_ci device_type = "pci"; 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci #address-cells = <3>; 1062306a36Sopenharmony_ci #size-cells = <2>; 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci bus-range = <0x00 0xff>; 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ci ranges = 1562306a36Sopenharmony_ci <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 1662306a36Sopenharmony_ci 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ 1762306a36Sopenharmony_ci 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>; 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci pcie0: pcie@1,0 { 2062306a36Sopenharmony_ci device_type = "pci"; 2162306a36Sopenharmony_ci assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>; 2262306a36Sopenharmony_ci reg = <0x0800 0 0 0 0>; 2362306a36Sopenharmony_ci #address-cells = <3>; 2462306a36Sopenharmony_ci #size-cells = <2>; 2562306a36Sopenharmony_ci #interrupt-cells = <1>; 2662306a36Sopenharmony_ci ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 2762306a36Sopenharmony_ci 0x81000000 0 0 0x81000000 0x1 0 1 0>; 2862306a36Sopenharmony_ci bus-range = <0x00 0xff>; 2962306a36Sopenharmony_ci interrupt-names = "intx", "error"; 3062306a36Sopenharmony_ci interrupts = <9>, <44>; 3162306a36Sopenharmony_ci interrupt-map-mask = <0 0 0 7>; 3262306a36Sopenharmony_ci interrupt-map = <0 0 0 1 &pcie_intc 0>, 3362306a36Sopenharmony_ci <0 0 0 2 &pcie_intc 1>, 3462306a36Sopenharmony_ci <0 0 0 3 &pcie_intc 2>, 3562306a36Sopenharmony_ci <0 0 0 4 &pcie_intc 3>; 3662306a36Sopenharmony_ci marvell,pcie-port = <0>; 3762306a36Sopenharmony_ci marvell,pcie-lane = <0>; 3862306a36Sopenharmony_ci clocks = <&gate_clk 2>; 3962306a36Sopenharmony_ci status = "disabled"; 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_ci pcie_intc: interrupt-controller { 4262306a36Sopenharmony_ci interrupt-controller; 4362306a36Sopenharmony_ci #interrupt-cells = <1>; 4462306a36Sopenharmony_ci }; 4562306a36Sopenharmony_ci }; 4662306a36Sopenharmony_ci }; 4762306a36Sopenharmony_ci }; 4862306a36Sopenharmony_ci 4962306a36Sopenharmony_ci ocp@f1000000 { 5062306a36Sopenharmony_ci pinctrl: pin-controller@10000 { 5162306a36Sopenharmony_ci compatible = "marvell,98dx4122-pinctrl"; 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_ci }; 5462306a36Sopenharmony_ci }; 5562306a36Sopenharmony_ci}; 5662306a36Sopenharmony_ci 5762306a36Sopenharmony_ci&sata_phy0 { 5862306a36Sopenharmony_ci status = "disabled"; 5962306a36Sopenharmony_ci}; 6062306a36Sopenharmony_ci 6162306a36Sopenharmony_ci&sata_phy1 { 6262306a36Sopenharmony_ci status = "disabled"; 6362306a36Sopenharmony_ci}; 64