162306a36Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Device Tree file for Marvell Armada XP evaluation board 462306a36Sopenharmony_ci * (DB-78460-BP) 562306a36Sopenharmony_ci * 662306a36Sopenharmony_ci * Copyright (C) 2012-2014 Marvell 762306a36Sopenharmony_ci * 862306a36Sopenharmony_ci * Lior Amsalem <alior@marvell.com> 962306a36Sopenharmony_ci * Gregory CLEMENT <gregory.clement@free-electrons.com> 1062306a36Sopenharmony_ci * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 1162306a36Sopenharmony_ci * 1262306a36Sopenharmony_ci * 1362306a36Sopenharmony_ci * Note: this Device Tree assumes that the bootloader has remapped the 1462306a36Sopenharmony_ci * internal registers to 0xf1000000 (instead of the default 1562306a36Sopenharmony_ci * 0xd0000000). The 0xf1000000 is the default used by the recent, 1662306a36Sopenharmony_ci * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier 1762306a36Sopenharmony_ci * boards were delivered with an older version of the bootloader that 1862306a36Sopenharmony_ci * left internal registers mapped at 0xd0000000. If you are in this 1962306a36Sopenharmony_ci * situation, you should either update your bootloader (preferred 2062306a36Sopenharmony_ci * solution) or the below Device Tree should be adjusted. 2162306a36Sopenharmony_ci */ 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ci/dts-v1/; 2462306a36Sopenharmony_ci#include "armada-xp-mv78460.dtsi" 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci/ { 2762306a36Sopenharmony_ci model = "Marvell Armada XP Evaluation Board"; 2862306a36Sopenharmony_ci compatible = "marvell,axp-db", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp"; 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci chosen { 3162306a36Sopenharmony_ci stdout-path = "serial0:115200n8"; 3262306a36Sopenharmony_ci }; 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_ci memory@0 { 3562306a36Sopenharmony_ci device_type = "memory"; 3662306a36Sopenharmony_ci reg = <0 0x00000000 0 0x80000000>; /* 2 GB */ 3762306a36Sopenharmony_ci }; 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ci soc { 4062306a36Sopenharmony_ci ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 4162306a36Sopenharmony_ci MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000 4262306a36Sopenharmony_ci MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000 4362306a36Sopenharmony_ci MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000 4462306a36Sopenharmony_ci MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000 4562306a36Sopenharmony_ci MBUS_ID(0x0c, 0x04) 0 0 0xf1200000 0x100000>; 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_ci devbus-bootcs { 4862306a36Sopenharmony_ci status = "okay"; 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_ci /* Device Bus parameters are required */ 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_ci /* Read parameters */ 5362306a36Sopenharmony_ci devbus,bus-width = <16>; 5462306a36Sopenharmony_ci devbus,turn-off-ps = <60000>; 5562306a36Sopenharmony_ci devbus,badr-skew-ps = <0>; 5662306a36Sopenharmony_ci devbus,acc-first-ps = <124000>; 5762306a36Sopenharmony_ci devbus,acc-next-ps = <248000>; 5862306a36Sopenharmony_ci devbus,rd-setup-ps = <0>; 5962306a36Sopenharmony_ci devbus,rd-hold-ps = <0>; 6062306a36Sopenharmony_ci 6162306a36Sopenharmony_ci /* Write parameters */ 6262306a36Sopenharmony_ci devbus,sync-enable = <0>; 6362306a36Sopenharmony_ci devbus,wr-high-ps = <60000>; 6462306a36Sopenharmony_ci devbus,wr-low-ps = <60000>; 6562306a36Sopenharmony_ci devbus,ale-wr-ps = <60000>; 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ci /* NOR 16 MiB */ 6862306a36Sopenharmony_ci nor@0 { 6962306a36Sopenharmony_ci compatible = "cfi-flash"; 7062306a36Sopenharmony_ci reg = <0 0x1000000>; 7162306a36Sopenharmony_ci bank-width = <2>; 7262306a36Sopenharmony_ci }; 7362306a36Sopenharmony_ci }; 7462306a36Sopenharmony_ci 7562306a36Sopenharmony_ci internal-regs { 7662306a36Sopenharmony_ci serial@12000 { 7762306a36Sopenharmony_ci status = "okay"; 7862306a36Sopenharmony_ci }; 7962306a36Sopenharmony_ci serial@12100 { 8062306a36Sopenharmony_ci status = "okay"; 8162306a36Sopenharmony_ci }; 8262306a36Sopenharmony_ci serial@12200 { 8362306a36Sopenharmony_ci status = "okay"; 8462306a36Sopenharmony_ci }; 8562306a36Sopenharmony_ci serial@12300 { 8662306a36Sopenharmony_ci status = "okay"; 8762306a36Sopenharmony_ci }; 8862306a36Sopenharmony_ci 8962306a36Sopenharmony_ci sata@a0000 { 9062306a36Sopenharmony_ci nr-ports = <2>; 9162306a36Sopenharmony_ci status = "okay"; 9262306a36Sopenharmony_ci }; 9362306a36Sopenharmony_ci 9462306a36Sopenharmony_ci ethernet@70000 { 9562306a36Sopenharmony_ci status = "okay"; 9662306a36Sopenharmony_ci phy = <&phy0>; 9762306a36Sopenharmony_ci phy-mode = "rgmii-id"; 9862306a36Sopenharmony_ci buffer-manager = <&bm>; 9962306a36Sopenharmony_ci bm,pool-long = <0>; 10062306a36Sopenharmony_ci }; 10162306a36Sopenharmony_ci ethernet@74000 { 10262306a36Sopenharmony_ci status = "okay"; 10362306a36Sopenharmony_ci phy = <&phy1>; 10462306a36Sopenharmony_ci phy-mode = "rgmii-id"; 10562306a36Sopenharmony_ci buffer-manager = <&bm>; 10662306a36Sopenharmony_ci bm,pool-long = <1>; 10762306a36Sopenharmony_ci }; 10862306a36Sopenharmony_ci ethernet@30000 { 10962306a36Sopenharmony_ci status = "okay"; 11062306a36Sopenharmony_ci phy = <&phy2>; 11162306a36Sopenharmony_ci phy-mode = "sgmii"; 11262306a36Sopenharmony_ci buffer-manager = <&bm>; 11362306a36Sopenharmony_ci bm,pool-long = <2>; 11462306a36Sopenharmony_ci }; 11562306a36Sopenharmony_ci ethernet@34000 { 11662306a36Sopenharmony_ci status = "okay"; 11762306a36Sopenharmony_ci phy = <&phy3>; 11862306a36Sopenharmony_ci phy-mode = "sgmii"; 11962306a36Sopenharmony_ci buffer-manager = <&bm>; 12062306a36Sopenharmony_ci bm,pool-long = <3>; 12162306a36Sopenharmony_ci }; 12262306a36Sopenharmony_ci 12362306a36Sopenharmony_ci bm@c0000 { 12462306a36Sopenharmony_ci status = "okay"; 12562306a36Sopenharmony_ci }; 12662306a36Sopenharmony_ci 12762306a36Sopenharmony_ci mvsdio@d4000 { 12862306a36Sopenharmony_ci pinctrl-0 = <&sdio_pins>; 12962306a36Sopenharmony_ci pinctrl-names = "default"; 13062306a36Sopenharmony_ci status = "okay"; 13162306a36Sopenharmony_ci /* No CD or WP GPIOs */ 13262306a36Sopenharmony_ci broken-cd; 13362306a36Sopenharmony_ci }; 13462306a36Sopenharmony_ci 13562306a36Sopenharmony_ci usb@50000 { 13662306a36Sopenharmony_ci status = "okay"; 13762306a36Sopenharmony_ci }; 13862306a36Sopenharmony_ci 13962306a36Sopenharmony_ci usb@51000 { 14062306a36Sopenharmony_ci status = "okay"; 14162306a36Sopenharmony_ci }; 14262306a36Sopenharmony_ci 14362306a36Sopenharmony_ci usb@52000 { 14462306a36Sopenharmony_ci status = "okay"; 14562306a36Sopenharmony_ci }; 14662306a36Sopenharmony_ci 14762306a36Sopenharmony_ci nand-controller@d0000 { 14862306a36Sopenharmony_ci status = "okay"; 14962306a36Sopenharmony_ci 15062306a36Sopenharmony_ci nand@0 { 15162306a36Sopenharmony_ci reg = <0>; 15262306a36Sopenharmony_ci label = "pxa3xx_nand-0"; 15362306a36Sopenharmony_ci nand-rb = <0>; 15462306a36Sopenharmony_ci nand-on-flash-bbt; 15562306a36Sopenharmony_ci 15662306a36Sopenharmony_ci partitions { 15762306a36Sopenharmony_ci compatible = "fixed-partitions"; 15862306a36Sopenharmony_ci #address-cells = <1>; 15962306a36Sopenharmony_ci #size-cells = <1>; 16062306a36Sopenharmony_ci 16162306a36Sopenharmony_ci partition@0 { 16262306a36Sopenharmony_ci label = "U-Boot"; 16362306a36Sopenharmony_ci reg = <0 0x800000>; 16462306a36Sopenharmony_ci }; 16562306a36Sopenharmony_ci partition@800000 { 16662306a36Sopenharmony_ci label = "Linux"; 16762306a36Sopenharmony_ci reg = <0x800000 0x800000>; 16862306a36Sopenharmony_ci }; 16962306a36Sopenharmony_ci partition@1000000 { 17062306a36Sopenharmony_ci label = "Filesystem"; 17162306a36Sopenharmony_ci reg = <0x1000000 0x3f000000>; 17262306a36Sopenharmony_ci }; 17362306a36Sopenharmony_ci }; 17462306a36Sopenharmony_ci }; 17562306a36Sopenharmony_ci }; 17662306a36Sopenharmony_ci }; 17762306a36Sopenharmony_ci 17862306a36Sopenharmony_ci bm-bppi { 17962306a36Sopenharmony_ci status = "okay"; 18062306a36Sopenharmony_ci }; 18162306a36Sopenharmony_ci }; 18262306a36Sopenharmony_ci}; 18362306a36Sopenharmony_ci 18462306a36Sopenharmony_ci&pciec { 18562306a36Sopenharmony_ci status = "okay"; 18662306a36Sopenharmony_ci 18762306a36Sopenharmony_ci /* 18862306a36Sopenharmony_ci * All 6 slots are physically present as 18962306a36Sopenharmony_ci * standard PCIe slots on the board. 19062306a36Sopenharmony_ci */ 19162306a36Sopenharmony_ci pcie@1,0 { 19262306a36Sopenharmony_ci /* Port 0, Lane 0 */ 19362306a36Sopenharmony_ci status = "okay"; 19462306a36Sopenharmony_ci }; 19562306a36Sopenharmony_ci pcie@2,0 { 19662306a36Sopenharmony_ci /* Port 0, Lane 1 */ 19762306a36Sopenharmony_ci status = "okay"; 19862306a36Sopenharmony_ci }; 19962306a36Sopenharmony_ci pcie@3,0 { 20062306a36Sopenharmony_ci /* Port 0, Lane 2 */ 20162306a36Sopenharmony_ci status = "okay"; 20262306a36Sopenharmony_ci }; 20362306a36Sopenharmony_ci pcie@4,0 { 20462306a36Sopenharmony_ci /* Port 0, Lane 3 */ 20562306a36Sopenharmony_ci status = "okay"; 20662306a36Sopenharmony_ci }; 20762306a36Sopenharmony_ci pcie@9,0 { 20862306a36Sopenharmony_ci /* Port 2, Lane 0 */ 20962306a36Sopenharmony_ci status = "okay"; 21062306a36Sopenharmony_ci }; 21162306a36Sopenharmony_ci pcie@a,0 { 21262306a36Sopenharmony_ci /* Port 3, Lane 0 */ 21362306a36Sopenharmony_ci status = "okay"; 21462306a36Sopenharmony_ci }; 21562306a36Sopenharmony_ci}; 21662306a36Sopenharmony_ci 21762306a36Sopenharmony_ci&mdio { 21862306a36Sopenharmony_ci phy0: ethernet-phy@0 { 21962306a36Sopenharmony_ci reg = <0>; 22062306a36Sopenharmony_ci }; 22162306a36Sopenharmony_ci 22262306a36Sopenharmony_ci phy1: ethernet-phy@1 { 22362306a36Sopenharmony_ci reg = <1>; 22462306a36Sopenharmony_ci }; 22562306a36Sopenharmony_ci 22662306a36Sopenharmony_ci phy2: ethernet-phy@2 { 22762306a36Sopenharmony_ci reg = <25>; 22862306a36Sopenharmony_ci }; 22962306a36Sopenharmony_ci 23062306a36Sopenharmony_ci phy3: ethernet-phy@3 { 23162306a36Sopenharmony_ci reg = <27>; 23262306a36Sopenharmony_ci }; 23362306a36Sopenharmony_ci}; 23462306a36Sopenharmony_ci 23562306a36Sopenharmony_ci&spi0 { 23662306a36Sopenharmony_ci status = "okay"; 23762306a36Sopenharmony_ci 23862306a36Sopenharmony_ci flash@0 { 23962306a36Sopenharmony_ci #address-cells = <1>; 24062306a36Sopenharmony_ci #size-cells = <1>; 24162306a36Sopenharmony_ci compatible = "m25p64", "jedec,spi-nor"; 24262306a36Sopenharmony_ci reg = <0>; /* Chip select 0 */ 24362306a36Sopenharmony_ci spi-max-frequency = <20000000>; 24462306a36Sopenharmony_ci }; 24562306a36Sopenharmony_ci}; 246