162306a36Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Device Tree file for DB-DXBC2 board 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (C) 2016 Allied Telesis Labs 662306a36Sopenharmony_ci * 762306a36Sopenharmony_ci * Based on armada-xp-db.dts 862306a36Sopenharmony_ci * 962306a36Sopenharmony_ci * Note: this Device Tree assumes that the bootloader has remapped the 1062306a36Sopenharmony_ci * internal registers to 0xf1000000 (instead of the default 1162306a36Sopenharmony_ci * 0xd0000000). The 0xf1000000 is the default used by the recent, 1262306a36Sopenharmony_ci * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier 1362306a36Sopenharmony_ci * boards were delivered with an older version of the bootloader that 1462306a36Sopenharmony_ci * left internal registers mapped at 0xd0000000. If you are in this 1562306a36Sopenharmony_ci * situation, you should either update your bootloader (preferred 1662306a36Sopenharmony_ci * solution) or the below Device Tree should be adjusted. 1762306a36Sopenharmony_ci */ 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci/dts-v1/; 2062306a36Sopenharmony_ci#include "armada-xp-98dx4251.dtsi" 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci/ { 2362306a36Sopenharmony_ci model = "Marvell Bobcat2 Evaluation Board"; 2462306a36Sopenharmony_ci compatible = "marvell,db-dxbc2", "marvell,armadaxp-98dx4251", "marvell,armada-370-xp"; 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci chosen { 2762306a36Sopenharmony_ci bootargs = "console=ttyS0,115200 earlyprintk"; 2862306a36Sopenharmony_ci }; 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci memory { 3162306a36Sopenharmony_ci device_type = "memory"; 3262306a36Sopenharmony_ci reg = <0 0x00000000 0 0x20000000>; /* 512 MB */ 3362306a36Sopenharmony_ci }; 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ci}; 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ci&devbus_bootcs { 3862306a36Sopenharmony_ci status = "okay"; 3962306a36Sopenharmony_ci 4062306a36Sopenharmony_ci /* Device Bus parameters are required */ 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci /* Read parameters */ 4362306a36Sopenharmony_ci devbus,bus-width = <16>; 4462306a36Sopenharmony_ci devbus,turn-off-ps = <60000>; 4562306a36Sopenharmony_ci devbus,badr-skew-ps = <0>; 4662306a36Sopenharmony_ci devbus,acc-first-ps = <124000>; 4762306a36Sopenharmony_ci devbus,acc-next-ps = <248000>; 4862306a36Sopenharmony_ci devbus,rd-setup-ps = <0>; 4962306a36Sopenharmony_ci devbus,rd-hold-ps = <0>; 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_ci /* Write parameters */ 5262306a36Sopenharmony_ci devbus,sync-enable = <0>; 5362306a36Sopenharmony_ci devbus,wr-high-ps = <60000>; 5462306a36Sopenharmony_ci devbus,wr-low-ps = <60000>; 5562306a36Sopenharmony_ci devbus,ale-wr-ps = <60000>; 5662306a36Sopenharmony_ci}; 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_ci&i2c0 { 5962306a36Sopenharmony_ci clock-frequency = <100000>; 6062306a36Sopenharmony_ci status = "okay"; 6162306a36Sopenharmony_ci}; 6262306a36Sopenharmony_ci 6362306a36Sopenharmony_ci&uart0 { 6462306a36Sopenharmony_ci status = "okay"; 6562306a36Sopenharmony_ci}; 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ci&uart1 { 6862306a36Sopenharmony_ci status = "okay"; 6962306a36Sopenharmony_ci}; 7062306a36Sopenharmony_ci 7162306a36Sopenharmony_ci&nand_controller { 7262306a36Sopenharmony_ci status = "okay"; 7362306a36Sopenharmony_ci 7462306a36Sopenharmony_ci nand@0 { 7562306a36Sopenharmony_ci reg = <0>; 7662306a36Sopenharmony_ci label = "pxa3xx_nand-0"; 7762306a36Sopenharmony_ci nand-rb = <0>; 7862306a36Sopenharmony_ci marvell,nand-keep-config; 7962306a36Sopenharmony_ci nand-on-flash-bbt; 8062306a36Sopenharmony_ci nand-ecc-strength = <4>; 8162306a36Sopenharmony_ci nand-ecc-step-size = <512>; 8262306a36Sopenharmony_ci }; 8362306a36Sopenharmony_ci}; 8462306a36Sopenharmony_ci 8562306a36Sopenharmony_ci&sdio { 8662306a36Sopenharmony_ci pinctrl-0 = <&sdio_pins>; 8762306a36Sopenharmony_ci pinctrl-names = "default"; 8862306a36Sopenharmony_ci status = "okay"; 8962306a36Sopenharmony_ci /* No CD or WP GPIOs */ 9062306a36Sopenharmony_ci broken-cd; 9162306a36Sopenharmony_ci}; 9262306a36Sopenharmony_ci 9362306a36Sopenharmony_ci&spi0 { 9462306a36Sopenharmony_ci status = "okay"; 9562306a36Sopenharmony_ci 9662306a36Sopenharmony_ci flash@0 { 9762306a36Sopenharmony_ci #address-cells = <1>; 9862306a36Sopenharmony_ci #size-cells = <1>; 9962306a36Sopenharmony_ci compatible = "m25p64"; 10062306a36Sopenharmony_ci reg = <0>; /* Chip select 0 */ 10162306a36Sopenharmony_ci spi-max-frequency = <20000000>; 10262306a36Sopenharmony_ci m25p,fast-read; 10362306a36Sopenharmony_ci 10462306a36Sopenharmony_ci partition@u-boot { 10562306a36Sopenharmony_ci reg = <0x00000000 0x00100000>; 10662306a36Sopenharmony_ci label = "u-boot"; 10762306a36Sopenharmony_ci }; 10862306a36Sopenharmony_ci partition@u-boot-env { 10962306a36Sopenharmony_ci reg = <0x00100000 0x00040000>; 11062306a36Sopenharmony_ci label = "u-boot-env"; 11162306a36Sopenharmony_ci }; 11262306a36Sopenharmony_ci partition@unused { 11362306a36Sopenharmony_ci reg = <0x00140000 0x00ec0000>; 11462306a36Sopenharmony_ci label = "unused"; 11562306a36Sopenharmony_ci }; 11662306a36Sopenharmony_ci 11762306a36Sopenharmony_ci }; 11862306a36Sopenharmony_ci}; 119