162306a36Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Device Tree file for CRS305-1G-4S board
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Copyright (C) 2016 Allied Telesis Labs
662306a36Sopenharmony_ci * Copyright (C) 2020 Sartura Ltd.
762306a36Sopenharmony_ci *
862306a36Sopenharmony_ci * Based on armada-xp-db.dts
962306a36Sopenharmony_ci *
1062306a36Sopenharmony_ci * Note: this Device Tree assumes that the bootloader has remapped the
1162306a36Sopenharmony_ci * internal registers to 0xf1000000 (instead of the default
1262306a36Sopenharmony_ci * 0xd0000000). The 0xf1000000 is the default used by the recent,
1362306a36Sopenharmony_ci * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
1462306a36Sopenharmony_ci * boards were delivered with an older version of the bootloader that
1562306a36Sopenharmony_ci * left internal registers mapped at 0xd0000000. If you are in this
1662306a36Sopenharmony_ci * situation, you should either update your bootloader (preferred
1762306a36Sopenharmony_ci * solution) or the below Device Tree should be adjusted.
1862306a36Sopenharmony_ci */
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ci/dts-v1/;
2162306a36Sopenharmony_ci#include "armada-xp-98dx3236.dtsi"
2262306a36Sopenharmony_ci
2362306a36Sopenharmony_ci/ {
2462306a36Sopenharmony_ci	model = "CRS305-1G-4S+";
2562306a36Sopenharmony_ci	compatible = "mikrotik,crs305-1g-4s", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
2662306a36Sopenharmony_ci
2762306a36Sopenharmony_ci	chosen {
2862306a36Sopenharmony_ci		bootargs = "console=ttyS0,115200 earlyprintk";
2962306a36Sopenharmony_ci	};
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_ci	memory {
3262306a36Sopenharmony_ci		device_type = "memory";
3362306a36Sopenharmony_ci		reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
3462306a36Sopenharmony_ci	};
3562306a36Sopenharmony_ci};
3662306a36Sopenharmony_ci
3762306a36Sopenharmony_ci&L2 {
3862306a36Sopenharmony_ci	arm,parity-enable;
3962306a36Sopenharmony_ci	marvell,ecc-enable;
4062306a36Sopenharmony_ci};
4162306a36Sopenharmony_ci
4262306a36Sopenharmony_ci&devbus_bootcs {
4362306a36Sopenharmony_ci	status = "okay";
4462306a36Sopenharmony_ci
4562306a36Sopenharmony_ci	/* Device Bus parameters are required */
4662306a36Sopenharmony_ci
4762306a36Sopenharmony_ci	/* Read parameters */
4862306a36Sopenharmony_ci	devbus,bus-width    = <16>;
4962306a36Sopenharmony_ci	devbus,turn-off-ps  = <60000>;
5062306a36Sopenharmony_ci	devbus,badr-skew-ps = <0>;
5162306a36Sopenharmony_ci	devbus,acc-first-ps = <124000>;
5262306a36Sopenharmony_ci	devbus,acc-next-ps  = <248000>;
5362306a36Sopenharmony_ci	devbus,rd-setup-ps  = <0>;
5462306a36Sopenharmony_ci	devbus,rd-hold-ps   = <0>;
5562306a36Sopenharmony_ci
5662306a36Sopenharmony_ci	/* Write parameters */
5762306a36Sopenharmony_ci	devbus,sync-enable = <0>;
5862306a36Sopenharmony_ci	devbus,wr-high-ps  = <60000>;
5962306a36Sopenharmony_ci	devbus,wr-low-ps   = <60000>;
6062306a36Sopenharmony_ci	devbus,ale-wr-ps   = <60000>;
6162306a36Sopenharmony_ci};
6262306a36Sopenharmony_ci
6362306a36Sopenharmony_ci&uart0 {
6462306a36Sopenharmony_ci	status = "okay";
6562306a36Sopenharmony_ci};
6662306a36Sopenharmony_ci
6762306a36Sopenharmony_ci&uart1 {
6862306a36Sopenharmony_ci	status = "okay";
6962306a36Sopenharmony_ci};
7062306a36Sopenharmony_ci
7162306a36Sopenharmony_ci&i2c0 {
7262306a36Sopenharmony_ci	clock-frequency = <100000>;
7362306a36Sopenharmony_ci	status = "okay";
7462306a36Sopenharmony_ci};
7562306a36Sopenharmony_ci
7662306a36Sopenharmony_ci&usb0 {
7762306a36Sopenharmony_ci	status = "okay";
7862306a36Sopenharmony_ci};
7962306a36Sopenharmony_ci
8062306a36Sopenharmony_ci&spi0 {
8162306a36Sopenharmony_ci	status = "okay";
8262306a36Sopenharmony_ci
8362306a36Sopenharmony_ci	flash@0 {
8462306a36Sopenharmony_ci		#address-cells = <1>;
8562306a36Sopenharmony_ci		#size-cells = <1>;
8662306a36Sopenharmony_ci		compatible = "jedec,spi-nor";
8762306a36Sopenharmony_ci		reg = <0>; /* Chip select 0 */
8862306a36Sopenharmony_ci		spi-max-frequency = <108000000>;
8962306a36Sopenharmony_ci		m25p,fast-read;
9062306a36Sopenharmony_ci
9162306a36Sopenharmony_ci		partition@u-boot {
9262306a36Sopenharmony_ci			reg = <0x00000000 0x001f0000>;
9362306a36Sopenharmony_ci			label = "u-boot";
9462306a36Sopenharmony_ci		};
9562306a36Sopenharmony_ci		partition@u-boot-env {
9662306a36Sopenharmony_ci			reg = <0x001f0000 0x00010000>;
9762306a36Sopenharmony_ci			label = "u-boot-env";
9862306a36Sopenharmony_ci		};
9962306a36Sopenharmony_ci		partition@ubi1 {
10062306a36Sopenharmony_ci			reg = <0x00200000 0x00e00000>;
10162306a36Sopenharmony_ci			label = "ubi1";
10262306a36Sopenharmony_ci		};
10362306a36Sopenharmony_ci	};
10462306a36Sopenharmony_ci};
105