162306a36Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Device Tree file for Marvell RD-AXPWiFiAP.
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Note: this board is shipped with a new generation boot loader that
662306a36Sopenharmony_ci * remaps internal registers at 0xf1000000. Therefore, if earlyprintk
762306a36Sopenharmony_ci * is used, the CONFIG_DEBUG_MVEBU_UART0_ALTERNATE option or the
862306a36Sopenharmony_ci * CONFIG_DEBUG_MVEBU_UART1_ALTERNATE option should be used.
962306a36Sopenharmony_ci *
1062306a36Sopenharmony_ci * Copyright (C) 2013 Marvell
1162306a36Sopenharmony_ci *
1262306a36Sopenharmony_ci * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
1362306a36Sopenharmony_ci */
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ci/dts-v1/;
1662306a36Sopenharmony_ci#include <dt-bindings/gpio/gpio.h>
1762306a36Sopenharmony_ci#include <dt-bindings/input/input.h>
1862306a36Sopenharmony_ci#include "armada-xp-mv78230.dtsi"
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ci/ {
2162306a36Sopenharmony_ci	model = "Marvell RD-AXPWiFiAP";
2262306a36Sopenharmony_ci	compatible = "marvell,rd-axpwifiap", "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ci	chosen {
2562306a36Sopenharmony_ci		stdout-path = "serial0:115200n8";
2662306a36Sopenharmony_ci	};
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ci	memory@0 {
2962306a36Sopenharmony_ci		device_type = "memory";
3062306a36Sopenharmony_ci		reg = <0x00000000 0x00000000 0x00000000 0x40000000>; /* 1GB */
3162306a36Sopenharmony_ci	};
3262306a36Sopenharmony_ci
3362306a36Sopenharmony_ci	soc {
3462306a36Sopenharmony_ci		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
3562306a36Sopenharmony_ci			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
3662306a36Sopenharmony_ci			  MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
3762306a36Sopenharmony_ci			  MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ci		internal-regs {
4062306a36Sopenharmony_ci			/* UART0 */
4162306a36Sopenharmony_ci			serial@12000 {
4262306a36Sopenharmony_ci				status = "okay";
4362306a36Sopenharmony_ci			};
4462306a36Sopenharmony_ci
4562306a36Sopenharmony_ci			/* UART1 */
4662306a36Sopenharmony_ci			serial@12100 {
4762306a36Sopenharmony_ci				status = "okay";
4862306a36Sopenharmony_ci			};
4962306a36Sopenharmony_ci
5062306a36Sopenharmony_ci			sata@a0000 {
5162306a36Sopenharmony_ci				nr-ports = <1>;
5262306a36Sopenharmony_ci				status = "okay";
5362306a36Sopenharmony_ci			};
5462306a36Sopenharmony_ci
5562306a36Sopenharmony_ci			ethernet@70000 {
5662306a36Sopenharmony_ci				pinctrl-0 = <&ge0_rgmii_pins>;
5762306a36Sopenharmony_ci				pinctrl-names = "default";
5862306a36Sopenharmony_ci				status = "okay";
5962306a36Sopenharmony_ci				phy = <&phy0>;
6062306a36Sopenharmony_ci				phy-mode = "rgmii-id";
6162306a36Sopenharmony_ci			};
6262306a36Sopenharmony_ci			ethernet@74000 {
6362306a36Sopenharmony_ci				pinctrl-0 = <&ge1_rgmii_pins>;
6462306a36Sopenharmony_ci				pinctrl-names = "default";
6562306a36Sopenharmony_ci				status = "okay";
6662306a36Sopenharmony_ci				phy = <&phy1>;
6762306a36Sopenharmony_ci				phy-mode = "rgmii-id";
6862306a36Sopenharmony_ci			};
6962306a36Sopenharmony_ci		};
7062306a36Sopenharmony_ci	};
7162306a36Sopenharmony_ci
7262306a36Sopenharmony_ci	gpio-keys {
7362306a36Sopenharmony_ci		compatible = "gpio-keys";
7462306a36Sopenharmony_ci		pinctrl-0 = <&keys_pin>;
7562306a36Sopenharmony_ci		pinctrl-names = "default";
7662306a36Sopenharmony_ci
7762306a36Sopenharmony_ci		button-reset {
7862306a36Sopenharmony_ci			label = "Factory Reset Button";
7962306a36Sopenharmony_ci			linux,code = <KEY_SETUP>;
8062306a36Sopenharmony_ci			gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
8162306a36Sopenharmony_ci		};
8262306a36Sopenharmony_ci	};
8362306a36Sopenharmony_ci};
8462306a36Sopenharmony_ci
8562306a36Sopenharmony_ci&mdio {
8662306a36Sopenharmony_ci	phy0: ethernet-phy@0 {
8762306a36Sopenharmony_ci		reg = <0>;
8862306a36Sopenharmony_ci	};
8962306a36Sopenharmony_ci
9062306a36Sopenharmony_ci	phy1: ethernet-phy@1 {
9162306a36Sopenharmony_ci		reg = <1>;
9262306a36Sopenharmony_ci	};
9362306a36Sopenharmony_ci};
9462306a36Sopenharmony_ci
9562306a36Sopenharmony_ci&pciec {
9662306a36Sopenharmony_ci	status = "okay";
9762306a36Sopenharmony_ci
9862306a36Sopenharmony_ci	/* First mini-PCIe port */
9962306a36Sopenharmony_ci	pcie@1,0 {
10062306a36Sopenharmony_ci		/* Port 0, Lane 0 */
10162306a36Sopenharmony_ci		status = "okay";
10262306a36Sopenharmony_ci	};
10362306a36Sopenharmony_ci
10462306a36Sopenharmony_ci	/* Second mini-PCIe port */
10562306a36Sopenharmony_ci	pcie@2,0 {
10662306a36Sopenharmony_ci		/* Port 0, Lane 1 */
10762306a36Sopenharmony_ci		status = "okay";
10862306a36Sopenharmony_ci	};
10962306a36Sopenharmony_ci
11062306a36Sopenharmony_ci	/* Renesas uPD720202 USB 3.0 controller */
11162306a36Sopenharmony_ci	pcie@3,0 {
11262306a36Sopenharmony_ci		/* Port 0, Lane 3 */
11362306a36Sopenharmony_ci		status = "okay";
11462306a36Sopenharmony_ci	};
11562306a36Sopenharmony_ci};
11662306a36Sopenharmony_ci
11762306a36Sopenharmony_ci&pinctrl {
11862306a36Sopenharmony_ci	pinctrl-0 = <&phy_int_pin>;
11962306a36Sopenharmony_ci	pinctrl-names = "default";
12062306a36Sopenharmony_ci
12162306a36Sopenharmony_ci	keys_pin: keys-pin {
12262306a36Sopenharmony_ci		marvell,pins = "mpp33";
12362306a36Sopenharmony_ci		marvell,function = "gpio";
12462306a36Sopenharmony_ci	};
12562306a36Sopenharmony_ci
12662306a36Sopenharmony_ci	phy_int_pin: phy-int-pin {
12762306a36Sopenharmony_ci		marvell,pins = "mpp32";
12862306a36Sopenharmony_ci		marvell,function = "gpio";
12962306a36Sopenharmony_ci	};
13062306a36Sopenharmony_ci};
13162306a36Sopenharmony_ci
13262306a36Sopenharmony_ci&spi0 {
13362306a36Sopenharmony_ci	status = "okay";
13462306a36Sopenharmony_ci
13562306a36Sopenharmony_ci	flash@0 {
13662306a36Sopenharmony_ci		#address-cells = <1>;
13762306a36Sopenharmony_ci		#size-cells = <1>;
13862306a36Sopenharmony_ci		compatible = "n25q128a13", "jedec,spi-nor";
13962306a36Sopenharmony_ci		reg = <0>; /* Chip select 0 */
14062306a36Sopenharmony_ci		spi-max-frequency = <108000000>;
14162306a36Sopenharmony_ci	};
14262306a36Sopenharmony_ci};
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