162306a36Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Device Tree Include file for Marvell 98dx3336 family SoC
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Copyright (C) 2016 Allied Telesis Labs
662306a36Sopenharmony_ci *
762306a36Sopenharmony_ci * Contains definitions specific to the 98dx3236 SoC that are not
862306a36Sopenharmony_ci * common to all Armada XP SoCs.
962306a36Sopenharmony_ci */
1062306a36Sopenharmony_ci
1162306a36Sopenharmony_ci#include "armada-xp-98dx3236.dtsi"
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_ci/ {
1462306a36Sopenharmony_ci	model = "Marvell 98DX3336 SoC";
1562306a36Sopenharmony_ci	compatible = "marvell,armadaxp-98dx3336", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_ci	cpus {
1862306a36Sopenharmony_ci		cpu@1 {
1962306a36Sopenharmony_ci			device_type = "cpu";
2062306a36Sopenharmony_ci			compatible = "marvell,sheeva-v7";
2162306a36Sopenharmony_ci			reg = <1>;
2262306a36Sopenharmony_ci			clocks = <&cpuclk 1>;
2362306a36Sopenharmony_ci			clock-latency = <1000000>;
2462306a36Sopenharmony_ci		};
2562306a36Sopenharmony_ci	};
2662306a36Sopenharmony_ci
2762306a36Sopenharmony_ci	soc {
2862306a36Sopenharmony_ci		internal-regs {
2962306a36Sopenharmony_ci			resume@20980 {
3062306a36Sopenharmony_ci				compatible = "marvell,98dx3336-resume-ctrl";
3162306a36Sopenharmony_ci				reg = <0x20980 0x10>;
3262306a36Sopenharmony_ci			};
3362306a36Sopenharmony_ci		};
3462306a36Sopenharmony_ci	};
3562306a36Sopenharmony_ci};
3662306a36Sopenharmony_ci
3762306a36Sopenharmony_ci&pp0 {
3862306a36Sopenharmony_ci	compatible = "marvell,prestera-98dx3336", "marvell,prestera";
3962306a36Sopenharmony_ci};
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