162306a36Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Device Tree Include file for Marvell Armada 388 SoC. 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (C) 2015 Marvell 662306a36Sopenharmony_ci * 762306a36Sopenharmony_ci * Gregory CLEMENT <gregory.clement@free-electrons.com> 862306a36Sopenharmony_ci * 962306a36Sopenharmony_ci * The main difference with the Armada 385 is that the 388 can handle two more 1062306a36Sopenharmony_ci * SATA ports. So we can reuse the dtsi of the Armada 385, override the pinctrl 1162306a36Sopenharmony_ci * property and the name of the SoC, and add the second SATA host which control 1262306a36Sopenharmony_ci * the 2 other ports. 1362306a36Sopenharmony_ci */ 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ci#include "armada-385.dtsi" 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ci/ { 1862306a36Sopenharmony_ci model = "Marvell Armada 388 family SoC"; 1962306a36Sopenharmony_ci compatible = "marvell,armada388", "marvell,armada385", 2062306a36Sopenharmony_ci "marvell,armada380"; 2162306a36Sopenharmony_ci soc { 2262306a36Sopenharmony_ci internal-regs { 2362306a36Sopenharmony_ci sata@e0000 { 2462306a36Sopenharmony_ci compatible = "marvell,armada-380-ahci"; 2562306a36Sopenharmony_ci reg = <0xe0000 0x2000>; 2662306a36Sopenharmony_ci interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 2762306a36Sopenharmony_ci clocks = <&gateclk 30>; 2862306a36Sopenharmony_ci status = "disabled"; 2962306a36Sopenharmony_ci }; 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ci }; 3262306a36Sopenharmony_ci }; 3362306a36Sopenharmony_ci}; 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ci&pinctrl { 3662306a36Sopenharmony_ci compatible = "marvell,mv88f6828-pinctrl"; 3762306a36Sopenharmony_ci}; 38