162306a36Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Device Tree file for Marvell Armada 388 Reference Design board
462306a36Sopenharmony_ci * (RD-88F6820-AP)
562306a36Sopenharmony_ci *
662306a36Sopenharmony_ci *  Copyright (C) 2014 Marvell
762306a36Sopenharmony_ci *
862306a36Sopenharmony_ci * Gregory CLEMENT <gregory.clement@free-electrons.com>
962306a36Sopenharmony_ci * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
1062306a36Sopenharmony_ci */
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_ci/dts-v1/;
1362306a36Sopenharmony_ci#include "armada-388.dtsi"
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ci/ {
1662306a36Sopenharmony_ci	model = "Marvell Armada 385 Reference Design";
1762306a36Sopenharmony_ci	compatible = "marvell,a385-rd", "marvell,armada388",
1862306a36Sopenharmony_ci		"marvell,armada385","marvell,armada380";
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ci	chosen {
2162306a36Sopenharmony_ci		stdout-path = "serial0:115200n8";
2262306a36Sopenharmony_ci	};
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ci	memory {
2562306a36Sopenharmony_ci		device_type = "memory";
2662306a36Sopenharmony_ci		reg = <0x00000000 0x10000000>; /* 256 MB */
2762306a36Sopenharmony_ci	};
2862306a36Sopenharmony_ci
2962306a36Sopenharmony_ci	soc {
3062306a36Sopenharmony_ci		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
3162306a36Sopenharmony_ci			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
3262306a36Sopenharmony_ci			  MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
3362306a36Sopenharmony_ci			  MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
3462306a36Sopenharmony_ci
3562306a36Sopenharmony_ci		internal-regs {
3662306a36Sopenharmony_ci			i2c@11000 {
3762306a36Sopenharmony_ci				status = "okay";
3862306a36Sopenharmony_ci				clock-frequency = <100000>;
3962306a36Sopenharmony_ci			};
4062306a36Sopenharmony_ci
4162306a36Sopenharmony_ci			sdhci@d8000 {
4262306a36Sopenharmony_ci				pinctrl-names = "default";
4362306a36Sopenharmony_ci				pinctrl-0 = <&sdhci_pins>;
4462306a36Sopenharmony_ci				broken-cd;
4562306a36Sopenharmony_ci				no-1-8-v;
4662306a36Sopenharmony_ci				wp-inverted;
4762306a36Sopenharmony_ci				bus-width = <8>;
4862306a36Sopenharmony_ci				status = "okay";
4962306a36Sopenharmony_ci			};
5062306a36Sopenharmony_ci
5162306a36Sopenharmony_ci			serial@12000 {
5262306a36Sopenharmony_ci				status = "okay";
5362306a36Sopenharmony_ci			};
5462306a36Sopenharmony_ci
5562306a36Sopenharmony_ci			ethernet@30000 {
5662306a36Sopenharmony_ci				status = "okay";
5762306a36Sopenharmony_ci				phy = <&phy0>;
5862306a36Sopenharmony_ci				phy-mode = "rgmii-id";
5962306a36Sopenharmony_ci			};
6062306a36Sopenharmony_ci
6162306a36Sopenharmony_ci			ethernet@70000 {
6262306a36Sopenharmony_ci				status = "okay";
6362306a36Sopenharmony_ci				phy = <&phy1>;
6462306a36Sopenharmony_ci				phy-mode = "rgmii-id";
6562306a36Sopenharmony_ci			};
6662306a36Sopenharmony_ci
6762306a36Sopenharmony_ci
6862306a36Sopenharmony_ci			mdio@72004 {
6962306a36Sopenharmony_ci				phy0: ethernet-phy@0 {
7062306a36Sopenharmony_ci					reg = <0>;
7162306a36Sopenharmony_ci				};
7262306a36Sopenharmony_ci
7362306a36Sopenharmony_ci				phy1: ethernet-phy@1 {
7462306a36Sopenharmony_ci					reg = <1>;
7562306a36Sopenharmony_ci				};
7662306a36Sopenharmony_ci			};
7762306a36Sopenharmony_ci
7862306a36Sopenharmony_ci			usb3@f0000 {
7962306a36Sopenharmony_ci				status = "okay";
8062306a36Sopenharmony_ci			};
8162306a36Sopenharmony_ci		};
8262306a36Sopenharmony_ci
8362306a36Sopenharmony_ci		pcie {
8462306a36Sopenharmony_ci			status = "okay";
8562306a36Sopenharmony_ci			/*
8662306a36Sopenharmony_ci			 * One PCIe units is accessible through
8762306a36Sopenharmony_ci			 * standard PCIe slot on the board.
8862306a36Sopenharmony_ci			 */
8962306a36Sopenharmony_ci			pcie@1,0 {
9062306a36Sopenharmony_ci				/* Port 0, Lane 0 */
9162306a36Sopenharmony_ci				status = "okay";
9262306a36Sopenharmony_ci			};
9362306a36Sopenharmony_ci		};
9462306a36Sopenharmony_ci	};
9562306a36Sopenharmony_ci};
9662306a36Sopenharmony_ci
9762306a36Sopenharmony_ci&spi0 {
9862306a36Sopenharmony_ci	status = "okay";
9962306a36Sopenharmony_ci
10062306a36Sopenharmony_ci	flash@0 {
10162306a36Sopenharmony_ci		#address-cells = <1>;
10262306a36Sopenharmony_ci		#size-cells = <1>;
10362306a36Sopenharmony_ci		compatible = "st,m25p128", "jedec,spi-nor";
10462306a36Sopenharmony_ci		reg = <0>; /* Chip select 0 */
10562306a36Sopenharmony_ci		spi-max-frequency = <108000000>;
10662306a36Sopenharmony_ci	};
10762306a36Sopenharmony_ci};
10862306a36Sopenharmony_ci
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