162306a36Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0 OR MIT)
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Device Tree include file for SolidRun Clearfog 88F6828 based boards
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci *  Copyright (C) 2015 Russell King
662306a36Sopenharmony_ci */
762306a36Sopenharmony_ci
862306a36Sopenharmony_ci#include "armada-388.dtsi"
962306a36Sopenharmony_ci#include "armada-38x-solidrun-microsom.dtsi"
1062306a36Sopenharmony_ci
1162306a36Sopenharmony_ci/ {
1262306a36Sopenharmony_ci	aliases {
1362306a36Sopenharmony_ci		/* So that mvebu u-boot can update the MAC addresses */
1462306a36Sopenharmony_ci		ethernet1 = &eth0;
1562306a36Sopenharmony_ci		ethernet2 = &eth1;
1662306a36Sopenharmony_ci		ethernet3 = &eth2;
1762306a36Sopenharmony_ci	};
1862306a36Sopenharmony_ci
1962306a36Sopenharmony_ci	chosen {
2062306a36Sopenharmony_ci		stdout-path = "serial0:115200n8";
2162306a36Sopenharmony_ci	};
2262306a36Sopenharmony_ci
2362306a36Sopenharmony_ci	reg_3p3v: regulator-3p3v {
2462306a36Sopenharmony_ci		compatible = "regulator-fixed";
2562306a36Sopenharmony_ci		regulator-name = "3P3V";
2662306a36Sopenharmony_ci		regulator-min-microvolt = <3300000>;
2762306a36Sopenharmony_ci		regulator-max-microvolt = <3300000>;
2862306a36Sopenharmony_ci		regulator-always-on;
2962306a36Sopenharmony_ci	};
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_ci	soc {
3262306a36Sopenharmony_ci		internal-regs {
3362306a36Sopenharmony_ci			sata@a8000 {
3462306a36Sopenharmony_ci				/* pinctrl? */
3562306a36Sopenharmony_ci				status = "okay";
3662306a36Sopenharmony_ci			};
3762306a36Sopenharmony_ci
3862306a36Sopenharmony_ci			sata@e0000 {
3962306a36Sopenharmony_ci				/* pinctrl? */
4062306a36Sopenharmony_ci				status = "okay";
4162306a36Sopenharmony_ci			};
4262306a36Sopenharmony_ci
4362306a36Sopenharmony_ci			sdhci@d8000 {
4462306a36Sopenharmony_ci				bus-width = <4>;
4562306a36Sopenharmony_ci				cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
4662306a36Sopenharmony_ci				no-1-8-v;
4762306a36Sopenharmony_ci				pinctrl-0 = <&microsom_sdhci_pins
4862306a36Sopenharmony_ci					     &clearfog_sdhci_cd_pins>;
4962306a36Sopenharmony_ci				pinctrl-names = "default";
5062306a36Sopenharmony_ci				status = "okay";
5162306a36Sopenharmony_ci				vmmc-supply = <&reg_3p3v>;
5262306a36Sopenharmony_ci				wp-inverted;
5362306a36Sopenharmony_ci			};
5462306a36Sopenharmony_ci
5562306a36Sopenharmony_ci			usb@58000 {
5662306a36Sopenharmony_ci				/* CON3, nearest  power. */
5762306a36Sopenharmony_ci				status = "okay";
5862306a36Sopenharmony_ci			};
5962306a36Sopenharmony_ci
6062306a36Sopenharmony_ci			usb3@f8000 {
6162306a36Sopenharmony_ci				/* CON7 */
6262306a36Sopenharmony_ci				status = "okay";
6362306a36Sopenharmony_ci			};
6462306a36Sopenharmony_ci		};
6562306a36Sopenharmony_ci
6662306a36Sopenharmony_ci		pcie {
6762306a36Sopenharmony_ci			status = "okay";
6862306a36Sopenharmony_ci			/*
6962306a36Sopenharmony_ci			 * The two PCIe units are accessible through
7062306a36Sopenharmony_ci			 * the mini-PCIe connectors on the board.
7162306a36Sopenharmony_ci			 */
7262306a36Sopenharmony_ci			pcie@2,0 {
7362306a36Sopenharmony_ci				/* Port 1, Lane 0. CON3, nearest power. */
7462306a36Sopenharmony_ci				reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>;
7562306a36Sopenharmony_ci				status = "okay";
7662306a36Sopenharmony_ci			};
7762306a36Sopenharmony_ci		};
7862306a36Sopenharmony_ci	};
7962306a36Sopenharmony_ci
8062306a36Sopenharmony_ci	sfp: sfp {
8162306a36Sopenharmony_ci		compatible = "sff,sfp";
8262306a36Sopenharmony_ci		i2c-bus = <&i2c1>;
8362306a36Sopenharmony_ci		los-gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
8462306a36Sopenharmony_ci		mod-def0-gpio = <&expander0 15 GPIO_ACTIVE_LOW>;
8562306a36Sopenharmony_ci		tx-disable-gpio = <&expander0 14 GPIO_ACTIVE_HIGH>;
8662306a36Sopenharmony_ci		tx-fault-gpio = <&expander0 13 GPIO_ACTIVE_HIGH>;
8762306a36Sopenharmony_ci		maximum-power-milliwatt = <2000>;
8862306a36Sopenharmony_ci	};
8962306a36Sopenharmony_ci};
9062306a36Sopenharmony_ci
9162306a36Sopenharmony_ci&eth1 {
9262306a36Sopenharmony_ci	/* ethernet@30000 */
9362306a36Sopenharmony_ci	bm,pool-long = <2>;
9462306a36Sopenharmony_ci	bm,pool-short = <1>;
9562306a36Sopenharmony_ci	buffer-manager = <&bm>;
9662306a36Sopenharmony_ci	phys = <&comphy1 1>;
9762306a36Sopenharmony_ci	phy-mode = "sgmii";
9862306a36Sopenharmony_ci	status = "okay";
9962306a36Sopenharmony_ci};
10062306a36Sopenharmony_ci
10162306a36Sopenharmony_ci&eth2 {
10262306a36Sopenharmony_ci	/* ethernet@34000 */
10362306a36Sopenharmony_ci	bm,pool-long = <3>;
10462306a36Sopenharmony_ci	bm,pool-short = <1>;
10562306a36Sopenharmony_ci	buffer-manager = <&bm>;
10662306a36Sopenharmony_ci	managed = "in-band-status";
10762306a36Sopenharmony_ci	phys = <&comphy5 2>;
10862306a36Sopenharmony_ci	phy-mode = "sgmii";
10962306a36Sopenharmony_ci	sfp = <&sfp>;
11062306a36Sopenharmony_ci	status = "okay";
11162306a36Sopenharmony_ci};
11262306a36Sopenharmony_ci
11362306a36Sopenharmony_ci&i2c0 {
11462306a36Sopenharmony_ci	/*
11562306a36Sopenharmony_ci	 * PCA9655 GPIO expander, up to 1MHz clock.
11662306a36Sopenharmony_ci	 *  0-CON3 CLKREQ#
11762306a36Sopenharmony_ci	 *  1-CON3 PERST#
11862306a36Sopenharmony_ci	 *  2-
11962306a36Sopenharmony_ci	 *  3-CON3 W_DISABLE
12062306a36Sopenharmony_ci	 *  4-
12162306a36Sopenharmony_ci	 *  5-USB3 overcurrent
12262306a36Sopenharmony_ci	 *  6-USB3 power
12362306a36Sopenharmony_ci	 *  7-
12462306a36Sopenharmony_ci	 *  8-JP4 P1
12562306a36Sopenharmony_ci	 *  9-JP4 P4
12662306a36Sopenharmony_ci	 * 10-JP4 P5
12762306a36Sopenharmony_ci	 * 11-m.2 DEVSLP
12862306a36Sopenharmony_ci	 * 12-SFP_LOS
12962306a36Sopenharmony_ci	 * 13-SFP_TX_FAULT
13062306a36Sopenharmony_ci	 * 14-SFP_TX_DISABLE
13162306a36Sopenharmony_ci	 * 15-SFP_MOD_DEF0
13262306a36Sopenharmony_ci	 */
13362306a36Sopenharmony_ci	expander0: gpio-expander@20 {
13462306a36Sopenharmony_ci		/*
13562306a36Sopenharmony_ci		 * This is how it should be:
13662306a36Sopenharmony_ci		 * compatible = "onnn,pca9655", "nxp,pca9555";
13762306a36Sopenharmony_ci		 * but you can't do this because of the way I2C works.
13862306a36Sopenharmony_ci		 */
13962306a36Sopenharmony_ci		compatible = "nxp,pca9555";
14062306a36Sopenharmony_ci		gpio-controller;
14162306a36Sopenharmony_ci		#gpio-cells = <2>;
14262306a36Sopenharmony_ci		reg = <0x20>;
14362306a36Sopenharmony_ci
14462306a36Sopenharmony_ci		pcie1-0-clkreq-hog {
14562306a36Sopenharmony_ci			gpio-hog;
14662306a36Sopenharmony_ci			gpios = <0 GPIO_ACTIVE_LOW>;
14762306a36Sopenharmony_ci			input;
14862306a36Sopenharmony_ci			line-name = "pcie1.0-clkreq";
14962306a36Sopenharmony_ci		};
15062306a36Sopenharmony_ci		pcie1-0-w-disable-hog {
15162306a36Sopenharmony_ci			gpio-hog;
15262306a36Sopenharmony_ci			gpios = <3 GPIO_ACTIVE_LOW>;
15362306a36Sopenharmony_ci			output-low;
15462306a36Sopenharmony_ci			line-name = "pcie1.0-w-disable";
15562306a36Sopenharmony_ci		};
15662306a36Sopenharmony_ci		usb3-ilimit-hog {
15762306a36Sopenharmony_ci			gpio-hog;
15862306a36Sopenharmony_ci			gpios = <5 GPIO_ACTIVE_LOW>;
15962306a36Sopenharmony_ci			input;
16062306a36Sopenharmony_ci			line-name = "usb3-current-limit";
16162306a36Sopenharmony_ci		};
16262306a36Sopenharmony_ci		usb3-power-hog {
16362306a36Sopenharmony_ci			gpio-hog;
16462306a36Sopenharmony_ci			gpios = <6 GPIO_ACTIVE_HIGH>;
16562306a36Sopenharmony_ci			output-high;
16662306a36Sopenharmony_ci			line-name = "usb3-power";
16762306a36Sopenharmony_ci		};
16862306a36Sopenharmony_ci		m2-devslp-hog {
16962306a36Sopenharmony_ci			gpio-hog;
17062306a36Sopenharmony_ci			gpios = <11 GPIO_ACTIVE_HIGH>;
17162306a36Sopenharmony_ci			output-low;
17262306a36Sopenharmony_ci			line-name = "m.2 devslp";
17362306a36Sopenharmony_ci		};
17462306a36Sopenharmony_ci	};
17562306a36Sopenharmony_ci
17662306a36Sopenharmony_ci	/* The MCP3021 supports standard and fast modes */
17762306a36Sopenharmony_ci	mikrobus_adc: mcp3021@4c {
17862306a36Sopenharmony_ci		compatible = "microchip,mcp3021";
17962306a36Sopenharmony_ci		reg = <0x4c>;
18062306a36Sopenharmony_ci	};
18162306a36Sopenharmony_ci
18262306a36Sopenharmony_ci	eeprom@52 {
18362306a36Sopenharmony_ci		compatible = "atmel,24c02";
18462306a36Sopenharmony_ci		reg = <0x52>;
18562306a36Sopenharmony_ci		pagesize = <16>;
18662306a36Sopenharmony_ci	};
18762306a36Sopenharmony_ci};
18862306a36Sopenharmony_ci
18962306a36Sopenharmony_ci&i2c1 {
19062306a36Sopenharmony_ci	/*
19162306a36Sopenharmony_ci	 * Routed to SFP, mikrobus, and PCIe.
19262306a36Sopenharmony_ci	 * SFP limits this to 100kHz, and requires an AT24C01A/02/04 with
19362306a36Sopenharmony_ci	 *  address pins tied low, which takes addresses 0x50 and 0x51.
19462306a36Sopenharmony_ci	 * Mikrobus doesn't specify beyond an I2C bus being present.
19562306a36Sopenharmony_ci	 * PCIe uses ARP to assign addresses, or 0x63-0x64.
19662306a36Sopenharmony_ci	 */
19762306a36Sopenharmony_ci	clock-frequency = <100000>;
19862306a36Sopenharmony_ci	pinctrl-0 = <&clearfog_i2c1_pins>;
19962306a36Sopenharmony_ci	pinctrl-names = "default";
20062306a36Sopenharmony_ci	status = "okay";
20162306a36Sopenharmony_ci};
20262306a36Sopenharmony_ci
20362306a36Sopenharmony_ci&pinctrl {
20462306a36Sopenharmony_ci	clearfog_i2c1_pins: i2c1-pins {
20562306a36Sopenharmony_ci		/* SFP, PCIe, mSATA, mikrobus */
20662306a36Sopenharmony_ci		marvell,pins = "mpp26", "mpp27";
20762306a36Sopenharmony_ci		marvell,function = "i2c1";
20862306a36Sopenharmony_ci	};
20962306a36Sopenharmony_ci	clearfog_sdhci_cd_pins: clearfog-sdhci-cd-pins {
21062306a36Sopenharmony_ci		marvell,pins = "mpp20";
21162306a36Sopenharmony_ci		marvell,function = "gpio";
21262306a36Sopenharmony_ci	};
21362306a36Sopenharmony_ci	mikro_pins: mikro-pins {
21462306a36Sopenharmony_ci		/* int: mpp22 rst: mpp29 */
21562306a36Sopenharmony_ci		marvell,pins = "mpp22", "mpp29";
21662306a36Sopenharmony_ci		marvell,function = "gpio";
21762306a36Sopenharmony_ci	};
21862306a36Sopenharmony_ci	mikro_spi_pins: mikro-spi-pins {
21962306a36Sopenharmony_ci		marvell,pins = "mpp43";
22062306a36Sopenharmony_ci		marvell,function = "spi1";
22162306a36Sopenharmony_ci	};
22262306a36Sopenharmony_ci	mikro_uart_pins: mikro-uart-pins {
22362306a36Sopenharmony_ci		marvell,pins = "mpp24", "mpp25";
22462306a36Sopenharmony_ci		marvell,function = "ua1";
22562306a36Sopenharmony_ci	};
22662306a36Sopenharmony_ci};
22762306a36Sopenharmony_ci
22862306a36Sopenharmony_ci&spi1 {
22962306a36Sopenharmony_ci	/*
23062306a36Sopenharmony_ci	 * Add SPI CS pins for clearfog:
23162306a36Sopenharmony_ci	 * CS0: W25Q32
23262306a36Sopenharmony_ci	 * CS1: PIC microcontroller (Pro models)
23362306a36Sopenharmony_ci	 * CS2: mikrobus
23462306a36Sopenharmony_ci	 */
23562306a36Sopenharmony_ci	pinctrl-0 = <&spi1_pins &mikro_spi_pins>;
23662306a36Sopenharmony_ci	pinctrl-names = "default";
23762306a36Sopenharmony_ci	status = "okay";
23862306a36Sopenharmony_ci};
23962306a36Sopenharmony_ci
24062306a36Sopenharmony_ci&uart1 {
24162306a36Sopenharmony_ci	/* mikrobus uart */
24262306a36Sopenharmony_ci	pinctrl-0 = <&mikro_uart_pins>;
24362306a36Sopenharmony_ci	pinctrl-names = "default";
24462306a36Sopenharmony_ci	status = "okay";
24562306a36Sopenharmony_ci};
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