162306a36Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0 OR MIT) 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Device Tree file for Armada 385 Allied Telesis x530/GS980MX Board. 462306a36Sopenharmony_ci (x530/AT-GS980MX) 562306a36Sopenharmony_ci * 662306a36Sopenharmony_ci Copyright (C) 2020 Allied Telesis Labs 762306a36Sopenharmony_ci */ 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci/dts-v1/; 1062306a36Sopenharmony_ci#include "armada-385.dtsi" 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci#include <dt-bindings/gpio/gpio.h> 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ci/ { 1562306a36Sopenharmony_ci model = "x530/AT-GS980MX"; 1662306a36Sopenharmony_ci compatible = "alliedtelesis,gs980mx", "alliedtelesis,x530", "marvell,armada385", "marvell,armada380"; 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci chosen { 1962306a36Sopenharmony_ci stdout-path = "serial1:115200n8"; 2062306a36Sopenharmony_ci }; 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci memory { 2362306a36Sopenharmony_ci device_type = "memory"; 2462306a36Sopenharmony_ci reg = <0x00000000 0x40000000>; /* 1GB */ 2562306a36Sopenharmony_ci }; 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_ci soc { 2862306a36Sopenharmony_ci ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 2962306a36Sopenharmony_ci MBUS_ID(0x01, 0x3d) 0 0xf4800000 0x80000 3062306a36Sopenharmony_ci MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>; 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ci internal-regs { 3362306a36Sopenharmony_ci i2c0: i2c@11000 { 3462306a36Sopenharmony_ci pinctrl-names = "default"; 3562306a36Sopenharmony_ci pinctrl-0 = <&i2c0_pins>; 3662306a36Sopenharmony_ci status = "okay"; 3762306a36Sopenharmony_ci }; 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ci uart0: serial@12000 { 4062306a36Sopenharmony_ci pinctrl-names = "default"; 4162306a36Sopenharmony_ci pinctrl-0 = <&uart0_pins>; 4262306a36Sopenharmony_ci status = "okay"; 4362306a36Sopenharmony_ci }; 4462306a36Sopenharmony_ci }; 4562306a36Sopenharmony_ci }; 4662306a36Sopenharmony_ci}; 4762306a36Sopenharmony_ci 4862306a36Sopenharmony_ci&pciec { 4962306a36Sopenharmony_ci status = "okay"; 5062306a36Sopenharmony_ci}; 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_ci&pcie1 { 5362306a36Sopenharmony_ci status = "okay"; 5462306a36Sopenharmony_ci reset-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; 5562306a36Sopenharmony_ci reset-delay-us = <400000>; 5662306a36Sopenharmony_ci}; 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_ci&pcie2 { 5962306a36Sopenharmony_ci status = "okay"; 6062306a36Sopenharmony_ci}; 6162306a36Sopenharmony_ci 6262306a36Sopenharmony_ci&devbus_cs1 { 6362306a36Sopenharmony_ci compatible = "marvell,mvebu-devbus"; 6462306a36Sopenharmony_ci status = "okay"; 6562306a36Sopenharmony_ci 6662306a36Sopenharmony_ci devbus,bus-width = <8>; 6762306a36Sopenharmony_ci devbus,turn-off-ps = <60000>; 6862306a36Sopenharmony_ci devbus,badr-skew-ps = <0>; 6962306a36Sopenharmony_ci devbus,acc-first-ps = <124000>; 7062306a36Sopenharmony_ci devbus,acc-next-ps = <248000>; 7162306a36Sopenharmony_ci devbus,rd-setup-ps = <0>; 7262306a36Sopenharmony_ci devbus,rd-hold-ps = <0>; 7362306a36Sopenharmony_ci 7462306a36Sopenharmony_ci /* Write parameters */ 7562306a36Sopenharmony_ci devbus,sync-enable = <0>; 7662306a36Sopenharmony_ci devbus,wr-high-ps = <60000>; 7762306a36Sopenharmony_ci devbus,wr-low-ps = <60000>; 7862306a36Sopenharmony_ci devbus,ale-wr-ps = <60000>; 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_ci nvs@0 { 8162306a36Sopenharmony_ci status = "okay"; 8262306a36Sopenharmony_ci 8362306a36Sopenharmony_ci compatible = "mtd-ram"; 8462306a36Sopenharmony_ci reg = <0 0x00080000>; 8562306a36Sopenharmony_ci bank-width = <1>; 8662306a36Sopenharmony_ci label = "nvs"; 8762306a36Sopenharmony_ci }; 8862306a36Sopenharmony_ci}; 8962306a36Sopenharmony_ci 9062306a36Sopenharmony_ci&pinctrl { 9162306a36Sopenharmony_ci i2c0_gpio_pins: i2c-gpio-pins-0 { 9262306a36Sopenharmony_ci marvell,pins = "mpp2", "mpp3"; 9362306a36Sopenharmony_ci marvell,function = "gpio"; 9462306a36Sopenharmony_ci }; 9562306a36Sopenharmony_ci}; 9662306a36Sopenharmony_ci 9762306a36Sopenharmony_ci&i2c0 { 9862306a36Sopenharmony_ci clock-frequency = <100000>; 9962306a36Sopenharmony_ci status = "okay"; 10062306a36Sopenharmony_ci 10162306a36Sopenharmony_ci pinctrl-names = "default", "gpio"; 10262306a36Sopenharmony_ci pinctrl-0 = <&i2c0_pins>; 10362306a36Sopenharmony_ci pinctrl-1 = <&i2c0_gpio_pins>; 10462306a36Sopenharmony_ci scl-gpio = <&gpio0 2 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; 10562306a36Sopenharmony_ci sda-gpio = <&gpio0 3 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; 10662306a36Sopenharmony_ci 10762306a36Sopenharmony_ci i2c0mux: mux@71 { 10862306a36Sopenharmony_ci #address-cells = <1>; 10962306a36Sopenharmony_ci #size-cells = <0>; 11062306a36Sopenharmony_ci compatible = "nxp,pca9544"; 11162306a36Sopenharmony_ci reg = <0x71>; 11262306a36Sopenharmony_ci i2c-mux-idle-disconnect; 11362306a36Sopenharmony_ci 11462306a36Sopenharmony_ci i2c@0 { /* POE devices MUX */ 11562306a36Sopenharmony_ci #address-cells = <1>; 11662306a36Sopenharmony_ci #size-cells = <0>; 11762306a36Sopenharmony_ci reg = <0>; 11862306a36Sopenharmony_ci }; 11962306a36Sopenharmony_ci 12062306a36Sopenharmony_ci i2c@1 { 12162306a36Sopenharmony_ci #address-cells = <1>; 12262306a36Sopenharmony_ci #size-cells = <0>; 12362306a36Sopenharmony_ci reg = <1>; 12462306a36Sopenharmony_ci 12562306a36Sopenharmony_ci adt7476_2e: hwmon@2e { 12662306a36Sopenharmony_ci compatible = "adi,adt7476"; 12762306a36Sopenharmony_ci reg = <0x2e>; 12862306a36Sopenharmony_ci }; 12962306a36Sopenharmony_ci 13062306a36Sopenharmony_ci adt7476_2d: hwmon@2d { 13162306a36Sopenharmony_ci compatible = "adi,adt7476"; 13262306a36Sopenharmony_ci reg = <0x2d>; 13362306a36Sopenharmony_ci }; 13462306a36Sopenharmony_ci }; 13562306a36Sopenharmony_ci 13662306a36Sopenharmony_ci i2c@2 { 13762306a36Sopenharmony_ci #address-cells = <1>; 13862306a36Sopenharmony_ci #size-cells = <0>; 13962306a36Sopenharmony_ci reg = <2>; 14062306a36Sopenharmony_ci 14162306a36Sopenharmony_ci rtc@68 { 14262306a36Sopenharmony_ci compatible = "dallas,ds1340"; 14362306a36Sopenharmony_ci reg = <0x68>; 14462306a36Sopenharmony_ci }; 14562306a36Sopenharmony_ci }; 14662306a36Sopenharmony_ci 14762306a36Sopenharmony_ci i2c@3 { 14862306a36Sopenharmony_ci #address-cells = <1>; 14962306a36Sopenharmony_ci #size-cells = <0>; 15062306a36Sopenharmony_ci reg = <3>; 15162306a36Sopenharmony_ci 15262306a36Sopenharmony_ci gpio@20 { 15362306a36Sopenharmony_ci compatible = "nxp,pca9554"; 15462306a36Sopenharmony_ci gpio-controller; 15562306a36Sopenharmony_ci #gpio-cells = <2>; 15662306a36Sopenharmony_ci reg = <0x20>; 15762306a36Sopenharmony_ci }; 15862306a36Sopenharmony_ci }; 15962306a36Sopenharmony_ci }; 16062306a36Sopenharmony_ci}; 16162306a36Sopenharmony_ci 16262306a36Sopenharmony_ci&usb0 { 16362306a36Sopenharmony_ci status = "okay"; 16462306a36Sopenharmony_ci}; 16562306a36Sopenharmony_ci 16662306a36Sopenharmony_ci&spi1 { 16762306a36Sopenharmony_ci pinctrl-names = "default"; 16862306a36Sopenharmony_ci pinctrl-0 = <&spi1_pins>; 16962306a36Sopenharmony_ci status = "okay"; 17062306a36Sopenharmony_ci 17162306a36Sopenharmony_ci flash@1 { 17262306a36Sopenharmony_ci #address-cells = <1>; 17362306a36Sopenharmony_ci #size-cells = <1>; 17462306a36Sopenharmony_ci compatible = "jedec,spi-nor"; 17562306a36Sopenharmony_ci reg = <1>; /* Chip select 1 */ 17662306a36Sopenharmony_ci spi-max-frequency = <54000000>; 17762306a36Sopenharmony_ci 17862306a36Sopenharmony_ci partitions { 17962306a36Sopenharmony_ci compatible = "fixed-partitions"; 18062306a36Sopenharmony_ci #address-cells = <1>; 18162306a36Sopenharmony_ci #size-cells = <1>; 18262306a36Sopenharmony_ci partition@0 { 18362306a36Sopenharmony_ci reg = <0x00000000 0x00100000>; 18462306a36Sopenharmony_ci label = "u-boot"; 18562306a36Sopenharmony_ci }; 18662306a36Sopenharmony_ci partition@100000 { 18762306a36Sopenharmony_ci reg = <0x00100000 0x00040000>; 18862306a36Sopenharmony_ci label = "u-boot-env"; 18962306a36Sopenharmony_ci }; 19062306a36Sopenharmony_ci partition@140000 { 19162306a36Sopenharmony_ci reg = <0x00140000 0x00e80000>; 19262306a36Sopenharmony_ci label = "unused"; 19362306a36Sopenharmony_ci }; 19462306a36Sopenharmony_ci partition@fc0000 { 19562306a36Sopenharmony_ci reg = <0x00fc0000 0x00040000>; 19662306a36Sopenharmony_ci label = "idprom"; 19762306a36Sopenharmony_ci }; 19862306a36Sopenharmony_ci }; 19962306a36Sopenharmony_ci }; 20062306a36Sopenharmony_ci}; 20162306a36Sopenharmony_ci 20262306a36Sopenharmony_ci&nand_controller { 20362306a36Sopenharmony_ci status = "okay"; 20462306a36Sopenharmony_ci 20562306a36Sopenharmony_ci nand@0 { 20662306a36Sopenharmony_ci reg = <0>; 20762306a36Sopenharmony_ci label = "pxa3xx_nand-0"; 20862306a36Sopenharmony_ci nand-rb = <0>; 20962306a36Sopenharmony_ci nand-on-flash-bbt; 21062306a36Sopenharmony_ci nand-ecc-strength = <4>; 21162306a36Sopenharmony_ci nand-ecc-step-size = <512>; 21262306a36Sopenharmony_ci 21362306a36Sopenharmony_ci marvell,nand-enable-arbiter; 21462306a36Sopenharmony_ci 21562306a36Sopenharmony_ci partitions { 21662306a36Sopenharmony_ci compatible = "fixed-partitions"; 21762306a36Sopenharmony_ci #address-cells = <1>; 21862306a36Sopenharmony_ci #size-cells = <1>; 21962306a36Sopenharmony_ci partition@0 { 22062306a36Sopenharmony_ci reg = <0x00000000 0x0f000000>; 22162306a36Sopenharmony_ci label = "user"; 22262306a36Sopenharmony_ci }; 22362306a36Sopenharmony_ci partition@f000000 { 22462306a36Sopenharmony_ci /* Maximum mtdoops size is 8MB, so set to that. */ 22562306a36Sopenharmony_ci reg = <0x0f000000 0x00800000>; 22662306a36Sopenharmony_ci label = "errlog"; 22762306a36Sopenharmony_ci }; 22862306a36Sopenharmony_ci partition@f800000 { 22962306a36Sopenharmony_ci reg = <0x0f800000 0x00800000>; 23062306a36Sopenharmony_ci label = "nand-bbt"; 23162306a36Sopenharmony_ci }; 23262306a36Sopenharmony_ci }; 23362306a36Sopenharmony_ci }; 23462306a36Sopenharmony_ci}; 23562306a36Sopenharmony_ci 236