162306a36Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
462306a36Sopenharmony_ci */
562306a36Sopenharmony_ci
662306a36Sopenharmony_ci#include "sunxi-bananapi-m2-plus.dtsi"
762306a36Sopenharmony_ci
862306a36Sopenharmony_ci/ {
962306a36Sopenharmony_ci	/*
1062306a36Sopenharmony_ci	 * Bananapi M2+ v1.2 uses a GPIO line to change the effective
1162306a36Sopenharmony_ci	 * resistance on the CPU regulator's feedback pin.
1262306a36Sopenharmony_ci	 */
1362306a36Sopenharmony_ci	reg_vdd_cpux: vdd-cpux {
1462306a36Sopenharmony_ci		compatible = "regulator-gpio";
1562306a36Sopenharmony_ci		regulator-name = "vdd-cpux";
1662306a36Sopenharmony_ci		regulator-type = "voltage";
1762306a36Sopenharmony_ci		regulator-boot-on;
1862306a36Sopenharmony_ci		regulator-always-on;
1962306a36Sopenharmony_ci		regulator-min-microvolt = <1108475>;
2062306a36Sopenharmony_ci		regulator-max-microvolt = <1308475>;
2162306a36Sopenharmony_ci		regulator-ramp-delay = <50>; /* 4ms */
2262306a36Sopenharmony_ci		gpios = <&r_pio 0 1 GPIO_ACTIVE_HIGH>; /* PL1 */
2362306a36Sopenharmony_ci		gpios-states = <0x1>;
2462306a36Sopenharmony_ci		states = <1108475 0>, <1308475 1>;
2562306a36Sopenharmony_ci	};
2662306a36Sopenharmony_ci};
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ci&cpu0 {
2962306a36Sopenharmony_ci	cpu-supply = <&reg_vdd_cpux>;
3062306a36Sopenharmony_ci};
3162306a36Sopenharmony_ci
3262306a36Sopenharmony_ci&cpu1 {
3362306a36Sopenharmony_ci	cpu-supply = <&reg_vdd_cpux>;
3462306a36Sopenharmony_ci};
3562306a36Sopenharmony_ci
3662306a36Sopenharmony_ci&cpu2 {
3762306a36Sopenharmony_ci	cpu-supply = <&reg_vdd_cpux>;
3862306a36Sopenharmony_ci};
3962306a36Sopenharmony_ci
4062306a36Sopenharmony_ci&cpu3 {
4162306a36Sopenharmony_ci	cpu-supply = <&reg_vdd_cpux>;
4262306a36Sopenharmony_ci};
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