162306a36Sopenharmony_ci/* 262306a36Sopenharmony_ci * Copyright 2017 Chen-Yu Tsai <wens@csie.org> 362306a36Sopenharmony_ci * Copyright 2017 Icenowy Zheng <icenowy@aosc.io> 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * This file is dual-licensed: you can use it either under the terms 662306a36Sopenharmony_ci * of the GPL or the X11 license, at your option. Note that this dual 762306a36Sopenharmony_ci * licensing only applies to this file, and not this project as a 862306a36Sopenharmony_ci * whole. 962306a36Sopenharmony_ci * 1062306a36Sopenharmony_ci * a) This file is free software; you can redistribute it and/or 1162306a36Sopenharmony_ci * modify it under the terms of the GNU General Public License as 1262306a36Sopenharmony_ci * published by the Free Software Foundation; either version 2 of the 1362306a36Sopenharmony_ci * License, or (at your option) any later version. 1462306a36Sopenharmony_ci * 1562306a36Sopenharmony_ci * This file is distributed in the hope that it will be useful, 1662306a36Sopenharmony_ci * but WITHOUT ANY WARRANTY; without even the implied warranty of 1762306a36Sopenharmony_ci * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1862306a36Sopenharmony_ci * GNU General Public License for more details. 1962306a36Sopenharmony_ci * 2062306a36Sopenharmony_ci * Or, alternatively, 2162306a36Sopenharmony_ci * 2262306a36Sopenharmony_ci * b) Permission is hereby granted, free of charge, to any person 2362306a36Sopenharmony_ci * obtaining a copy of this software and associated documentation 2462306a36Sopenharmony_ci * files (the "Software"), to deal in the Software without 2562306a36Sopenharmony_ci * restriction, including without limitation the rights to use, 2662306a36Sopenharmony_ci * copy, modify, merge, publish, distribute, sublicense, and/or 2762306a36Sopenharmony_ci * sell copies of the Software, and to permit persons to whom the 2862306a36Sopenharmony_ci * Software is furnished to do so, subject to the following 2962306a36Sopenharmony_ci * conditions: 3062306a36Sopenharmony_ci * 3162306a36Sopenharmony_ci * The above copyright notice and this permission notice shall be 3262306a36Sopenharmony_ci * included in all copies or substantial portions of the Software. 3362306a36Sopenharmony_ci * 3462306a36Sopenharmony_ci * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 3562306a36Sopenharmony_ci * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 3662306a36Sopenharmony_ci * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 3762306a36Sopenharmony_ci * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 3862306a36Sopenharmony_ci * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 3962306a36Sopenharmony_ci * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 4062306a36Sopenharmony_ci * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 4162306a36Sopenharmony_ci * OTHER DEALINGS IN THE SOFTWARE. 4262306a36Sopenharmony_ci */ 4362306a36Sopenharmony_ci 4462306a36Sopenharmony_ci#include <dt-bindings/interrupt-controller/arm-gic.h> 4562306a36Sopenharmony_ci#include <dt-bindings/clock/sun6i-rtc.h> 4662306a36Sopenharmony_ci#include <dt-bindings/clock/sun8i-de2.h> 4762306a36Sopenharmony_ci#include <dt-bindings/clock/sun8i-r40-ccu.h> 4862306a36Sopenharmony_ci#include <dt-bindings/clock/sun8i-tcon-top.h> 4962306a36Sopenharmony_ci#include <dt-bindings/reset/sun8i-r40-ccu.h> 5062306a36Sopenharmony_ci#include <dt-bindings/reset/sun8i-de2.h> 5162306a36Sopenharmony_ci#include <dt-bindings/thermal/thermal.h> 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_ci/ { 5462306a36Sopenharmony_ci #address-cells = <1>; 5562306a36Sopenharmony_ci #size-cells = <1>; 5662306a36Sopenharmony_ci interrupt-parent = <&gic>; 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_ci clocks { 5962306a36Sopenharmony_ci #address-cells = <1>; 6062306a36Sopenharmony_ci #size-cells = <1>; 6162306a36Sopenharmony_ci ranges; 6262306a36Sopenharmony_ci 6362306a36Sopenharmony_ci osc24M: osc24M { 6462306a36Sopenharmony_ci #clock-cells = <0>; 6562306a36Sopenharmony_ci compatible = "fixed-clock"; 6662306a36Sopenharmony_ci clock-frequency = <24000000>; 6762306a36Sopenharmony_ci clock-accuracy = <50000>; 6862306a36Sopenharmony_ci clock-output-names = "osc24M"; 6962306a36Sopenharmony_ci }; 7062306a36Sopenharmony_ci 7162306a36Sopenharmony_ci osc32k: osc32k { 7262306a36Sopenharmony_ci #clock-cells = <0>; 7362306a36Sopenharmony_ci compatible = "fixed-clock"; 7462306a36Sopenharmony_ci clock-frequency = <32768>; 7562306a36Sopenharmony_ci clock-accuracy = <20000>; 7662306a36Sopenharmony_ci clock-output-names = "ext-osc32k"; 7762306a36Sopenharmony_ci }; 7862306a36Sopenharmony_ci }; 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_ci cpus { 8162306a36Sopenharmony_ci #address-cells = <1>; 8262306a36Sopenharmony_ci #size-cells = <0>; 8362306a36Sopenharmony_ci 8462306a36Sopenharmony_ci cpu0: cpu@0 { 8562306a36Sopenharmony_ci compatible = "arm,cortex-a7"; 8662306a36Sopenharmony_ci device_type = "cpu"; 8762306a36Sopenharmony_ci reg = <0>; 8862306a36Sopenharmony_ci clocks = <&ccu CLK_CPU>; 8962306a36Sopenharmony_ci clock-names = "cpu"; 9062306a36Sopenharmony_ci #cooling-cells = <2>; 9162306a36Sopenharmony_ci }; 9262306a36Sopenharmony_ci 9362306a36Sopenharmony_ci cpu1: cpu@1 { 9462306a36Sopenharmony_ci compatible = "arm,cortex-a7"; 9562306a36Sopenharmony_ci device_type = "cpu"; 9662306a36Sopenharmony_ci reg = <1>; 9762306a36Sopenharmony_ci clocks = <&ccu CLK_CPU>; 9862306a36Sopenharmony_ci clock-names = "cpu"; 9962306a36Sopenharmony_ci #cooling-cells = <2>; 10062306a36Sopenharmony_ci }; 10162306a36Sopenharmony_ci 10262306a36Sopenharmony_ci cpu2: cpu@2 { 10362306a36Sopenharmony_ci compatible = "arm,cortex-a7"; 10462306a36Sopenharmony_ci device_type = "cpu"; 10562306a36Sopenharmony_ci reg = <2>; 10662306a36Sopenharmony_ci clocks = <&ccu CLK_CPU>; 10762306a36Sopenharmony_ci clock-names = "cpu"; 10862306a36Sopenharmony_ci #cooling-cells = <2>; 10962306a36Sopenharmony_ci }; 11062306a36Sopenharmony_ci 11162306a36Sopenharmony_ci cpu3: cpu@3 { 11262306a36Sopenharmony_ci compatible = "arm,cortex-a7"; 11362306a36Sopenharmony_ci device_type = "cpu"; 11462306a36Sopenharmony_ci reg = <3>; 11562306a36Sopenharmony_ci clocks = <&ccu CLK_CPU>; 11662306a36Sopenharmony_ci clock-names = "cpu"; 11762306a36Sopenharmony_ci #cooling-cells = <2>; 11862306a36Sopenharmony_ci }; 11962306a36Sopenharmony_ci }; 12062306a36Sopenharmony_ci 12162306a36Sopenharmony_ci de: display-engine { 12262306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-display-engine"; 12362306a36Sopenharmony_ci allwinner,pipelines = <&mixer0>, <&mixer1>; 12462306a36Sopenharmony_ci status = "disabled"; 12562306a36Sopenharmony_ci }; 12662306a36Sopenharmony_ci 12762306a36Sopenharmony_ci thermal-zones { 12862306a36Sopenharmony_ci cpu_thermal: cpu0-thermal { 12962306a36Sopenharmony_ci /* milliseconds */ 13062306a36Sopenharmony_ci polling-delay-passive = <0>; 13162306a36Sopenharmony_ci polling-delay = <0>; 13262306a36Sopenharmony_ci thermal-sensors = <&ths 0>; 13362306a36Sopenharmony_ci 13462306a36Sopenharmony_ci trips { 13562306a36Sopenharmony_ci cpu_hot_trip: cpu-hot { 13662306a36Sopenharmony_ci temperature = <80000>; 13762306a36Sopenharmony_ci hysteresis = <2000>; 13862306a36Sopenharmony_ci type = "passive"; 13962306a36Sopenharmony_ci }; 14062306a36Sopenharmony_ci 14162306a36Sopenharmony_ci cpu_very_hot_trip: cpu-very-hot { 14262306a36Sopenharmony_ci temperature = <115000>; 14362306a36Sopenharmony_ci hysteresis = <0>; 14462306a36Sopenharmony_ci type = "critical"; 14562306a36Sopenharmony_ci }; 14662306a36Sopenharmony_ci }; 14762306a36Sopenharmony_ci 14862306a36Sopenharmony_ci cooling-maps { 14962306a36Sopenharmony_ci cpu-hot-limit { 15062306a36Sopenharmony_ci trip = <&cpu_hot_trip>; 15162306a36Sopenharmony_ci cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 15262306a36Sopenharmony_ci <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 15362306a36Sopenharmony_ci <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 15462306a36Sopenharmony_ci <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 15562306a36Sopenharmony_ci }; 15662306a36Sopenharmony_ci }; 15762306a36Sopenharmony_ci }; 15862306a36Sopenharmony_ci 15962306a36Sopenharmony_ci gpu_thermal: gpu-thermal { 16062306a36Sopenharmony_ci /* milliseconds */ 16162306a36Sopenharmony_ci polling-delay-passive = <0>; 16262306a36Sopenharmony_ci polling-delay = <0>; 16362306a36Sopenharmony_ci thermal-sensors = <&ths 1>; 16462306a36Sopenharmony_ci }; 16562306a36Sopenharmony_ci }; 16662306a36Sopenharmony_ci 16762306a36Sopenharmony_ci soc { 16862306a36Sopenharmony_ci compatible = "simple-bus"; 16962306a36Sopenharmony_ci #address-cells = <1>; 17062306a36Sopenharmony_ci #size-cells = <1>; 17162306a36Sopenharmony_ci ranges; 17262306a36Sopenharmony_ci 17362306a36Sopenharmony_ci display_clocks: clock@1000000 { 17462306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-de2-clk", 17562306a36Sopenharmony_ci "allwinner,sun8i-h3-de2-clk"; 17662306a36Sopenharmony_ci reg = <0x01000000 0x10000>; 17762306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_DE>, 17862306a36Sopenharmony_ci <&ccu CLK_DE>; 17962306a36Sopenharmony_ci clock-names = "bus", 18062306a36Sopenharmony_ci "mod"; 18162306a36Sopenharmony_ci resets = <&ccu RST_BUS_DE>; 18262306a36Sopenharmony_ci #clock-cells = <1>; 18362306a36Sopenharmony_ci #reset-cells = <1>; 18462306a36Sopenharmony_ci }; 18562306a36Sopenharmony_ci 18662306a36Sopenharmony_ci mixer0: mixer@1100000 { 18762306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-de2-mixer-0"; 18862306a36Sopenharmony_ci reg = <0x01100000 0x100000>; 18962306a36Sopenharmony_ci clocks = <&display_clocks CLK_BUS_MIXER0>, 19062306a36Sopenharmony_ci <&display_clocks CLK_MIXER0>; 19162306a36Sopenharmony_ci clock-names = "bus", 19262306a36Sopenharmony_ci "mod"; 19362306a36Sopenharmony_ci resets = <&display_clocks RST_MIXER0>; 19462306a36Sopenharmony_ci 19562306a36Sopenharmony_ci ports { 19662306a36Sopenharmony_ci #address-cells = <1>; 19762306a36Sopenharmony_ci #size-cells = <0>; 19862306a36Sopenharmony_ci 19962306a36Sopenharmony_ci mixer0_out: port@1 { 20062306a36Sopenharmony_ci reg = <1>; 20162306a36Sopenharmony_ci mixer0_out_tcon_top: endpoint { 20262306a36Sopenharmony_ci remote-endpoint = <&tcon_top_mixer0_in_mixer0>; 20362306a36Sopenharmony_ci }; 20462306a36Sopenharmony_ci }; 20562306a36Sopenharmony_ci }; 20662306a36Sopenharmony_ci }; 20762306a36Sopenharmony_ci 20862306a36Sopenharmony_ci mixer1: mixer@1200000 { 20962306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-de2-mixer-1"; 21062306a36Sopenharmony_ci reg = <0x01200000 0x100000>; 21162306a36Sopenharmony_ci clocks = <&display_clocks CLK_BUS_MIXER1>, 21262306a36Sopenharmony_ci <&display_clocks CLK_MIXER1>; 21362306a36Sopenharmony_ci clock-names = "bus", 21462306a36Sopenharmony_ci "mod"; 21562306a36Sopenharmony_ci resets = <&display_clocks RST_WB>; 21662306a36Sopenharmony_ci 21762306a36Sopenharmony_ci ports { 21862306a36Sopenharmony_ci #address-cells = <1>; 21962306a36Sopenharmony_ci #size-cells = <0>; 22062306a36Sopenharmony_ci 22162306a36Sopenharmony_ci mixer1_out: port@1 { 22262306a36Sopenharmony_ci reg = <1>; 22362306a36Sopenharmony_ci mixer1_out_tcon_top: endpoint { 22462306a36Sopenharmony_ci remote-endpoint = <&tcon_top_mixer1_in_mixer1>; 22562306a36Sopenharmony_ci }; 22662306a36Sopenharmony_ci }; 22762306a36Sopenharmony_ci }; 22862306a36Sopenharmony_ci }; 22962306a36Sopenharmony_ci 23062306a36Sopenharmony_ci deinterlace: deinterlace@1400000 { 23162306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-deinterlace", 23262306a36Sopenharmony_ci "allwinner,sun8i-h3-deinterlace"; 23362306a36Sopenharmony_ci reg = <0x01400000 0x20000>; 23462306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_DEINTERLACE>, 23562306a36Sopenharmony_ci <&ccu CLK_DEINTERLACE>, 23662306a36Sopenharmony_ci /* 23762306a36Sopenharmony_ci * NOTE: Contrary to what datasheet claims, 23862306a36Sopenharmony_ci * DRAM deinterlace gate doesn't exist and 23962306a36Sopenharmony_ci * it's shared with CSI1. 24062306a36Sopenharmony_ci */ 24162306a36Sopenharmony_ci <&ccu CLK_DRAM_CSI1>; 24262306a36Sopenharmony_ci clock-names = "bus", "mod", "ram"; 24362306a36Sopenharmony_ci resets = <&ccu RST_BUS_DEINTERLACE>; 24462306a36Sopenharmony_ci interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 24562306a36Sopenharmony_ci interconnects = <&mbus 9>; 24662306a36Sopenharmony_ci interconnect-names = "dma-mem"; 24762306a36Sopenharmony_ci }; 24862306a36Sopenharmony_ci 24962306a36Sopenharmony_ci syscon: system-control@1c00000 { 25062306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-system-control", 25162306a36Sopenharmony_ci "allwinner,sun4i-a10-system-control"; 25262306a36Sopenharmony_ci reg = <0x01c00000 0x30>; 25362306a36Sopenharmony_ci #address-cells = <1>; 25462306a36Sopenharmony_ci #size-cells = <1>; 25562306a36Sopenharmony_ci ranges; 25662306a36Sopenharmony_ci 25762306a36Sopenharmony_ci sram_c: sram@1d00000 { 25862306a36Sopenharmony_ci compatible = "mmio-sram"; 25962306a36Sopenharmony_ci reg = <0x01d00000 0xd0000>; 26062306a36Sopenharmony_ci #address-cells = <1>; 26162306a36Sopenharmony_ci #size-cells = <1>; 26262306a36Sopenharmony_ci ranges = <0 0x01d00000 0xd0000>; 26362306a36Sopenharmony_ci 26462306a36Sopenharmony_ci ve_sram: sram-section@0 { 26562306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-sram-c1", 26662306a36Sopenharmony_ci "allwinner,sun4i-a10-sram-c1"; 26762306a36Sopenharmony_ci reg = <0x000000 0x80000>; 26862306a36Sopenharmony_ci }; 26962306a36Sopenharmony_ci }; 27062306a36Sopenharmony_ci }; 27162306a36Sopenharmony_ci 27262306a36Sopenharmony_ci nmi_intc: interrupt-controller@1c00030 { 27362306a36Sopenharmony_ci compatible = "allwinner,sun7i-a20-sc-nmi"; 27462306a36Sopenharmony_ci interrupt-controller; 27562306a36Sopenharmony_ci #interrupt-cells = <2>; 27662306a36Sopenharmony_ci reg = <0x01c00030 0x0c>; 27762306a36Sopenharmony_ci interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; 27862306a36Sopenharmony_ci }; 27962306a36Sopenharmony_ci 28062306a36Sopenharmony_ci dma: dma-controller@1c02000 { 28162306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-dma", 28262306a36Sopenharmony_ci "allwinner,sun50i-a64-dma"; 28362306a36Sopenharmony_ci reg = <0x01c02000 0x1000>; 28462306a36Sopenharmony_ci interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 28562306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_DMA>; 28662306a36Sopenharmony_ci dma-channels = <16>; 28762306a36Sopenharmony_ci dma-requests = <31>; 28862306a36Sopenharmony_ci resets = <&ccu RST_BUS_DMA>; 28962306a36Sopenharmony_ci #dma-cells = <1>; 29062306a36Sopenharmony_ci }; 29162306a36Sopenharmony_ci 29262306a36Sopenharmony_ci spi0: spi@1c05000 { 29362306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-spi", 29462306a36Sopenharmony_ci "allwinner,sun8i-h3-spi"; 29562306a36Sopenharmony_ci reg = <0x01c05000 0x1000>; 29662306a36Sopenharmony_ci interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 29762306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; 29862306a36Sopenharmony_ci clock-names = "ahb", "mod"; 29962306a36Sopenharmony_ci resets = <&ccu RST_BUS_SPI0>; 30062306a36Sopenharmony_ci status = "disabled"; 30162306a36Sopenharmony_ci #address-cells = <1>; 30262306a36Sopenharmony_ci #size-cells = <0>; 30362306a36Sopenharmony_ci }; 30462306a36Sopenharmony_ci 30562306a36Sopenharmony_ci spi1: spi@1c06000 { 30662306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-spi", 30762306a36Sopenharmony_ci "allwinner,sun8i-h3-spi"; 30862306a36Sopenharmony_ci reg = <0x01c06000 0x1000>; 30962306a36Sopenharmony_ci interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 31062306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; 31162306a36Sopenharmony_ci clock-names = "ahb", "mod"; 31262306a36Sopenharmony_ci resets = <&ccu RST_BUS_SPI1>; 31362306a36Sopenharmony_ci status = "disabled"; 31462306a36Sopenharmony_ci #address-cells = <1>; 31562306a36Sopenharmony_ci #size-cells = <0>; 31662306a36Sopenharmony_ci }; 31762306a36Sopenharmony_ci 31862306a36Sopenharmony_ci csi0: csi@1c09000 { 31962306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-csi0", 32062306a36Sopenharmony_ci "allwinner,sun7i-a20-csi0"; 32162306a36Sopenharmony_ci reg = <0x01c09000 0x1000>; 32262306a36Sopenharmony_ci interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; 32362306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_CSI0>, <&ccu CLK_CSI_SCLK>, 32462306a36Sopenharmony_ci <&ccu CLK_DRAM_CSI0>; 32562306a36Sopenharmony_ci clock-names = "bus", "isp", "ram"; 32662306a36Sopenharmony_ci resets = <&ccu RST_BUS_CSI0>; 32762306a36Sopenharmony_ci interconnects = <&mbus 5>; 32862306a36Sopenharmony_ci interconnect-names = "dma-mem"; 32962306a36Sopenharmony_ci status = "disabled"; 33062306a36Sopenharmony_ci }; 33162306a36Sopenharmony_ci 33262306a36Sopenharmony_ci video-codec@1c0e000 { 33362306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-video-engine"; 33462306a36Sopenharmony_ci reg = <0x01c0e000 0x1000>; 33562306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>, 33662306a36Sopenharmony_ci <&ccu CLK_DRAM_VE>; 33762306a36Sopenharmony_ci clock-names = "ahb", "mod", "ram"; 33862306a36Sopenharmony_ci resets = <&ccu RST_BUS_VE>; 33962306a36Sopenharmony_ci interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; 34062306a36Sopenharmony_ci allwinner,sram = <&ve_sram 1>; 34162306a36Sopenharmony_ci }; 34262306a36Sopenharmony_ci 34362306a36Sopenharmony_ci mmc0: mmc@1c0f000 { 34462306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-mmc", 34562306a36Sopenharmony_ci "allwinner,sun50i-a64-mmc"; 34662306a36Sopenharmony_ci reg = <0x01c0f000 0x1000>; 34762306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>; 34862306a36Sopenharmony_ci clock-names = "ahb", "mmc"; 34962306a36Sopenharmony_ci resets = <&ccu RST_BUS_MMC0>; 35062306a36Sopenharmony_ci reset-names = "ahb"; 35162306a36Sopenharmony_ci pinctrl-0 = <&mmc0_pins>; 35262306a36Sopenharmony_ci pinctrl-names = "default"; 35362306a36Sopenharmony_ci interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 35462306a36Sopenharmony_ci status = "disabled"; 35562306a36Sopenharmony_ci #address-cells = <1>; 35662306a36Sopenharmony_ci #size-cells = <0>; 35762306a36Sopenharmony_ci }; 35862306a36Sopenharmony_ci 35962306a36Sopenharmony_ci mmc1: mmc@1c10000 { 36062306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-mmc", 36162306a36Sopenharmony_ci "allwinner,sun50i-a64-mmc"; 36262306a36Sopenharmony_ci reg = <0x01c10000 0x1000>; 36362306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>; 36462306a36Sopenharmony_ci clock-names = "ahb", "mmc"; 36562306a36Sopenharmony_ci resets = <&ccu RST_BUS_MMC1>; 36662306a36Sopenharmony_ci reset-names = "ahb"; 36762306a36Sopenharmony_ci interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 36862306a36Sopenharmony_ci status = "disabled"; 36962306a36Sopenharmony_ci #address-cells = <1>; 37062306a36Sopenharmony_ci #size-cells = <0>; 37162306a36Sopenharmony_ci }; 37262306a36Sopenharmony_ci 37362306a36Sopenharmony_ci mmc2: mmc@1c11000 { 37462306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-emmc", 37562306a36Sopenharmony_ci "allwinner,sun50i-a64-emmc"; 37662306a36Sopenharmony_ci reg = <0x01c11000 0x1000>; 37762306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>; 37862306a36Sopenharmony_ci clock-names = "ahb", "mmc"; 37962306a36Sopenharmony_ci resets = <&ccu RST_BUS_MMC2>; 38062306a36Sopenharmony_ci reset-names = "ahb"; 38162306a36Sopenharmony_ci pinctrl-0 = <&mmc2_pins>; 38262306a36Sopenharmony_ci pinctrl-names = "default"; 38362306a36Sopenharmony_ci interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 38462306a36Sopenharmony_ci status = "disabled"; 38562306a36Sopenharmony_ci #address-cells = <1>; 38662306a36Sopenharmony_ci #size-cells = <0>; 38762306a36Sopenharmony_ci }; 38862306a36Sopenharmony_ci 38962306a36Sopenharmony_ci mmc3: mmc@1c12000 { 39062306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-mmc", 39162306a36Sopenharmony_ci "allwinner,sun50i-a64-mmc"; 39262306a36Sopenharmony_ci reg = <0x01c12000 0x1000>; 39362306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_MMC3>, <&ccu CLK_MMC3>; 39462306a36Sopenharmony_ci clock-names = "ahb", "mmc"; 39562306a36Sopenharmony_ci resets = <&ccu RST_BUS_MMC3>; 39662306a36Sopenharmony_ci reset-names = "ahb"; 39762306a36Sopenharmony_ci pinctrl-0 = <&mmc3_pins>; 39862306a36Sopenharmony_ci pinctrl-names = "default"; 39962306a36Sopenharmony_ci interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; 40062306a36Sopenharmony_ci status = "disabled"; 40162306a36Sopenharmony_ci #address-cells = <1>; 40262306a36Sopenharmony_ci #size-cells = <0>; 40362306a36Sopenharmony_ci }; 40462306a36Sopenharmony_ci 40562306a36Sopenharmony_ci usbphy: phy@1c13400 { 40662306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-usb-phy"; 40762306a36Sopenharmony_ci reg = <0x01c13400 0x14>, 40862306a36Sopenharmony_ci <0x01c14800 0x4>, 40962306a36Sopenharmony_ci <0x01c19800 0x4>, 41062306a36Sopenharmony_ci <0x01c1c800 0x4>; 41162306a36Sopenharmony_ci reg-names = "phy_ctrl", 41262306a36Sopenharmony_ci "pmu0", 41362306a36Sopenharmony_ci "pmu1", 41462306a36Sopenharmony_ci "pmu2"; 41562306a36Sopenharmony_ci clocks = <&ccu CLK_USB_PHY0>, 41662306a36Sopenharmony_ci <&ccu CLK_USB_PHY1>, 41762306a36Sopenharmony_ci <&ccu CLK_USB_PHY2>; 41862306a36Sopenharmony_ci clock-names = "usb0_phy", 41962306a36Sopenharmony_ci "usb1_phy", 42062306a36Sopenharmony_ci "usb2_phy"; 42162306a36Sopenharmony_ci resets = <&ccu RST_USB_PHY0>, 42262306a36Sopenharmony_ci <&ccu RST_USB_PHY1>, 42362306a36Sopenharmony_ci <&ccu RST_USB_PHY2>; 42462306a36Sopenharmony_ci reset-names = "usb0_reset", 42562306a36Sopenharmony_ci "usb1_reset", 42662306a36Sopenharmony_ci "usb2_reset"; 42762306a36Sopenharmony_ci status = "disabled"; 42862306a36Sopenharmony_ci #phy-cells = <1>; 42962306a36Sopenharmony_ci }; 43062306a36Sopenharmony_ci 43162306a36Sopenharmony_ci crypto: crypto@1c15000 { 43262306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-crypto"; 43362306a36Sopenharmony_ci reg = <0x01c15000 0x1000>; 43462306a36Sopenharmony_ci interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; 43562306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>; 43662306a36Sopenharmony_ci clock-names = "bus", "mod"; 43762306a36Sopenharmony_ci resets = <&ccu RST_BUS_CE>; 43862306a36Sopenharmony_ci }; 43962306a36Sopenharmony_ci 44062306a36Sopenharmony_ci spi2: spi@1c17000 { 44162306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-spi", 44262306a36Sopenharmony_ci "allwinner,sun8i-h3-spi"; 44362306a36Sopenharmony_ci reg = <0x01c17000 0x1000>; 44462306a36Sopenharmony_ci interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 44562306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_SPI2>, <&ccu CLK_SPI2>; 44662306a36Sopenharmony_ci clock-names = "ahb", "mod"; 44762306a36Sopenharmony_ci resets = <&ccu RST_BUS_SPI2>; 44862306a36Sopenharmony_ci status = "disabled"; 44962306a36Sopenharmony_ci #address-cells = <1>; 45062306a36Sopenharmony_ci #size-cells = <0>; 45162306a36Sopenharmony_ci }; 45262306a36Sopenharmony_ci 45362306a36Sopenharmony_ci ahci: sata@1c18000 { 45462306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-ahci"; 45562306a36Sopenharmony_ci reg = <0x01c18000 0x1000>; 45662306a36Sopenharmony_ci interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; 45762306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_SATA>, <&ccu CLK_SATA>; 45862306a36Sopenharmony_ci resets = <&ccu RST_BUS_SATA>; 45962306a36Sopenharmony_ci reset-names = "ahci"; 46062306a36Sopenharmony_ci status = "disabled"; 46162306a36Sopenharmony_ci }; 46262306a36Sopenharmony_ci 46362306a36Sopenharmony_ci ehci1: usb@1c19000 { 46462306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-ehci", "generic-ehci"; 46562306a36Sopenharmony_ci reg = <0x01c19000 0x100>; 46662306a36Sopenharmony_ci interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 46762306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_EHCI1>; 46862306a36Sopenharmony_ci resets = <&ccu RST_BUS_EHCI1>; 46962306a36Sopenharmony_ci phys = <&usbphy 1>; 47062306a36Sopenharmony_ci phy-names = "usb"; 47162306a36Sopenharmony_ci status = "disabled"; 47262306a36Sopenharmony_ci }; 47362306a36Sopenharmony_ci 47462306a36Sopenharmony_ci ohci1: usb@1c19400 { 47562306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-ohci", "generic-ohci"; 47662306a36Sopenharmony_ci reg = <0x01c19400 0x100>; 47762306a36Sopenharmony_ci interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; 47862306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_OHCI1>, 47962306a36Sopenharmony_ci <&ccu CLK_USB_OHCI1>; 48062306a36Sopenharmony_ci resets = <&ccu RST_BUS_OHCI1>; 48162306a36Sopenharmony_ci phys = <&usbphy 1>; 48262306a36Sopenharmony_ci phy-names = "usb"; 48362306a36Sopenharmony_ci status = "disabled"; 48462306a36Sopenharmony_ci }; 48562306a36Sopenharmony_ci 48662306a36Sopenharmony_ci ehci2: usb@1c1c000 { 48762306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-ehci", "generic-ehci"; 48862306a36Sopenharmony_ci reg = <0x01c1c000 0x100>; 48962306a36Sopenharmony_ci interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 49062306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_EHCI2>; 49162306a36Sopenharmony_ci resets = <&ccu RST_BUS_EHCI2>; 49262306a36Sopenharmony_ci phys = <&usbphy 2>; 49362306a36Sopenharmony_ci phy-names = "usb"; 49462306a36Sopenharmony_ci status = "disabled"; 49562306a36Sopenharmony_ci }; 49662306a36Sopenharmony_ci 49762306a36Sopenharmony_ci ohci2: usb@1c1c400 { 49862306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-ohci", "generic-ohci"; 49962306a36Sopenharmony_ci reg = <0x01c1c400 0x100>; 50062306a36Sopenharmony_ci interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 50162306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_OHCI2>, 50262306a36Sopenharmony_ci <&ccu CLK_USB_OHCI2>; 50362306a36Sopenharmony_ci resets = <&ccu RST_BUS_OHCI2>; 50462306a36Sopenharmony_ci phys = <&usbphy 2>; 50562306a36Sopenharmony_ci phy-names = "usb"; 50662306a36Sopenharmony_ci status = "disabled"; 50762306a36Sopenharmony_ci }; 50862306a36Sopenharmony_ci 50962306a36Sopenharmony_ci spi3: spi@1c1f000 { 51062306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-spi", 51162306a36Sopenharmony_ci "allwinner,sun8i-h3-spi"; 51262306a36Sopenharmony_ci reg = <0x01c1f000 0x1000>; 51362306a36Sopenharmony_ci interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 51462306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_SPI3>, <&ccu CLK_SPI3>; 51562306a36Sopenharmony_ci clock-names = "ahb", "mod"; 51662306a36Sopenharmony_ci resets = <&ccu RST_BUS_SPI3>; 51762306a36Sopenharmony_ci status = "disabled"; 51862306a36Sopenharmony_ci #address-cells = <1>; 51962306a36Sopenharmony_ci #size-cells = <0>; 52062306a36Sopenharmony_ci }; 52162306a36Sopenharmony_ci 52262306a36Sopenharmony_ci ccu: clock@1c20000 { 52362306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-ccu"; 52462306a36Sopenharmony_ci reg = <0x01c20000 0x400>; 52562306a36Sopenharmony_ci clocks = <&osc24M>, <&rtc CLK_OSC32K>; 52662306a36Sopenharmony_ci clock-names = "hosc", "losc"; 52762306a36Sopenharmony_ci #clock-cells = <1>; 52862306a36Sopenharmony_ci #reset-cells = <1>; 52962306a36Sopenharmony_ci }; 53062306a36Sopenharmony_ci 53162306a36Sopenharmony_ci rtc: rtc@1c20400 { 53262306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-rtc"; 53362306a36Sopenharmony_ci reg = <0x01c20400 0x400>; 53462306a36Sopenharmony_ci interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 53562306a36Sopenharmony_ci clock-output-names = "osc32k", "osc32k-out"; 53662306a36Sopenharmony_ci clocks = <&osc32k>; 53762306a36Sopenharmony_ci #clock-cells = <1>; 53862306a36Sopenharmony_ci }; 53962306a36Sopenharmony_ci 54062306a36Sopenharmony_ci pio: pinctrl@1c20800 { 54162306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-pinctrl"; 54262306a36Sopenharmony_ci reg = <0x01c20800 0x400>; 54362306a36Sopenharmony_ci interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 54462306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, 54562306a36Sopenharmony_ci <&rtc CLK_OSC32K>; 54662306a36Sopenharmony_ci clock-names = "apb", "hosc", "losc"; 54762306a36Sopenharmony_ci gpio-controller; 54862306a36Sopenharmony_ci interrupt-controller; 54962306a36Sopenharmony_ci #interrupt-cells = <3>; 55062306a36Sopenharmony_ci #gpio-cells = <3>; 55162306a36Sopenharmony_ci 55262306a36Sopenharmony_ci can_ph_pins: can-ph-pins { 55362306a36Sopenharmony_ci pins = "PH20", "PH21"; 55462306a36Sopenharmony_ci function = "can"; 55562306a36Sopenharmony_ci }; 55662306a36Sopenharmony_ci 55762306a36Sopenharmony_ci can_pa_pins: can-pa-pins { 55862306a36Sopenharmony_ci pins = "PA16", "PA17"; 55962306a36Sopenharmony_ci function = "can"; 56062306a36Sopenharmony_ci }; 56162306a36Sopenharmony_ci 56262306a36Sopenharmony_ci clk_out_a_pin: clk-out-a-pin { 56362306a36Sopenharmony_ci pins = "PI12"; 56462306a36Sopenharmony_ci function = "clk_out_a"; 56562306a36Sopenharmony_ci }; 56662306a36Sopenharmony_ci 56762306a36Sopenharmony_ci /omit-if-no-ref/ 56862306a36Sopenharmony_ci csi0_8bits_pins: csi0-8bits-pins { 56962306a36Sopenharmony_ci pins = "PE0", "PE2", "PE3", "PE4", "PE5", 57062306a36Sopenharmony_ci "PE6", "PE7", "PE8", "PE9", "PE10", 57162306a36Sopenharmony_ci "PE11"; 57262306a36Sopenharmony_ci function = "csi0"; 57362306a36Sopenharmony_ci }; 57462306a36Sopenharmony_ci 57562306a36Sopenharmony_ci /omit-if-no-ref/ 57662306a36Sopenharmony_ci csi0_mclk_pin: csi0-mclk-pin { 57762306a36Sopenharmony_ci pins = "PE1"; 57862306a36Sopenharmony_ci function = "csi0"; 57962306a36Sopenharmony_ci }; 58062306a36Sopenharmony_ci 58162306a36Sopenharmony_ci gmac_rgmii_pins: gmac-rgmii-pins { 58262306a36Sopenharmony_ci pins = "PA0", "PA1", "PA2", "PA3", 58362306a36Sopenharmony_ci "PA4", "PA5", "PA6", "PA7", 58462306a36Sopenharmony_ci "PA8", "PA10", "PA11", "PA12", 58562306a36Sopenharmony_ci "PA13", "PA15", "PA16"; 58662306a36Sopenharmony_ci function = "gmac"; 58762306a36Sopenharmony_ci /* 58862306a36Sopenharmony_ci * data lines in RGMII mode use DDR mode 58962306a36Sopenharmony_ci * and need a higher signal drive strength 59062306a36Sopenharmony_ci */ 59162306a36Sopenharmony_ci drive-strength = <40>; 59262306a36Sopenharmony_ci }; 59362306a36Sopenharmony_ci 59462306a36Sopenharmony_ci i2c0_pins: i2c0-pins { 59562306a36Sopenharmony_ci pins = "PB0", "PB1"; 59662306a36Sopenharmony_ci function = "i2c0"; 59762306a36Sopenharmony_ci }; 59862306a36Sopenharmony_ci 59962306a36Sopenharmony_ci i2c1_pins: i2c1-pins { 60062306a36Sopenharmony_ci pins = "PB18", "PB19"; 60162306a36Sopenharmony_ci function = "i2c1"; 60262306a36Sopenharmony_ci }; 60362306a36Sopenharmony_ci 60462306a36Sopenharmony_ci i2c2_pins: i2c2-pins { 60562306a36Sopenharmony_ci pins = "PB20", "PB21"; 60662306a36Sopenharmony_ci function = "i2c2"; 60762306a36Sopenharmony_ci }; 60862306a36Sopenharmony_ci 60962306a36Sopenharmony_ci i2c3_pins: i2c3-pins { 61062306a36Sopenharmony_ci pins = "PI0", "PI1"; 61162306a36Sopenharmony_ci function = "i2c3"; 61262306a36Sopenharmony_ci }; 61362306a36Sopenharmony_ci 61462306a36Sopenharmony_ci i2c4_pins: i2c4-pins { 61562306a36Sopenharmony_ci pins = "PI2", "PI3"; 61662306a36Sopenharmony_ci function = "i2c4"; 61762306a36Sopenharmony_ci }; 61862306a36Sopenharmony_ci 61962306a36Sopenharmony_ci ir0_pins: ir0-pins { 62062306a36Sopenharmony_ci pins = "PB4"; 62162306a36Sopenharmony_ci function = "ir0"; 62262306a36Sopenharmony_ci }; 62362306a36Sopenharmony_ci 62462306a36Sopenharmony_ci ir1_pins: ir1-pins { 62562306a36Sopenharmony_ci pins = "PB23"; 62662306a36Sopenharmony_ci function = "ir1"; 62762306a36Sopenharmony_ci }; 62862306a36Sopenharmony_ci 62962306a36Sopenharmony_ci mmc0_pins: mmc0-pins { 63062306a36Sopenharmony_ci pins = "PF0", "PF1", "PF2", 63162306a36Sopenharmony_ci "PF3", "PF4", "PF5"; 63262306a36Sopenharmony_ci function = "mmc0"; 63362306a36Sopenharmony_ci drive-strength = <30>; 63462306a36Sopenharmony_ci bias-pull-up; 63562306a36Sopenharmony_ci }; 63662306a36Sopenharmony_ci 63762306a36Sopenharmony_ci mmc1_pg_pins: mmc1-pg-pins { 63862306a36Sopenharmony_ci pins = "PG0", "PG1", "PG2", 63962306a36Sopenharmony_ci "PG3", "PG4", "PG5"; 64062306a36Sopenharmony_ci function = "mmc1"; 64162306a36Sopenharmony_ci drive-strength = <30>; 64262306a36Sopenharmony_ci bias-pull-up; 64362306a36Sopenharmony_ci }; 64462306a36Sopenharmony_ci 64562306a36Sopenharmony_ci mmc2_pins: mmc2-pins { 64662306a36Sopenharmony_ci pins = "PC5", "PC6", "PC7", "PC8", "PC9", 64762306a36Sopenharmony_ci "PC10", "PC11", "PC12", "PC13", "PC14", 64862306a36Sopenharmony_ci "PC15", "PC24"; 64962306a36Sopenharmony_ci function = "mmc2"; 65062306a36Sopenharmony_ci drive-strength = <30>; 65162306a36Sopenharmony_ci bias-pull-up; 65262306a36Sopenharmony_ci }; 65362306a36Sopenharmony_ci 65462306a36Sopenharmony_ci /omit-if-no-ref/ 65562306a36Sopenharmony_ci mmc3_pins: mmc3-pins { 65662306a36Sopenharmony_ci pins = "PI4", "PI5", "PI6", 65762306a36Sopenharmony_ci "PI7", "PI8", "PI9"; 65862306a36Sopenharmony_ci function = "mmc3"; 65962306a36Sopenharmony_ci drive-strength = <30>; 66062306a36Sopenharmony_ci bias-pull-up; 66162306a36Sopenharmony_ci }; 66262306a36Sopenharmony_ci 66362306a36Sopenharmony_ci /omit-if-no-ref/ 66462306a36Sopenharmony_ci spi0_pc_pins: spi0-pc-pins { 66562306a36Sopenharmony_ci pins = "PC0", "PC1", "PC2"; 66662306a36Sopenharmony_ci function = "spi0"; 66762306a36Sopenharmony_ci }; 66862306a36Sopenharmony_ci 66962306a36Sopenharmony_ci /omit-if-no-ref/ 67062306a36Sopenharmony_ci spi0_cs0_pc_pin: spi0-cs0-pc-pin { 67162306a36Sopenharmony_ci pins = "PC23"; 67262306a36Sopenharmony_ci function = "spi0"; 67362306a36Sopenharmony_ci }; 67462306a36Sopenharmony_ci 67562306a36Sopenharmony_ci /omit-if-no-ref/ 67662306a36Sopenharmony_ci spi1_pi_pins: spi1-pi-pins { 67762306a36Sopenharmony_ci pins = "PI17", "PI18", "PI19"; 67862306a36Sopenharmony_ci function = "spi1"; 67962306a36Sopenharmony_ci }; 68062306a36Sopenharmony_ci 68162306a36Sopenharmony_ci /omit-if-no-ref/ 68262306a36Sopenharmony_ci spi1_cs0_pi_pin: spi1-cs0-pi-pin { 68362306a36Sopenharmony_ci pins = "PI16"; 68462306a36Sopenharmony_ci function = "spi1"; 68562306a36Sopenharmony_ci }; 68662306a36Sopenharmony_ci 68762306a36Sopenharmony_ci /omit-if-no-ref/ 68862306a36Sopenharmony_ci spi1_cs1_pi_pin: spi1-cs1-pi-pin { 68962306a36Sopenharmony_ci pins = "PI15"; 69062306a36Sopenharmony_ci function = "spi1"; 69162306a36Sopenharmony_ci }; 69262306a36Sopenharmony_ci 69362306a36Sopenharmony_ci /omit-if-no-ref/ 69462306a36Sopenharmony_ci uart0_pb_pins: uart0-pb-pins { 69562306a36Sopenharmony_ci pins = "PB22", "PB23"; 69662306a36Sopenharmony_ci function = "uart0"; 69762306a36Sopenharmony_ci }; 69862306a36Sopenharmony_ci 69962306a36Sopenharmony_ci /omit-if-no-ref/ 70062306a36Sopenharmony_ci uart2_pi_pins: uart2-pi-pins { 70162306a36Sopenharmony_ci pins = "PI18", "PI19"; 70262306a36Sopenharmony_ci function = "uart2"; 70362306a36Sopenharmony_ci }; 70462306a36Sopenharmony_ci 70562306a36Sopenharmony_ci /omit-if-no-ref/ 70662306a36Sopenharmony_ci uart2_rts_cts_pi_pins: uart2-rts-cts-pi-pins{ 70762306a36Sopenharmony_ci pins = "PI16", "PI17"; 70862306a36Sopenharmony_ci function = "uart2"; 70962306a36Sopenharmony_ci }; 71062306a36Sopenharmony_ci 71162306a36Sopenharmony_ci /omit-if-no-ref/ 71262306a36Sopenharmony_ci uart3_pg_pins: uart3-pg-pins { 71362306a36Sopenharmony_ci pins = "PG6", "PG7"; 71462306a36Sopenharmony_ci function = "uart3"; 71562306a36Sopenharmony_ci }; 71662306a36Sopenharmony_ci 71762306a36Sopenharmony_ci /omit-if-no-ref/ 71862306a36Sopenharmony_ci uart3_rts_cts_pg_pins: uart3-rts-cts-pg-pins { 71962306a36Sopenharmony_ci pins = "PG8", "PG9"; 72062306a36Sopenharmony_ci function = "uart3"; 72162306a36Sopenharmony_ci }; 72262306a36Sopenharmony_ci 72362306a36Sopenharmony_ci /omit-if-no-ref/ 72462306a36Sopenharmony_ci uart4_pg_pins: uart4-pg-pins { 72562306a36Sopenharmony_ci pins = "PG10", "PG11"; 72662306a36Sopenharmony_ci function = "uart4"; 72762306a36Sopenharmony_ci }; 72862306a36Sopenharmony_ci 72962306a36Sopenharmony_ci /omit-if-no-ref/ 73062306a36Sopenharmony_ci uart5_ph_pins: uart5-ph-pins { 73162306a36Sopenharmony_ci pins = "PH6", "PH7"; 73262306a36Sopenharmony_ci function = "uart5"; 73362306a36Sopenharmony_ci }; 73462306a36Sopenharmony_ci 73562306a36Sopenharmony_ci /omit-if-no-ref/ 73662306a36Sopenharmony_ci uart7_pi_pins: uart7-pi-pins { 73762306a36Sopenharmony_ci pins = "PI20", "PI21"; 73862306a36Sopenharmony_ci function = "uart7"; 73962306a36Sopenharmony_ci }; 74062306a36Sopenharmony_ci }; 74162306a36Sopenharmony_ci 74262306a36Sopenharmony_ci timer@1c20c00 { 74362306a36Sopenharmony_ci compatible = "allwinner,sun4i-a10-timer"; 74462306a36Sopenharmony_ci reg = <0x01c20c00 0x90>; 74562306a36Sopenharmony_ci interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, 74662306a36Sopenharmony_ci <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>, 74762306a36Sopenharmony_ci <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, 74862306a36Sopenharmony_ci <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, 74962306a36Sopenharmony_ci <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 75062306a36Sopenharmony_ci <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; 75162306a36Sopenharmony_ci clocks = <&osc24M>; 75262306a36Sopenharmony_ci }; 75362306a36Sopenharmony_ci 75462306a36Sopenharmony_ci wdt: watchdog@1c20c90 { 75562306a36Sopenharmony_ci compatible = "allwinner,sun4i-a10-wdt"; 75662306a36Sopenharmony_ci reg = <0x01c20c90 0x10>; 75762306a36Sopenharmony_ci interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 75862306a36Sopenharmony_ci clocks = <&osc24M>; 75962306a36Sopenharmony_ci }; 76062306a36Sopenharmony_ci 76162306a36Sopenharmony_ci ir0: ir@1c21800 { 76262306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-ir", 76362306a36Sopenharmony_ci "allwinner,sun6i-a31-ir"; 76462306a36Sopenharmony_ci reg = <0x01c21800 0x400>; 76562306a36Sopenharmony_ci pinctrl-0 = <&ir0_pins>; 76662306a36Sopenharmony_ci pinctrl-names = "default"; 76762306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_IR0>, <&ccu CLK_IR0>; 76862306a36Sopenharmony_ci clock-names = "apb", "ir"; 76962306a36Sopenharmony_ci interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 77062306a36Sopenharmony_ci resets = <&ccu RST_BUS_IR0>; 77162306a36Sopenharmony_ci status = "disabled"; 77262306a36Sopenharmony_ci }; 77362306a36Sopenharmony_ci 77462306a36Sopenharmony_ci ir1: ir@1c21c00 { 77562306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-ir", 77662306a36Sopenharmony_ci "allwinner,sun6i-a31-ir"; 77762306a36Sopenharmony_ci reg = <0x01c21c00 0x400>; 77862306a36Sopenharmony_ci pinctrl-0 = <&ir1_pins>; 77962306a36Sopenharmony_ci pinctrl-names = "default"; 78062306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_IR1>, <&ccu CLK_IR1>; 78162306a36Sopenharmony_ci clock-names = "apb", "ir"; 78262306a36Sopenharmony_ci interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 78362306a36Sopenharmony_ci resets = <&ccu RST_BUS_IR1>; 78462306a36Sopenharmony_ci status = "disabled"; 78562306a36Sopenharmony_ci }; 78662306a36Sopenharmony_ci 78762306a36Sopenharmony_ci i2s0: i2s@1c22000 { 78862306a36Sopenharmony_ci #sound-dai-cells = <0>; 78962306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-i2s", 79062306a36Sopenharmony_ci "allwinner,sun8i-h3-i2s"; 79162306a36Sopenharmony_ci reg = <0x01c22000 0x400>; 79262306a36Sopenharmony_ci interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 79362306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>; 79462306a36Sopenharmony_ci clock-names = "apb", "mod"; 79562306a36Sopenharmony_ci resets = <&ccu RST_BUS_I2S0>; 79662306a36Sopenharmony_ci dmas = <&dma 3>, <&dma 3>; 79762306a36Sopenharmony_ci dma-names = "rx", "tx"; 79862306a36Sopenharmony_ci }; 79962306a36Sopenharmony_ci 80062306a36Sopenharmony_ci i2s1: i2s@1c22400 { 80162306a36Sopenharmony_ci #sound-dai-cells = <0>; 80262306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-i2s", 80362306a36Sopenharmony_ci "allwinner,sun8i-h3-i2s"; 80462306a36Sopenharmony_ci reg = <0x01c22400 0x400>; 80562306a36Sopenharmony_ci interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 80662306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_I2S1>, <&ccu CLK_I2S1>; 80762306a36Sopenharmony_ci clock-names = "apb", "mod"; 80862306a36Sopenharmony_ci resets = <&ccu RST_BUS_I2S1>; 80962306a36Sopenharmony_ci dmas = <&dma 4>, <&dma 4>; 81062306a36Sopenharmony_ci dma-names = "rx", "tx"; 81162306a36Sopenharmony_ci }; 81262306a36Sopenharmony_ci 81362306a36Sopenharmony_ci i2s2: i2s@1c22800 { 81462306a36Sopenharmony_ci #sound-dai-cells = <0>; 81562306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-i2s", 81662306a36Sopenharmony_ci "allwinner,sun8i-h3-i2s"; 81762306a36Sopenharmony_ci reg = <0x01c22800 0x400>; 81862306a36Sopenharmony_ci interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; 81962306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>; 82062306a36Sopenharmony_ci clock-names = "apb", "mod"; 82162306a36Sopenharmony_ci resets = <&ccu RST_BUS_I2S2>; 82262306a36Sopenharmony_ci dmas = <&dma 6>, <&dma 6>; 82362306a36Sopenharmony_ci dma-names = "rx", "tx"; 82462306a36Sopenharmony_ci }; 82562306a36Sopenharmony_ci 82662306a36Sopenharmony_ci ths: thermal-sensor@1c24c00 { 82762306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-ths"; 82862306a36Sopenharmony_ci reg = <0x01c24c00 0x100>; 82962306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>; 83062306a36Sopenharmony_ci clock-names = "bus", "mod"; 83162306a36Sopenharmony_ci interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 83262306a36Sopenharmony_ci resets = <&ccu RST_BUS_THS>; 83362306a36Sopenharmony_ci /* TODO: add nvmem-cells for calibration */ 83462306a36Sopenharmony_ci #thermal-sensor-cells = <1>; 83562306a36Sopenharmony_ci }; 83662306a36Sopenharmony_ci 83762306a36Sopenharmony_ci uart0: serial@1c28000 { 83862306a36Sopenharmony_ci compatible = "snps,dw-apb-uart"; 83962306a36Sopenharmony_ci reg = <0x01c28000 0x400>; 84062306a36Sopenharmony_ci interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; 84162306a36Sopenharmony_ci reg-shift = <2>; 84262306a36Sopenharmony_ci reg-io-width = <4>; 84362306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_UART0>; 84462306a36Sopenharmony_ci resets = <&ccu RST_BUS_UART0>; 84562306a36Sopenharmony_ci status = "disabled"; 84662306a36Sopenharmony_ci }; 84762306a36Sopenharmony_ci 84862306a36Sopenharmony_ci uart1: serial@1c28400 { 84962306a36Sopenharmony_ci compatible = "snps,dw-apb-uart"; 85062306a36Sopenharmony_ci reg = <0x01c28400 0x400>; 85162306a36Sopenharmony_ci interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 85262306a36Sopenharmony_ci reg-shift = <2>; 85362306a36Sopenharmony_ci reg-io-width = <4>; 85462306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_UART1>; 85562306a36Sopenharmony_ci resets = <&ccu RST_BUS_UART1>; 85662306a36Sopenharmony_ci status = "disabled"; 85762306a36Sopenharmony_ci }; 85862306a36Sopenharmony_ci 85962306a36Sopenharmony_ci uart2: serial@1c28800 { 86062306a36Sopenharmony_ci compatible = "snps,dw-apb-uart"; 86162306a36Sopenharmony_ci reg = <0x01c28800 0x400>; 86262306a36Sopenharmony_ci interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 86362306a36Sopenharmony_ci reg-shift = <2>; 86462306a36Sopenharmony_ci reg-io-width = <4>; 86562306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_UART2>; 86662306a36Sopenharmony_ci resets = <&ccu RST_BUS_UART2>; 86762306a36Sopenharmony_ci status = "disabled"; 86862306a36Sopenharmony_ci }; 86962306a36Sopenharmony_ci 87062306a36Sopenharmony_ci uart3: serial@1c28c00 { 87162306a36Sopenharmony_ci compatible = "snps,dw-apb-uart"; 87262306a36Sopenharmony_ci reg = <0x01c28c00 0x400>; 87362306a36Sopenharmony_ci interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 87462306a36Sopenharmony_ci reg-shift = <2>; 87562306a36Sopenharmony_ci reg-io-width = <4>; 87662306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_UART3>; 87762306a36Sopenharmony_ci resets = <&ccu RST_BUS_UART3>; 87862306a36Sopenharmony_ci status = "disabled"; 87962306a36Sopenharmony_ci }; 88062306a36Sopenharmony_ci 88162306a36Sopenharmony_ci uart4: serial@1c29000 { 88262306a36Sopenharmony_ci compatible = "snps,dw-apb-uart"; 88362306a36Sopenharmony_ci reg = <0x01c29000 0x400>; 88462306a36Sopenharmony_ci interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 88562306a36Sopenharmony_ci reg-shift = <2>; 88662306a36Sopenharmony_ci reg-io-width = <4>; 88762306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_UART4>; 88862306a36Sopenharmony_ci resets = <&ccu RST_BUS_UART4>; 88962306a36Sopenharmony_ci status = "disabled"; 89062306a36Sopenharmony_ci }; 89162306a36Sopenharmony_ci 89262306a36Sopenharmony_ci uart5: serial@1c29400 { 89362306a36Sopenharmony_ci compatible = "snps,dw-apb-uart"; 89462306a36Sopenharmony_ci reg = <0x01c29400 0x400>; 89562306a36Sopenharmony_ci interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; 89662306a36Sopenharmony_ci reg-shift = <2>; 89762306a36Sopenharmony_ci reg-io-width = <4>; 89862306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_UART5>; 89962306a36Sopenharmony_ci resets = <&ccu RST_BUS_UART5>; 90062306a36Sopenharmony_ci status = "disabled"; 90162306a36Sopenharmony_ci }; 90262306a36Sopenharmony_ci 90362306a36Sopenharmony_ci uart6: serial@1c29800 { 90462306a36Sopenharmony_ci compatible = "snps,dw-apb-uart"; 90562306a36Sopenharmony_ci reg = <0x01c29800 0x400>; 90662306a36Sopenharmony_ci interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 90762306a36Sopenharmony_ci reg-shift = <2>; 90862306a36Sopenharmony_ci reg-io-width = <4>; 90962306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_UART6>; 91062306a36Sopenharmony_ci resets = <&ccu RST_BUS_UART6>; 91162306a36Sopenharmony_ci status = "disabled"; 91262306a36Sopenharmony_ci }; 91362306a36Sopenharmony_ci 91462306a36Sopenharmony_ci uart7: serial@1c29c00 { 91562306a36Sopenharmony_ci compatible = "snps,dw-apb-uart"; 91662306a36Sopenharmony_ci reg = <0x01c29c00 0x400>; 91762306a36Sopenharmony_ci interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 91862306a36Sopenharmony_ci reg-shift = <2>; 91962306a36Sopenharmony_ci reg-io-width = <4>; 92062306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_UART7>; 92162306a36Sopenharmony_ci resets = <&ccu RST_BUS_UART7>; 92262306a36Sopenharmony_ci status = "disabled"; 92362306a36Sopenharmony_ci }; 92462306a36Sopenharmony_ci 92562306a36Sopenharmony_ci i2c0: i2c@1c2ac00 { 92662306a36Sopenharmony_ci compatible = "allwinner,sun6i-a31-i2c"; 92762306a36Sopenharmony_ci reg = <0x01c2ac00 0x400>; 92862306a36Sopenharmony_ci interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 92962306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_I2C0>; 93062306a36Sopenharmony_ci resets = <&ccu RST_BUS_I2C0>; 93162306a36Sopenharmony_ci pinctrl-0 = <&i2c0_pins>; 93262306a36Sopenharmony_ci pinctrl-names = "default"; 93362306a36Sopenharmony_ci status = "disabled"; 93462306a36Sopenharmony_ci #address-cells = <1>; 93562306a36Sopenharmony_ci #size-cells = <0>; 93662306a36Sopenharmony_ci }; 93762306a36Sopenharmony_ci 93862306a36Sopenharmony_ci i2c1: i2c@1c2b000 { 93962306a36Sopenharmony_ci compatible = "allwinner,sun6i-a31-i2c"; 94062306a36Sopenharmony_ci reg = <0x01c2b000 0x400>; 94162306a36Sopenharmony_ci interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 94262306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_I2C1>; 94362306a36Sopenharmony_ci resets = <&ccu RST_BUS_I2C1>; 94462306a36Sopenharmony_ci pinctrl-0 = <&i2c1_pins>; 94562306a36Sopenharmony_ci pinctrl-names = "default"; 94662306a36Sopenharmony_ci status = "disabled"; 94762306a36Sopenharmony_ci #address-cells = <1>; 94862306a36Sopenharmony_ci #size-cells = <0>; 94962306a36Sopenharmony_ci }; 95062306a36Sopenharmony_ci 95162306a36Sopenharmony_ci i2c2: i2c@1c2b400 { 95262306a36Sopenharmony_ci compatible = "allwinner,sun6i-a31-i2c"; 95362306a36Sopenharmony_ci reg = <0x01c2b400 0x400>; 95462306a36Sopenharmony_ci interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 95562306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_I2C2>; 95662306a36Sopenharmony_ci resets = <&ccu RST_BUS_I2C2>; 95762306a36Sopenharmony_ci pinctrl-0 = <&i2c2_pins>; 95862306a36Sopenharmony_ci pinctrl-names = "default"; 95962306a36Sopenharmony_ci status = "disabled"; 96062306a36Sopenharmony_ci #address-cells = <1>; 96162306a36Sopenharmony_ci #size-cells = <0>; 96262306a36Sopenharmony_ci }; 96362306a36Sopenharmony_ci 96462306a36Sopenharmony_ci i2c3: i2c@1c2b800 { 96562306a36Sopenharmony_ci compatible = "allwinner,sun6i-a31-i2c"; 96662306a36Sopenharmony_ci reg = <0x01c2b800 0x400>; 96762306a36Sopenharmony_ci interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; 96862306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_I2C3>; 96962306a36Sopenharmony_ci resets = <&ccu RST_BUS_I2C3>; 97062306a36Sopenharmony_ci pinctrl-0 = <&i2c3_pins>; 97162306a36Sopenharmony_ci pinctrl-names = "default"; 97262306a36Sopenharmony_ci status = "disabled"; 97362306a36Sopenharmony_ci #address-cells = <1>; 97462306a36Sopenharmony_ci #size-cells = <0>; 97562306a36Sopenharmony_ci }; 97662306a36Sopenharmony_ci 97762306a36Sopenharmony_ci can0: can@1c2bc00 { 97862306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-can"; 97962306a36Sopenharmony_ci reg = <0x01c2bc00 0x400>; 98062306a36Sopenharmony_ci interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 98162306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_CAN>; 98262306a36Sopenharmony_ci resets = <&ccu RST_BUS_CAN>; 98362306a36Sopenharmony_ci status = "disabled"; 98462306a36Sopenharmony_ci }; 98562306a36Sopenharmony_ci 98662306a36Sopenharmony_ci i2c4: i2c@1c2c000 { 98762306a36Sopenharmony_ci compatible = "allwinner,sun6i-a31-i2c"; 98862306a36Sopenharmony_ci reg = <0x01c2c000 0x400>; 98962306a36Sopenharmony_ci interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; 99062306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_I2C4>; 99162306a36Sopenharmony_ci resets = <&ccu RST_BUS_I2C4>; 99262306a36Sopenharmony_ci pinctrl-0 = <&i2c4_pins>; 99362306a36Sopenharmony_ci pinctrl-names = "default"; 99462306a36Sopenharmony_ci status = "disabled"; 99562306a36Sopenharmony_ci #address-cells = <1>; 99662306a36Sopenharmony_ci #size-cells = <0>; 99762306a36Sopenharmony_ci }; 99862306a36Sopenharmony_ci 99962306a36Sopenharmony_ci mali: gpu@1c40000 { 100062306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-mali", "arm,mali-400"; 100162306a36Sopenharmony_ci reg = <0x01c40000 0x10000>; 100262306a36Sopenharmony_ci interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, 100362306a36Sopenharmony_ci <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, 100462306a36Sopenharmony_ci <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>, 100562306a36Sopenharmony_ci <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 100662306a36Sopenharmony_ci <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, 100762306a36Sopenharmony_ci <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>, 100862306a36Sopenharmony_ci <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 100962306a36Sopenharmony_ci interrupt-names = "gp", 101062306a36Sopenharmony_ci "gpmmu", 101162306a36Sopenharmony_ci "pp0", 101262306a36Sopenharmony_ci "ppmmu0", 101362306a36Sopenharmony_ci "pp1", 101462306a36Sopenharmony_ci "ppmmu1", 101562306a36Sopenharmony_ci "pmu"; 101662306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>; 101762306a36Sopenharmony_ci clock-names = "bus", "core"; 101862306a36Sopenharmony_ci resets = <&ccu RST_BUS_GPU>; 101962306a36Sopenharmony_ci }; 102062306a36Sopenharmony_ci 102162306a36Sopenharmony_ci gmac: ethernet@1c50000 { 102262306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-gmac"; 102362306a36Sopenharmony_ci syscon = <&ccu>; 102462306a36Sopenharmony_ci reg = <0x01c50000 0x10000>; 102562306a36Sopenharmony_ci interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 102662306a36Sopenharmony_ci interrupt-names = "macirq"; 102762306a36Sopenharmony_ci resets = <&ccu RST_BUS_GMAC>; 102862306a36Sopenharmony_ci reset-names = "stmmaceth"; 102962306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_GMAC>; 103062306a36Sopenharmony_ci clock-names = "stmmaceth"; 103162306a36Sopenharmony_ci status = "disabled"; 103262306a36Sopenharmony_ci 103362306a36Sopenharmony_ci gmac_mdio: mdio { 103462306a36Sopenharmony_ci compatible = "snps,dwmac-mdio"; 103562306a36Sopenharmony_ci #address-cells = <1>; 103662306a36Sopenharmony_ci #size-cells = <0>; 103762306a36Sopenharmony_ci }; 103862306a36Sopenharmony_ci }; 103962306a36Sopenharmony_ci 104062306a36Sopenharmony_ci mbus: dram-controller@1c62000 { 104162306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-mbus"; 104262306a36Sopenharmony_ci reg = <0x01c62000 0x1000>; 104362306a36Sopenharmony_ci clocks = <&ccu 155>; 104462306a36Sopenharmony_ci #address-cells = <1>; 104562306a36Sopenharmony_ci #size-cells = <1>; 104662306a36Sopenharmony_ci dma-ranges = <0x00000000 0x40000000 0x80000000>; 104762306a36Sopenharmony_ci #interconnect-cells = <1>; 104862306a36Sopenharmony_ci }; 104962306a36Sopenharmony_ci 105062306a36Sopenharmony_ci tcon_top: tcon-top@1c70000 { 105162306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-tcon-top"; 105262306a36Sopenharmony_ci reg = <0x01c70000 0x1000>; 105362306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_TCON_TOP>, 105462306a36Sopenharmony_ci <&ccu CLK_TCON_TV0>, 105562306a36Sopenharmony_ci <&ccu CLK_TVE0>, 105662306a36Sopenharmony_ci <&ccu CLK_TCON_TV1>, 105762306a36Sopenharmony_ci <&ccu CLK_TVE1>, 105862306a36Sopenharmony_ci <&ccu CLK_DSI_DPHY>; 105962306a36Sopenharmony_ci clock-names = "bus", 106062306a36Sopenharmony_ci "tcon-tv0", 106162306a36Sopenharmony_ci "tve0", 106262306a36Sopenharmony_ci "tcon-tv1", 106362306a36Sopenharmony_ci "tve1", 106462306a36Sopenharmony_ci "dsi"; 106562306a36Sopenharmony_ci clock-output-names = "tcon-top-tv0", 106662306a36Sopenharmony_ci "tcon-top-tv1", 106762306a36Sopenharmony_ci "tcon-top-dsi"; 106862306a36Sopenharmony_ci resets = <&ccu RST_BUS_TCON_TOP>; 106962306a36Sopenharmony_ci #clock-cells = <1>; 107062306a36Sopenharmony_ci 107162306a36Sopenharmony_ci ports { 107262306a36Sopenharmony_ci #address-cells = <1>; 107362306a36Sopenharmony_ci #size-cells = <0>; 107462306a36Sopenharmony_ci 107562306a36Sopenharmony_ci tcon_top_mixer0_in: port@0 { 107662306a36Sopenharmony_ci reg = <0>; 107762306a36Sopenharmony_ci 107862306a36Sopenharmony_ci tcon_top_mixer0_in_mixer0: endpoint { 107962306a36Sopenharmony_ci remote-endpoint = <&mixer0_out_tcon_top>; 108062306a36Sopenharmony_ci }; 108162306a36Sopenharmony_ci }; 108262306a36Sopenharmony_ci 108362306a36Sopenharmony_ci tcon_top_mixer0_out: port@1 { 108462306a36Sopenharmony_ci #address-cells = <1>; 108562306a36Sopenharmony_ci #size-cells = <0>; 108662306a36Sopenharmony_ci reg = <1>; 108762306a36Sopenharmony_ci 108862306a36Sopenharmony_ci tcon_top_mixer0_out_tcon_lcd0: endpoint@0 { 108962306a36Sopenharmony_ci reg = <0>; 109062306a36Sopenharmony_ci }; 109162306a36Sopenharmony_ci 109262306a36Sopenharmony_ci tcon_top_mixer0_out_tcon_lcd1: endpoint@1 { 109362306a36Sopenharmony_ci reg = <1>; 109462306a36Sopenharmony_ci }; 109562306a36Sopenharmony_ci 109662306a36Sopenharmony_ci tcon_top_mixer0_out_tcon_tv0: endpoint@2 { 109762306a36Sopenharmony_ci reg = <2>; 109862306a36Sopenharmony_ci remote-endpoint = <&tcon_tv0_in_tcon_top_mixer0>; 109962306a36Sopenharmony_ci }; 110062306a36Sopenharmony_ci 110162306a36Sopenharmony_ci tcon_top_mixer0_out_tcon_tv1: endpoint@3 { 110262306a36Sopenharmony_ci reg = <3>; 110362306a36Sopenharmony_ci remote-endpoint = <&tcon_tv1_in_tcon_top_mixer0>; 110462306a36Sopenharmony_ci }; 110562306a36Sopenharmony_ci }; 110662306a36Sopenharmony_ci 110762306a36Sopenharmony_ci tcon_top_mixer1_in: port@2 { 110862306a36Sopenharmony_ci #address-cells = <1>; 110962306a36Sopenharmony_ci #size-cells = <0>; 111062306a36Sopenharmony_ci reg = <2>; 111162306a36Sopenharmony_ci 111262306a36Sopenharmony_ci tcon_top_mixer1_in_mixer1: endpoint@1 { 111362306a36Sopenharmony_ci reg = <1>; 111462306a36Sopenharmony_ci remote-endpoint = <&mixer1_out_tcon_top>; 111562306a36Sopenharmony_ci }; 111662306a36Sopenharmony_ci }; 111762306a36Sopenharmony_ci 111862306a36Sopenharmony_ci tcon_top_mixer1_out: port@3 { 111962306a36Sopenharmony_ci #address-cells = <1>; 112062306a36Sopenharmony_ci #size-cells = <0>; 112162306a36Sopenharmony_ci reg = <3>; 112262306a36Sopenharmony_ci 112362306a36Sopenharmony_ci tcon_top_mixer1_out_tcon_lcd0: endpoint@0 { 112462306a36Sopenharmony_ci reg = <0>; 112562306a36Sopenharmony_ci }; 112662306a36Sopenharmony_ci 112762306a36Sopenharmony_ci tcon_top_mixer1_out_tcon_lcd1: endpoint@1 { 112862306a36Sopenharmony_ci reg = <1>; 112962306a36Sopenharmony_ci }; 113062306a36Sopenharmony_ci 113162306a36Sopenharmony_ci tcon_top_mixer1_out_tcon_tv0: endpoint@2 { 113262306a36Sopenharmony_ci reg = <2>; 113362306a36Sopenharmony_ci remote-endpoint = <&tcon_tv0_in_tcon_top_mixer1>; 113462306a36Sopenharmony_ci }; 113562306a36Sopenharmony_ci 113662306a36Sopenharmony_ci tcon_top_mixer1_out_tcon_tv1: endpoint@3 { 113762306a36Sopenharmony_ci reg = <3>; 113862306a36Sopenharmony_ci remote-endpoint = <&tcon_tv1_in_tcon_top_mixer1>; 113962306a36Sopenharmony_ci }; 114062306a36Sopenharmony_ci }; 114162306a36Sopenharmony_ci 114262306a36Sopenharmony_ci tcon_top_hdmi_in: port@4 { 114362306a36Sopenharmony_ci #address-cells = <1>; 114462306a36Sopenharmony_ci #size-cells = <0>; 114562306a36Sopenharmony_ci reg = <4>; 114662306a36Sopenharmony_ci 114762306a36Sopenharmony_ci tcon_top_hdmi_in_tcon_tv0: endpoint@0 { 114862306a36Sopenharmony_ci reg = <0>; 114962306a36Sopenharmony_ci remote-endpoint = <&tcon_tv0_out_tcon_top>; 115062306a36Sopenharmony_ci }; 115162306a36Sopenharmony_ci 115262306a36Sopenharmony_ci tcon_top_hdmi_in_tcon_tv1: endpoint@1 { 115362306a36Sopenharmony_ci reg = <1>; 115462306a36Sopenharmony_ci remote-endpoint = <&tcon_tv1_out_tcon_top>; 115562306a36Sopenharmony_ci }; 115662306a36Sopenharmony_ci }; 115762306a36Sopenharmony_ci 115862306a36Sopenharmony_ci tcon_top_hdmi_out: port@5 { 115962306a36Sopenharmony_ci reg = <5>; 116062306a36Sopenharmony_ci 116162306a36Sopenharmony_ci tcon_top_hdmi_out_hdmi: endpoint { 116262306a36Sopenharmony_ci remote-endpoint = <&hdmi_in_tcon_top>; 116362306a36Sopenharmony_ci }; 116462306a36Sopenharmony_ci }; 116562306a36Sopenharmony_ci }; 116662306a36Sopenharmony_ci }; 116762306a36Sopenharmony_ci 116862306a36Sopenharmony_ci tcon_tv0: lcd-controller@1c73000 { 116962306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-tcon-tv"; 117062306a36Sopenharmony_ci reg = <0x01c73000 0x1000>; 117162306a36Sopenharmony_ci interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; 117262306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_TCON_TV0>, <&tcon_top CLK_TCON_TOP_TV0>; 117362306a36Sopenharmony_ci clock-names = "ahb", "tcon-ch1"; 117462306a36Sopenharmony_ci resets = <&ccu RST_BUS_TCON_TV0>; 117562306a36Sopenharmony_ci reset-names = "lcd"; 117662306a36Sopenharmony_ci status = "disabled"; 117762306a36Sopenharmony_ci 117862306a36Sopenharmony_ci ports { 117962306a36Sopenharmony_ci #address-cells = <1>; 118062306a36Sopenharmony_ci #size-cells = <0>; 118162306a36Sopenharmony_ci 118262306a36Sopenharmony_ci tcon_tv0_in: port@0 { 118362306a36Sopenharmony_ci #address-cells = <1>; 118462306a36Sopenharmony_ci #size-cells = <0>; 118562306a36Sopenharmony_ci reg = <0>; 118662306a36Sopenharmony_ci 118762306a36Sopenharmony_ci tcon_tv0_in_tcon_top_mixer0: endpoint@0 { 118862306a36Sopenharmony_ci reg = <0>; 118962306a36Sopenharmony_ci remote-endpoint = <&tcon_top_mixer0_out_tcon_tv0>; 119062306a36Sopenharmony_ci }; 119162306a36Sopenharmony_ci 119262306a36Sopenharmony_ci tcon_tv0_in_tcon_top_mixer1: endpoint@1 { 119362306a36Sopenharmony_ci reg = <1>; 119462306a36Sopenharmony_ci remote-endpoint = <&tcon_top_mixer1_out_tcon_tv0>; 119562306a36Sopenharmony_ci }; 119662306a36Sopenharmony_ci }; 119762306a36Sopenharmony_ci 119862306a36Sopenharmony_ci tcon_tv0_out: port@1 { 119962306a36Sopenharmony_ci #address-cells = <1>; 120062306a36Sopenharmony_ci #size-cells = <0>; 120162306a36Sopenharmony_ci reg = <1>; 120262306a36Sopenharmony_ci 120362306a36Sopenharmony_ci tcon_tv0_out_tcon_top: endpoint@1 { 120462306a36Sopenharmony_ci reg = <1>; 120562306a36Sopenharmony_ci remote-endpoint = <&tcon_top_hdmi_in_tcon_tv0>; 120662306a36Sopenharmony_ci }; 120762306a36Sopenharmony_ci }; 120862306a36Sopenharmony_ci }; 120962306a36Sopenharmony_ci }; 121062306a36Sopenharmony_ci 121162306a36Sopenharmony_ci tcon_tv1: lcd-controller@1c74000 { 121262306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-tcon-tv"; 121362306a36Sopenharmony_ci reg = <0x01c74000 0x1000>; 121462306a36Sopenharmony_ci interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; 121562306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_TCON_TV1>, <&tcon_top CLK_TCON_TOP_TV1>; 121662306a36Sopenharmony_ci clock-names = "ahb", "tcon-ch1"; 121762306a36Sopenharmony_ci resets = <&ccu RST_BUS_TCON_TV1>; 121862306a36Sopenharmony_ci reset-names = "lcd"; 121962306a36Sopenharmony_ci status = "disabled"; 122062306a36Sopenharmony_ci 122162306a36Sopenharmony_ci ports { 122262306a36Sopenharmony_ci #address-cells = <1>; 122362306a36Sopenharmony_ci #size-cells = <0>; 122462306a36Sopenharmony_ci 122562306a36Sopenharmony_ci tcon_tv1_in: port@0 { 122662306a36Sopenharmony_ci #address-cells = <1>; 122762306a36Sopenharmony_ci #size-cells = <0>; 122862306a36Sopenharmony_ci reg = <0>; 122962306a36Sopenharmony_ci 123062306a36Sopenharmony_ci tcon_tv1_in_tcon_top_mixer0: endpoint@0 { 123162306a36Sopenharmony_ci reg = <0>; 123262306a36Sopenharmony_ci remote-endpoint = <&tcon_top_mixer0_out_tcon_tv1>; 123362306a36Sopenharmony_ci }; 123462306a36Sopenharmony_ci 123562306a36Sopenharmony_ci tcon_tv1_in_tcon_top_mixer1: endpoint@1 { 123662306a36Sopenharmony_ci reg = <1>; 123762306a36Sopenharmony_ci remote-endpoint = <&tcon_top_mixer1_out_tcon_tv1>; 123862306a36Sopenharmony_ci }; 123962306a36Sopenharmony_ci }; 124062306a36Sopenharmony_ci 124162306a36Sopenharmony_ci tcon_tv1_out: port@1 { 124262306a36Sopenharmony_ci #address-cells = <1>; 124362306a36Sopenharmony_ci #size-cells = <0>; 124462306a36Sopenharmony_ci reg = <1>; 124562306a36Sopenharmony_ci 124662306a36Sopenharmony_ci tcon_tv1_out_tcon_top: endpoint@1 { 124762306a36Sopenharmony_ci reg = <1>; 124862306a36Sopenharmony_ci remote-endpoint = <&tcon_top_hdmi_in_tcon_tv1>; 124962306a36Sopenharmony_ci }; 125062306a36Sopenharmony_ci }; 125162306a36Sopenharmony_ci }; 125262306a36Sopenharmony_ci }; 125362306a36Sopenharmony_ci 125462306a36Sopenharmony_ci gic: interrupt-controller@1c81000 { 125562306a36Sopenharmony_ci compatible = "arm,gic-400"; 125662306a36Sopenharmony_ci reg = <0x01c81000 0x1000>, 125762306a36Sopenharmony_ci <0x01c82000 0x2000>, 125862306a36Sopenharmony_ci <0x01c84000 0x2000>, 125962306a36Sopenharmony_ci <0x01c86000 0x2000>; 126062306a36Sopenharmony_ci interrupt-controller; 126162306a36Sopenharmony_ci #interrupt-cells = <3>; 126262306a36Sopenharmony_ci interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 126362306a36Sopenharmony_ci }; 126462306a36Sopenharmony_ci 126562306a36Sopenharmony_ci hdmi: hdmi@1ee0000 { 126662306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-dw-hdmi", 126762306a36Sopenharmony_ci "allwinner,sun8i-a83t-dw-hdmi"; 126862306a36Sopenharmony_ci reg = <0x01ee0000 0x10000>; 126962306a36Sopenharmony_ci reg-io-width = <1>; 127062306a36Sopenharmony_ci interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; 127162306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_HDMI0>, <&ccu CLK_HDMI_SLOW>, 127262306a36Sopenharmony_ci <&ccu CLK_HDMI>, <&rtc CLK_OSC32K>; 127362306a36Sopenharmony_ci clock-names = "iahb", "isfr", "tmds", "cec"; 127462306a36Sopenharmony_ci resets = <&ccu RST_BUS_HDMI1>; 127562306a36Sopenharmony_ci reset-names = "ctrl"; 127662306a36Sopenharmony_ci phys = <&hdmi_phy>; 127762306a36Sopenharmony_ci phy-names = "phy"; 127862306a36Sopenharmony_ci status = "disabled"; 127962306a36Sopenharmony_ci 128062306a36Sopenharmony_ci ports { 128162306a36Sopenharmony_ci #address-cells = <1>; 128262306a36Sopenharmony_ci #size-cells = <0>; 128362306a36Sopenharmony_ci 128462306a36Sopenharmony_ci hdmi_in: port@0 { 128562306a36Sopenharmony_ci reg = <0>; 128662306a36Sopenharmony_ci 128762306a36Sopenharmony_ci hdmi_in_tcon_top: endpoint { 128862306a36Sopenharmony_ci remote-endpoint = <&tcon_top_hdmi_out_hdmi>; 128962306a36Sopenharmony_ci }; 129062306a36Sopenharmony_ci }; 129162306a36Sopenharmony_ci 129262306a36Sopenharmony_ci hdmi_out: port@1 { 129362306a36Sopenharmony_ci reg = <1>; 129462306a36Sopenharmony_ci }; 129562306a36Sopenharmony_ci }; 129662306a36Sopenharmony_ci }; 129762306a36Sopenharmony_ci 129862306a36Sopenharmony_ci hdmi_phy: hdmi-phy@1ef0000 { 129962306a36Sopenharmony_ci compatible = "allwinner,sun8i-r40-hdmi-phy"; 130062306a36Sopenharmony_ci reg = <0x01ef0000 0x10000>; 130162306a36Sopenharmony_ci clocks = <&ccu CLK_BUS_HDMI1>, <&ccu CLK_HDMI_SLOW>, 130262306a36Sopenharmony_ci <&ccu CLK_PLL_VIDEO0>, <&ccu CLK_PLL_VIDEO1>; 130362306a36Sopenharmony_ci clock-names = "bus", "mod", "pll-0", "pll-1"; 130462306a36Sopenharmony_ci resets = <&ccu RST_BUS_HDMI0>; 130562306a36Sopenharmony_ci reset-names = "phy"; 130662306a36Sopenharmony_ci #phy-cells = <0>; 130762306a36Sopenharmony_ci }; 130862306a36Sopenharmony_ci }; 130962306a36Sopenharmony_ci 131062306a36Sopenharmony_ci pmu { 131162306a36Sopenharmony_ci compatible = "arm,cortex-a7-pmu"; 131262306a36Sopenharmony_ci interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 131362306a36Sopenharmony_ci <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 131462306a36Sopenharmony_ci <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 131562306a36Sopenharmony_ci <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; 131662306a36Sopenharmony_ci interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 131762306a36Sopenharmony_ci }; 131862306a36Sopenharmony_ci 131962306a36Sopenharmony_ci timer { 132062306a36Sopenharmony_ci compatible = "arm,armv7-timer"; 132162306a36Sopenharmony_ci interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 132262306a36Sopenharmony_ci <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 132362306a36Sopenharmony_ci <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 132462306a36Sopenharmony_ci <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 132562306a36Sopenharmony_ci }; 132662306a36Sopenharmony_ci}; 1327