162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_ci# 362306a36Sopenharmony_ci# Kconfig for uClinux(non-paged MM) depend configurations 462306a36Sopenharmony_ci# Hyok S. Choi <hyok.choi@samsung.com> 562306a36Sopenharmony_ci# 662306a36Sopenharmony_ci 762306a36Sopenharmony_ciconfig SET_MEM_PARAM 862306a36Sopenharmony_ci bool "Set flash/sdram size and base addr" 962306a36Sopenharmony_ci help 1062306a36Sopenharmony_ci Say Y to manually set the base addresses and sizes. 1162306a36Sopenharmony_ci otherwise, the default values are assigned. 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ciconfig DRAM_BASE 1462306a36Sopenharmony_ci hex '(S)DRAM Base Address' if SET_MEM_PARAM 1562306a36Sopenharmony_ci default 0x00800000 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ciconfig DRAM_SIZE 1862306a36Sopenharmony_ci hex '(S)DRAM SIZE' if SET_MEM_PARAM 1962306a36Sopenharmony_ci default 0x00800000 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ciconfig FLASH_MEM_BASE 2262306a36Sopenharmony_ci hex 'FLASH Base Address' if SET_MEM_PARAM 2362306a36Sopenharmony_ci depends on CPU_ARM740T || CPU_ARM946E || CPU_ARM940T 2462306a36Sopenharmony_ci default 0x00400000 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ciconfig FLASH_SIZE 2762306a36Sopenharmony_ci hex 'FLASH Size' if SET_MEM_PARAM 2862306a36Sopenharmony_ci depends on CPU_ARM740T || CPU_ARM946E || CPU_ARM940T 2962306a36Sopenharmony_ci default 0x00400000 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ciconfig PROCESSOR_ID 3262306a36Sopenharmony_ci hex 'Hard wire the processor ID' 3362306a36Sopenharmony_ci default 0x00007700 3462306a36Sopenharmony_ci depends on !(CPU_CP15 || CPU_V7M) 3562306a36Sopenharmony_ci help 3662306a36Sopenharmony_ci If processor has no CP15 register, this processor ID is 3762306a36Sopenharmony_ci used instead of the auto-probing which utilizes the register. 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ciconfig REMAP_VECTORS_TO_RAM 4062306a36Sopenharmony_ci bool 'Install vectors to the beginning of RAM' 4162306a36Sopenharmony_ci help 4262306a36Sopenharmony_ci The kernel needs to change the hardware exception vectors. 4362306a36Sopenharmony_ci In nommu mode, the hardware exception vectors are normally 4462306a36Sopenharmony_ci placed at address 0x00000000. However, this region may be 4562306a36Sopenharmony_ci occupied by read-only memory depending on H/W design. 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_ci If the region contains read-write memory, say 'n' here. 4862306a36Sopenharmony_ci 4962306a36Sopenharmony_ci If your CPU provides a remap facility which allows the exception 5062306a36Sopenharmony_ci vectors to be mapped to writable memory, say 'n' here. 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_ci Otherwise, say 'y' here. In this case, the kernel will require 5362306a36Sopenharmony_ci external support to redirect the hardware exception vectors to 5462306a36Sopenharmony_ci the writable versions located at DRAM_BASE. 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_ciconfig ARM_MPU 5762306a36Sopenharmony_ci bool 'Use the ARM v7 PMSA Compliant MPU' 5862306a36Sopenharmony_ci depends on CPU_V7 || CPU_V7M 5962306a36Sopenharmony_ci default y if CPU_V7 6062306a36Sopenharmony_ci help 6162306a36Sopenharmony_ci Some ARM systems without an MMU have instead a Memory Protection 6262306a36Sopenharmony_ci Unit (MPU) that defines the type and permissions for regions of 6362306a36Sopenharmony_ci memory. 6462306a36Sopenharmony_ci 6562306a36Sopenharmony_ci If your CPU has an MPU then you should choose 'y' here unless you 6662306a36Sopenharmony_ci know that you do not want to use the MPU. 67