162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright (C) 2014, 2015 Synopsys, Inc. (www.synopsys.com) 462306a36Sopenharmony_ci */ 562306a36Sopenharmony_ci 662306a36Sopenharmony_ci/* 762306a36Sopenharmony_ci * Device tree for AXC003 CPU card: 862306a36Sopenharmony_ci * HS38x2 (Dual Core) with IDU intc (VDK version) 962306a36Sopenharmony_ci */ 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci/include/ "skeleton_hs_idu.dtsi" 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci/ { 1462306a36Sopenharmony_ci compatible = "snps,arc"; 1562306a36Sopenharmony_ci #address-cells = <1>; 1662306a36Sopenharmony_ci #size-cells = <1>; 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci cpu_card { 1962306a36Sopenharmony_ci compatible = "simple-bus"; 2062306a36Sopenharmony_ci #address-cells = <1>; 2162306a36Sopenharmony_ci #size-cells = <1>; 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ci ranges = <0x00000000 0xf0000000 0x10000000>; 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_ci core_clk: core_clk { 2662306a36Sopenharmony_ci #clock-cells = <0>; 2762306a36Sopenharmony_ci compatible = "fixed-clock"; 2862306a36Sopenharmony_ci clock-frequency = <50000000>; 2962306a36Sopenharmony_ci }; 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ci core_intc: archs-intc@cpu { 3262306a36Sopenharmony_ci compatible = "snps,archs-intc"; 3362306a36Sopenharmony_ci interrupt-controller; 3462306a36Sopenharmony_ci #interrupt-cells = <1>; 3562306a36Sopenharmony_ci }; 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ci idu_intc: idu-interrupt-controller { 3862306a36Sopenharmony_ci compatible = "snps,archs-idu-intc"; 3962306a36Sopenharmony_ci interrupt-controller; 4062306a36Sopenharmony_ci interrupt-parent = <&core_intc>; 4162306a36Sopenharmony_ci #interrupt-cells = <1>; 4262306a36Sopenharmony_ci }; 4362306a36Sopenharmony_ci 4462306a36Sopenharmony_ci debug_uart: dw-apb-uart@5000 { 4562306a36Sopenharmony_ci compatible = "snps,dw-apb-uart"; 4662306a36Sopenharmony_ci reg = <0x5000 0x100>; 4762306a36Sopenharmony_ci clock-frequency = <2403200>; 4862306a36Sopenharmony_ci interrupt-parent = <&idu_intc>; 4962306a36Sopenharmony_ci interrupts = <2>; 5062306a36Sopenharmony_ci baud = <115200>; 5162306a36Sopenharmony_ci reg-shift = <2>; 5262306a36Sopenharmony_ci reg-io-width = <4>; 5362306a36Sopenharmony_ci }; 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_ci }; 5662306a36Sopenharmony_ci 5762306a36Sopenharmony_ci mb_intc: interrupt-controller@e0012000 { 5862306a36Sopenharmony_ci #interrupt-cells = <1>; 5962306a36Sopenharmony_ci compatible = "snps,dw-apb-ictl"; 6062306a36Sopenharmony_ci reg = < 0xe0012000 0x200 >; 6162306a36Sopenharmony_ci interrupt-controller; 6262306a36Sopenharmony_ci interrupt-parent = <&idu_intc>; 6362306a36Sopenharmony_ci interrupts = <0>; 6462306a36Sopenharmony_ci }; 6562306a36Sopenharmony_ci 6662306a36Sopenharmony_ci memory { 6762306a36Sopenharmony_ci #address-cells = <1>; 6862306a36Sopenharmony_ci #size-cells = <1>; 6962306a36Sopenharmony_ci ranges = <0x00000000 0x80000000 0x40000000>; 7062306a36Sopenharmony_ci device_type = "memory"; 7162306a36Sopenharmony_ci reg = <0x80000000 0x20000000>; /* 512MiB */ 7262306a36Sopenharmony_ci }; 7362306a36Sopenharmony_ci}; 74