162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 262306a36Sopenharmony_ci#ifndef __ALPHA_MCE_H 362306a36Sopenharmony_ci#define __ALPHA_MCE_H 462306a36Sopenharmony_ci 562306a36Sopenharmony_ci/* 662306a36Sopenharmony_ci * This is the logout header that should be common to all platforms 762306a36Sopenharmony_ci * (assuming they are running OSF/1 PALcode, I guess). 862306a36Sopenharmony_ci */ 962306a36Sopenharmony_cistruct el_common { 1062306a36Sopenharmony_ci unsigned int size; /* size in bytes of logout area */ 1162306a36Sopenharmony_ci unsigned int sbz1 : 30; /* should be zero */ 1262306a36Sopenharmony_ci unsigned int err2 : 1; /* second error */ 1362306a36Sopenharmony_ci unsigned int retry : 1; /* retry flag */ 1462306a36Sopenharmony_ci unsigned int proc_offset; /* processor-specific offset */ 1562306a36Sopenharmony_ci unsigned int sys_offset; /* system-specific offset */ 1662306a36Sopenharmony_ci unsigned int code; /* machine check code */ 1762306a36Sopenharmony_ci unsigned int frame_rev; /* frame revision */ 1862306a36Sopenharmony_ci}; 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_ci/* Machine Check Frame for uncorrectable errors (Large format) 2162306a36Sopenharmony_ci * --- This is used to log uncorrectable errors such as 2262306a36Sopenharmony_ci * double bit ECC errors. 2362306a36Sopenharmony_ci * --- These errors are detected by both processor and systems. 2462306a36Sopenharmony_ci */ 2562306a36Sopenharmony_cistruct el_common_EV5_uncorrectable_mcheck { 2662306a36Sopenharmony_ci unsigned long shadow[8]; /* Shadow reg. 8-14, 25 */ 2762306a36Sopenharmony_ci unsigned long paltemp[24]; /* PAL TEMP REGS. */ 2862306a36Sopenharmony_ci unsigned long exc_addr; /* Address of excepting instruction*/ 2962306a36Sopenharmony_ci unsigned long exc_sum; /* Summary of arithmetic traps. */ 3062306a36Sopenharmony_ci unsigned long exc_mask; /* Exception mask (from exc_sum). */ 3162306a36Sopenharmony_ci unsigned long pal_base; /* Base address for PALcode. */ 3262306a36Sopenharmony_ci unsigned long isr; /* Interrupt Status Reg. */ 3362306a36Sopenharmony_ci unsigned long icsr; /* CURRENT SETUP OF EV5 IBOX */ 3462306a36Sopenharmony_ci unsigned long ic_perr_stat; /* I-CACHE Reg. <11> set Data parity 3562306a36Sopenharmony_ci <12> set TAG parity*/ 3662306a36Sopenharmony_ci unsigned long dc_perr_stat; /* D-CACHE error Reg. Bits set to 1: 3762306a36Sopenharmony_ci <2> Data error in bank 0 3862306a36Sopenharmony_ci <3> Data error in bank 1 3962306a36Sopenharmony_ci <4> Tag error in bank 0 4062306a36Sopenharmony_ci <5> Tag error in bank 1 */ 4162306a36Sopenharmony_ci unsigned long va; /* Effective VA of fault or miss. */ 4262306a36Sopenharmony_ci unsigned long mm_stat; /* Holds the reason for D-stream 4362306a36Sopenharmony_ci fault or D-cache parity errors */ 4462306a36Sopenharmony_ci unsigned long sc_addr; /* Address that was being accessed 4562306a36Sopenharmony_ci when EV5 detected Secondary cache 4662306a36Sopenharmony_ci failure. */ 4762306a36Sopenharmony_ci unsigned long sc_stat; /* Helps determine if the error was 4862306a36Sopenharmony_ci TAG/Data parity(Secondary Cache)*/ 4962306a36Sopenharmony_ci unsigned long bc_tag_addr; /* Contents of EV5 BC_TAG_ADDR */ 5062306a36Sopenharmony_ci unsigned long ei_addr; /* Physical address of any transfer 5162306a36Sopenharmony_ci that is logged in EV5 EI_STAT */ 5262306a36Sopenharmony_ci unsigned long fill_syndrome; /* For correcting ECC errors. */ 5362306a36Sopenharmony_ci unsigned long ei_stat; /* Helps identify reason of any 5462306a36Sopenharmony_ci processor uncorrectable error 5562306a36Sopenharmony_ci at its external interface. */ 5662306a36Sopenharmony_ci unsigned long ld_lock; /* Contents of EV5 LD_LOCK register*/ 5762306a36Sopenharmony_ci}; 5862306a36Sopenharmony_ci 5962306a36Sopenharmony_cistruct el_common_EV6_mcheck { 6062306a36Sopenharmony_ci unsigned int FrameSize; /* Bytes, including this field */ 6162306a36Sopenharmony_ci unsigned int FrameFlags; /* <31> = Retry, <30> = Second Error */ 6262306a36Sopenharmony_ci unsigned int CpuOffset; /* Offset to CPU-specific info */ 6362306a36Sopenharmony_ci unsigned int SystemOffset; /* Offset to system-specific info */ 6462306a36Sopenharmony_ci unsigned int MCHK_Code; 6562306a36Sopenharmony_ci unsigned int MCHK_Frame_Rev; 6662306a36Sopenharmony_ci unsigned long I_STAT; /* EV6 Internal Processor Registers */ 6762306a36Sopenharmony_ci unsigned long DC_STAT; /* (See the 21264 Spec) */ 6862306a36Sopenharmony_ci unsigned long C_ADDR; 6962306a36Sopenharmony_ci unsigned long DC1_SYNDROME; 7062306a36Sopenharmony_ci unsigned long DC0_SYNDROME; 7162306a36Sopenharmony_ci unsigned long C_STAT; 7262306a36Sopenharmony_ci unsigned long C_STS; 7362306a36Sopenharmony_ci unsigned long MM_STAT; 7462306a36Sopenharmony_ci unsigned long EXC_ADDR; 7562306a36Sopenharmony_ci unsigned long IER_CM; 7662306a36Sopenharmony_ci unsigned long ISUM; 7762306a36Sopenharmony_ci unsigned long RESERVED0; 7862306a36Sopenharmony_ci unsigned long PAL_BASE; 7962306a36Sopenharmony_ci unsigned long I_CTL; 8062306a36Sopenharmony_ci unsigned long PCTX; 8162306a36Sopenharmony_ci}; 8262306a36Sopenharmony_ci 8362306a36Sopenharmony_ci 8462306a36Sopenharmony_ci#endif /* __ALPHA_MCE_H */ 85