162306a36Sopenharmony_ci.. SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_ci 362306a36Sopenharmony_ci========================= 462306a36Sopenharmony_ciXICS interrupt controller 562306a36Sopenharmony_ci========================= 662306a36Sopenharmony_ci 762306a36Sopenharmony_ciDevice type supported: KVM_DEV_TYPE_XICS 862306a36Sopenharmony_ci 962306a36Sopenharmony_ciGroups: 1062306a36Sopenharmony_ci 1. KVM_DEV_XICS_GRP_SOURCES 1162306a36Sopenharmony_ci Attributes: 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci One per interrupt source, indexed by the source number. 1462306a36Sopenharmony_ci 2. KVM_DEV_XICS_GRP_CTRL 1562306a36Sopenharmony_ci Attributes: 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ci 2.1 KVM_DEV_XICS_NR_SERVERS (write only) 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci The kvm_device_attr.addr points to a __u32 value which is the number of 2062306a36Sopenharmony_ci interrupt server numbers (ie, highest possible vcpu id plus one). 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci Errors: 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci ======= ========================================== 2562306a36Sopenharmony_ci -EINVAL Value greater than KVM_MAX_VCPU_IDS. 2662306a36Sopenharmony_ci -EFAULT Invalid user pointer for attr->addr. 2762306a36Sopenharmony_ci -EBUSY A vcpu is already connected to the device. 2862306a36Sopenharmony_ci ======= ========================================== 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ciThis device emulates the XICS (eXternal Interrupt Controller 3162306a36Sopenharmony_ciSpecification) defined in PAPR. The XICS has a set of interrupt 3262306a36Sopenharmony_cisources, each identified by a 20-bit source number, and a set of 3362306a36Sopenharmony_ciInterrupt Control Presentation (ICP) entities, also called "servers", 3462306a36Sopenharmony_cieach associated with a virtual CPU. 3562306a36Sopenharmony_ci 3662306a36Sopenharmony_ciThe ICP entities are created by enabling the KVM_CAP_IRQ_ARCH 3762306a36Sopenharmony_cicapability for each vcpu, specifying KVM_CAP_IRQ_XICS in args[0] and 3862306a36Sopenharmony_cithe interrupt server number (i.e. the vcpu number from the XICS's 3962306a36Sopenharmony_cipoint of view) in args[1] of the kvm_enable_cap struct. Each ICP has 4062306a36Sopenharmony_ci64 bits of state which can be read and written using the 4162306a36Sopenharmony_ciKVM_GET_ONE_REG and KVM_SET_ONE_REG ioctls on the vcpu. The 64 bit 4262306a36Sopenharmony_cistate word has the following bitfields, starting at the 4362306a36Sopenharmony_cileast-significant end of the word: 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ci* Unused, 16 bits 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_ci* Pending interrupt priority, 8 bits 4862306a36Sopenharmony_ci Zero is the highest priority, 255 means no interrupt is pending. 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_ci* Pending IPI (inter-processor interrupt) priority, 8 bits 5162306a36Sopenharmony_ci Zero is the highest priority, 255 means no IPI is pending. 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_ci* Pending interrupt source number, 24 bits 5462306a36Sopenharmony_ci Zero means no interrupt pending, 2 means an IPI is pending 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_ci* Current processor priority, 8 bits 5762306a36Sopenharmony_ci Zero is the highest priority, meaning no interrupts can be 5862306a36Sopenharmony_ci delivered, and 255 is the lowest priority. 5962306a36Sopenharmony_ci 6062306a36Sopenharmony_ciEach source has 64 bits of state that can be read and written using 6162306a36Sopenharmony_cithe KVM_GET_DEVICE_ATTR and KVM_SET_DEVICE_ATTR ioctls, specifying the 6262306a36Sopenharmony_ciKVM_DEV_XICS_GRP_SOURCES attribute group, with the attribute number being 6362306a36Sopenharmony_cithe interrupt source number. The 64 bit state word has the following 6462306a36Sopenharmony_cibitfields, starting from the least-significant end of the word: 6562306a36Sopenharmony_ci 6662306a36Sopenharmony_ci* Destination (server number), 32 bits 6762306a36Sopenharmony_ci 6862306a36Sopenharmony_ci This specifies where the interrupt should be sent, and is the 6962306a36Sopenharmony_ci interrupt server number specified for the destination vcpu. 7062306a36Sopenharmony_ci 7162306a36Sopenharmony_ci* Priority, 8 bits 7262306a36Sopenharmony_ci 7362306a36Sopenharmony_ci This is the priority specified for this interrupt source, where 0 is 7462306a36Sopenharmony_ci the highest priority and 255 is the lowest. An interrupt with a 7562306a36Sopenharmony_ci priority of 255 will never be delivered. 7662306a36Sopenharmony_ci 7762306a36Sopenharmony_ci* Level sensitive flag, 1 bit 7862306a36Sopenharmony_ci 7962306a36Sopenharmony_ci This bit is 1 for a level-sensitive interrupt source, or 0 for 8062306a36Sopenharmony_ci edge-sensitive (or MSI). 8162306a36Sopenharmony_ci 8262306a36Sopenharmony_ci* Masked flag, 1 bit 8362306a36Sopenharmony_ci 8462306a36Sopenharmony_ci This bit is set to 1 if the interrupt is masked (cannot be delivered 8562306a36Sopenharmony_ci regardless of its priority), for example by the ibm,int-off RTAS 8662306a36Sopenharmony_ci call, or 0 if it is not masked. 8762306a36Sopenharmony_ci 8862306a36Sopenharmony_ci* Pending flag, 1 bit 8962306a36Sopenharmony_ci 9062306a36Sopenharmony_ci This bit is 1 if the source has a pending interrupt, otherwise 0. 9162306a36Sopenharmony_ci 9262306a36Sopenharmony_ciOnly one XICS instance may be created per VM. 93