162306a36Sopenharmony_ci======================== 262306a36Sopenharmony_ciKernel driver i2c-ocores 362306a36Sopenharmony_ci======================== 462306a36Sopenharmony_ci 562306a36Sopenharmony_ciSupported adapters: 662306a36Sopenharmony_ci * OpenCores.org I2C controller by Richard Herveille (see datasheet link) 762306a36Sopenharmony_ci https://opencores.org/project/i2c/overview 862306a36Sopenharmony_ci 962306a36Sopenharmony_ciAuthor: Peter Korsgaard <peter@korsgaard.com> 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ciDescription 1262306a36Sopenharmony_ci----------- 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_cii2c-ocores is an i2c bus driver for the OpenCores.org I2C controller 1562306a36Sopenharmony_ciIP core by Richard Herveille. 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ciUsage 1862306a36Sopenharmony_ci----- 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_cii2c-ocores uses the platform bus, so you need to provide a struct 2162306a36Sopenharmony_ciplatform_device with the base address and interrupt number. The 2262306a36Sopenharmony_cidev.platform_data of the device should also point to a struct 2362306a36Sopenharmony_ciocores_i2c_platform_data (see linux/platform_data/i2c-ocores.h) describing the 2462306a36Sopenharmony_cidistance between registers and the input clock speed. 2562306a36Sopenharmony_ciThere is also a possibility to attach a list of i2c_board_info which 2662306a36Sopenharmony_cithe i2c-ocores driver will add to the bus upon creation. 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ciE.G. something like:: 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci static struct resource ocores_resources[] = { 3162306a36Sopenharmony_ci [0] = { 3262306a36Sopenharmony_ci .start = MYI2C_BASEADDR, 3362306a36Sopenharmony_ci .end = MYI2C_BASEADDR + 8, 3462306a36Sopenharmony_ci .flags = IORESOURCE_MEM, 3562306a36Sopenharmony_ci }, 3662306a36Sopenharmony_ci [1] = { 3762306a36Sopenharmony_ci .start = MYI2C_IRQ, 3862306a36Sopenharmony_ci .end = MYI2C_IRQ, 3962306a36Sopenharmony_ci .flags = IORESOURCE_IRQ, 4062306a36Sopenharmony_ci }, 4162306a36Sopenharmony_ci }; 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_ci /* optional board info */ 4462306a36Sopenharmony_ci struct i2c_board_info ocores_i2c_board_info[] = { 4562306a36Sopenharmony_ci { 4662306a36Sopenharmony_ci I2C_BOARD_INFO("tsc2003", 0x48), 4762306a36Sopenharmony_ci .platform_data = &tsc2003_platform_data, 4862306a36Sopenharmony_ci .irq = TSC_IRQ 4962306a36Sopenharmony_ci }, 5062306a36Sopenharmony_ci { 5162306a36Sopenharmony_ci I2C_BOARD_INFO("adv7180", 0x42 >> 1), 5262306a36Sopenharmony_ci .irq = ADV_IRQ 5362306a36Sopenharmony_ci } 5462306a36Sopenharmony_ci }; 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_ci static struct ocores_i2c_platform_data myi2c_data = { 5762306a36Sopenharmony_ci .regstep = 2, /* two bytes between registers */ 5862306a36Sopenharmony_ci .clock_khz = 50000, /* input clock of 50MHz */ 5962306a36Sopenharmony_ci .devices = ocores_i2c_board_info, /* optional table of devices */ 6062306a36Sopenharmony_ci .num_devices = ARRAY_SIZE(ocores_i2c_board_info), /* table size */ 6162306a36Sopenharmony_ci }; 6262306a36Sopenharmony_ci 6362306a36Sopenharmony_ci static struct platform_device myi2c = { 6462306a36Sopenharmony_ci .name = "ocores-i2c", 6562306a36Sopenharmony_ci .dev = { 6662306a36Sopenharmony_ci .platform_data = &myi2c_data, 6762306a36Sopenharmony_ci }, 6862306a36Sopenharmony_ci .num_resources = ARRAY_SIZE(ocores_resources), 6962306a36Sopenharmony_ci .resource = ocores_resources, 7062306a36Sopenharmony_ci }; 71