162306a36Sopenharmony_ci======================== 262306a36Sopenharmony_ciSoundWire Error Handling 362306a36Sopenharmony_ci======================== 462306a36Sopenharmony_ci 562306a36Sopenharmony_ciThe SoundWire PHY was designed with care and errors on the bus are going to 662306a36Sopenharmony_cibe very unlikely, and if they happen it should be limited to single bit 762306a36Sopenharmony_cierrors. Examples of this design can be found in the synchronization 862306a36Sopenharmony_cimechanism (sync loss after two errors) and short CRCs used for the Bulk 962306a36Sopenharmony_ciRegister Access. 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ciThe errors can be detected with multiple mechanisms: 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci1. Bus clash or parity errors: This mechanism relies on low-level detectors 1462306a36Sopenharmony_ci that are independent of the payload and usages, and they cover both control 1562306a36Sopenharmony_ci and audio data. The current implementation only logs such errors. 1662306a36Sopenharmony_ci Improvements could be invalidating an entire programming sequence and 1762306a36Sopenharmony_ci restarting from a known position. In the case of such errors outside of a 1862306a36Sopenharmony_ci control/command sequence, there is no concealment or recovery for audio 1962306a36Sopenharmony_ci data enabled by the SoundWire protocol, the location of the error will also 2062306a36Sopenharmony_ci impact its audibility (most-significant bits will be more impacted in PCM), 2162306a36Sopenharmony_ci and after a number of such errors are detected the bus might be reset. Note 2262306a36Sopenharmony_ci that bus clashes due to programming errors (two streams using the same bit 2362306a36Sopenharmony_ci slots) or electrical issues during the transmit/receive transition cannot 2462306a36Sopenharmony_ci be distinguished, although a recurring bus clash when audio is enabled is a 2562306a36Sopenharmony_ci indication of a bus allocation issue. The interrupt mechanism can also help 2662306a36Sopenharmony_ci identify Slaves which detected a Bus Clash or a Parity Error, but they may 2762306a36Sopenharmony_ci not be responsible for the errors so resetting them individually is not a 2862306a36Sopenharmony_ci viable recovery strategy. 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci2. Command status: Each command is associated with a status, which only 3162306a36Sopenharmony_ci covers transmission of the data between devices. The ACK status indicates 3262306a36Sopenharmony_ci that the command was received and will be executed by the end of the 3362306a36Sopenharmony_ci current frame. A NAK indicates that the command was in error and will not 3462306a36Sopenharmony_ci be applied. In case of a bad programming (command sent to non-existent 3562306a36Sopenharmony_ci Slave or to a non-implemented register) or electrical issue, no response 3662306a36Sopenharmony_ci signals the command was ignored. Some Master implementations allow for a 3762306a36Sopenharmony_ci command to be retransmitted several times. If the retransmission fails, 3862306a36Sopenharmony_ci backtracking and restarting the entire programming sequence might be a 3962306a36Sopenharmony_ci solution. Alternatively some implementations might directly issue a bus 4062306a36Sopenharmony_ci reset and re-enumerate all devices. 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci3. Timeouts: In a number of cases such as ChannelPrepare or 4362306a36Sopenharmony_ci ClockStopPrepare, the bus driver is supposed to poll a register field until 4462306a36Sopenharmony_ci it transitions to a NotFinished value of zero. The MIPI SoundWire spec 1.1 4562306a36Sopenharmony_ci does not define timeouts but the MIPI SoundWire DisCo document adds 4662306a36Sopenharmony_ci recommendation on timeouts. If such configurations do not complete, the 4762306a36Sopenharmony_ci driver will return a -ETIMEOUT. Such timeouts are symptoms of a faulty 4862306a36Sopenharmony_ci Slave device and are likely impossible to recover from. 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_ciErrors during global reconfiguration sequences are extremely difficult to 5162306a36Sopenharmony_cihandle: 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_ci1. BankSwitch: An error during the last command issuing a BankSwitch is 5462306a36Sopenharmony_ci difficult to backtrack from. Retransmitting the Bank Switch command may be 5562306a36Sopenharmony_ci possible in a single segment setup, but this can lead to synchronization 5662306a36Sopenharmony_ci problems when enabling multiple bus segments (a command with side effects 5762306a36Sopenharmony_ci such as frame reconfiguration would be handled at different times). A global 5862306a36Sopenharmony_ci hard-reset might be the best solution. 5962306a36Sopenharmony_ci 6062306a36Sopenharmony_ciNote that SoundWire does not provide a mechanism to detect illegal values 6162306a36Sopenharmony_ciwritten in valid registers. In a number of cases the standard even mentions 6262306a36Sopenharmony_cithat the Slave might behave in implementation-defined ways. The bus 6362306a36Sopenharmony_ciimplementation does not provide a recovery mechanism for such errors, Slave 6462306a36Sopenharmony_cior Master driver implementers are responsible for writing valid values in 6562306a36Sopenharmony_civalid registers and implement additional range checking if needed. 66