162306a36Sopenharmony_ciIntroduction 262306a36Sopenharmony_ci============ 362306a36Sopenharmony_ci 462306a36Sopenharmony_ciThe FPGA subsystem supports reprogramming FPGAs dynamically under 562306a36Sopenharmony_ciLinux. Some of the core intentions of the FPGA subsystems are: 662306a36Sopenharmony_ci 762306a36Sopenharmony_ci* The FPGA subsystem is vendor agnostic. 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci* The FPGA subsystem separates upper layers (userspace interfaces and 1062306a36Sopenharmony_ci enumeration) from lower layers that know how to program a specific 1162306a36Sopenharmony_ci FPGA. 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci* Code should not be shared between upper and lower layers. This 1462306a36Sopenharmony_ci should go without saying. If that seems necessary, there's probably 1562306a36Sopenharmony_ci framework functionality that can be added that will benefit 1662306a36Sopenharmony_ci other users. Write the linux-fpga mailing list and maintainers and 1762306a36Sopenharmony_ci seek out a solution that expands the framework for broad reuse. 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci* Generally, when adding code, think of the future. Plan for reuse. 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ciThe framework in the kernel is divided into: 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ciFPGA Manager 2462306a36Sopenharmony_ci------------ 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ciIf you are adding a new FPGA or a new method of programming an FPGA, 2762306a36Sopenharmony_cithis is the subsystem for you. Low level FPGA manager drivers contain 2862306a36Sopenharmony_cithe knowledge of how to program a specific device. This subsystem 2962306a36Sopenharmony_ciincludes the framework in fpga-mgr.c and the low level drivers that 3062306a36Sopenharmony_ciare registered with it. 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ciFPGA Bridge 3362306a36Sopenharmony_ci----------- 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ciFPGA Bridges prevent spurious signals from going out of an FPGA or a 3662306a36Sopenharmony_ciregion of an FPGA during programming. They are disabled before 3762306a36Sopenharmony_ciprogramming begins and re-enabled afterwards. An FPGA bridge may be 3862306a36Sopenharmony_ciactual hard hardware that gates a bus to a CPU or a soft ("freeze") 3962306a36Sopenharmony_cibridge in FPGA fabric that surrounds a partial reconfiguration region 4062306a36Sopenharmony_ciof an FPGA. This subsystem includes fpga-bridge.c and the low level 4162306a36Sopenharmony_cidrivers that are registered with it. 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_ciFPGA Region 4462306a36Sopenharmony_ci----------- 4562306a36Sopenharmony_ci 4662306a36Sopenharmony_ciIf you are adding a new interface to the FPGA framework, add it on top 4762306a36Sopenharmony_ciof an FPGA region. 4862306a36Sopenharmony_ci 4962306a36Sopenharmony_ciThe FPGA Region framework (fpga-region.c) associates managers and 5062306a36Sopenharmony_cibridges as reconfigurable regions. A region may refer to the whole 5162306a36Sopenharmony_ciFPGA in full reconfiguration or to a partial reconfiguration region. 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_ciThe Device Tree FPGA Region support (of-fpga-region.c) handles 5462306a36Sopenharmony_cireprogramming FPGAs when device tree overlays are applied. 55