162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/watchdog/ti,rti-wdt.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: Texas Instruments K3 SoC Watchdog Timer
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Tero Kristo <t-kristo@ti.com>
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_cidescription:
1362306a36Sopenharmony_ci  The TI K3 SoC watchdog timer is implemented via the RTI (Real Time
1462306a36Sopenharmony_ci  Interrupt) IP module. This timer adds a support for windowed watchdog
1562306a36Sopenharmony_ci  mode, which will signal an error if it is pinged outside the watchdog
1662306a36Sopenharmony_ci  time window, meaning either too early or too late. The error signal
1762306a36Sopenharmony_ci  generated can be routed to either interrupt a safety controller or
1862306a36Sopenharmony_ci  to directly reset the SoC.
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ciallOf:
2162306a36Sopenharmony_ci  - $ref: watchdog.yaml#
2262306a36Sopenharmony_ci
2362306a36Sopenharmony_ciproperties:
2462306a36Sopenharmony_ci  compatible:
2562306a36Sopenharmony_ci    enum:
2662306a36Sopenharmony_ci      - ti,j7-rti-wdt
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ci  reg:
2962306a36Sopenharmony_ci    maxItems: 1
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_ci  clocks:
3262306a36Sopenharmony_ci    maxItems: 1
3362306a36Sopenharmony_ci
3462306a36Sopenharmony_ci  power-domains:
3562306a36Sopenharmony_ci    maxItems: 1
3662306a36Sopenharmony_ci
3762306a36Sopenharmony_ci  memory-region:
3862306a36Sopenharmony_ci    maxItems: 1
3962306a36Sopenharmony_ci    description:
4062306a36Sopenharmony_ci      Contains the watchdog reserved memory. It is optional.
4162306a36Sopenharmony_ci      In the reserved memory, the specified values, which are
4262306a36Sopenharmony_ci      PON_REASON_SOF_NUM(0xBBBBCCCC), PON_REASON_MAGIC_NUM(0xDDDDDDDD),
4362306a36Sopenharmony_ci      and PON_REASON_EOF_NUM(0xCCCCBBBB), are pre-stored at the first
4462306a36Sopenharmony_ci      3 * 4 bytes to tell that last boot was caused by watchdog reset.
4562306a36Sopenharmony_ci      Once the PON reason is captured by driver(rti_wdt.c), the driver
4662306a36Sopenharmony_ci      is supposed to wipe the whole memory region. Surely, if this
4762306a36Sopenharmony_ci      property is set, at least 12 bytes reserved memory starting from
4862306a36Sopenharmony_ci      specific memory address(0xa220000) should be set. More please
4962306a36Sopenharmony_ci      refer to example.
5062306a36Sopenharmony_ci
5162306a36Sopenharmony_cirequired:
5262306a36Sopenharmony_ci  - compatible
5362306a36Sopenharmony_ci  - reg
5462306a36Sopenharmony_ci  - clocks
5562306a36Sopenharmony_ci  - power-domains
5662306a36Sopenharmony_ci
5762306a36Sopenharmony_ciunevaluatedProperties: false
5862306a36Sopenharmony_ci
5962306a36Sopenharmony_ciexamples:
6062306a36Sopenharmony_ci  - |
6162306a36Sopenharmony_ci    /*
6262306a36Sopenharmony_ci     * RTI WDT in main domain on J721e SoC. Assigned clocks are used to
6362306a36Sopenharmony_ci     * select the source clock for the watchdog, forcing it to tick with
6462306a36Sopenharmony_ci     * a 32kHz clock in this case. Add a reserved memory(optional) to keep
6562306a36Sopenharmony_ci     * the watchdog reset cause persistent, which was be written in 12 bytes
6662306a36Sopenharmony_ci     * starting from 0xa2200000 by RTI Watchdog Firmware, then make it
6762306a36Sopenharmony_ci     * possible to get watchdog reset cause in driver.
6862306a36Sopenharmony_ci     *
6962306a36Sopenharmony_ci     * Reserved memory should be defined as follows:
7062306a36Sopenharmony_ci     * reserved-memory {
7162306a36Sopenharmony_ci     *     wdt_reset_memory_region: wdt-memory@a2200000 {
7262306a36Sopenharmony_ci     *         reg = <0x00 0xa2200000 0x00 0x1000>;
7362306a36Sopenharmony_ci     *         no-map;
7462306a36Sopenharmony_ci     *     };
7562306a36Sopenharmony_ci     * }
7662306a36Sopenharmony_ci     */
7762306a36Sopenharmony_ci    #include <dt-bindings/soc/ti,sci_pm_domain.h>
7862306a36Sopenharmony_ci
7962306a36Sopenharmony_ci    watchdog@2200000 {
8062306a36Sopenharmony_ci        compatible = "ti,j7-rti-wdt";
8162306a36Sopenharmony_ci        reg = <0x2200000 0x100>;
8262306a36Sopenharmony_ci        clocks = <&k3_clks 252 1>;
8362306a36Sopenharmony_ci        power-domains = <&k3_pds 252 TI_SCI_PD_EXCLUSIVE>;
8462306a36Sopenharmony_ci        assigned-clocks = <&k3_clks 252 1>;
8562306a36Sopenharmony_ci        assigned-clock-parents = <&k3_clks 252 5>;
8662306a36Sopenharmony_ci        memory-region = <&wdt_reset_memory_region>;
8762306a36Sopenharmony_ci    };
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