162306a36Sopenharmony_ciSTMicroelectronics Low Power Controller (LPC) - Watchdog
262306a36Sopenharmony_ci========================================================
362306a36Sopenharmony_ci
462306a36Sopenharmony_ciLPC currently supports Watchdog OR Real Time Clock OR Clocksource
562306a36Sopenharmony_cifunctionality.
662306a36Sopenharmony_ci
762306a36Sopenharmony_ci[See: ../rtc/rtc-st-lpc.txt for RTC options]
862306a36Sopenharmony_ci[See: ../timer/st,stih407-lpc for Clocksource options]
962306a36Sopenharmony_ci
1062306a36Sopenharmony_ciRequired properties
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_ci- compatible 	: Should be: "st,stih407-lpc"
1362306a36Sopenharmony_ci- reg		: LPC registers base address + size
1462306a36Sopenharmony_ci- interrupts    : LPC interrupt line number and associated flags
1562306a36Sopenharmony_ci- clocks	: Clock used by LPC device (See: ../clock/clock-bindings.txt)
1662306a36Sopenharmony_ci- st,lpc-mode	: The LPC can run either one of three modes:
1762306a36Sopenharmony_ci                  ST_LPC_MODE_RTC    [0]
1862306a36Sopenharmony_ci                  ST_LPC_MODE_WDT    [1]
1962306a36Sopenharmony_ci                  ST_LPC_MODE_CLKSRC [2]
2062306a36Sopenharmony_ci		 One (and only one) mode must be selected.
2162306a36Sopenharmony_ci
2262306a36Sopenharmony_ciRequired properties [watchdog mode]
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ci- st,syscfg	: Phandle to syscfg node used to enable watchdog and configure
2562306a36Sopenharmony_ci		  CPU reset type.
2662306a36Sopenharmony_ci- timeout-sec	: Watchdog timeout in seconds
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ciOptional properties [watchdog mode]
2962306a36Sopenharmony_ci
3062306a36Sopenharmony_ci- st,warm-reset	: If present reset type will be 'warm' - if not it will be cold
3162306a36Sopenharmony_ci
3262306a36Sopenharmony_ciExample:
3362306a36Sopenharmony_ci	lpc@fde05000 {
3462306a36Sopenharmony_ci		compatible	= "st,stih407-lpc";
3562306a36Sopenharmony_ci		reg		= <0xfde05000 0x1000>;
3662306a36Sopenharmony_ci		clocks 		= <&clk_s_d3_flexgen CLK_LPC_0>;
3762306a36Sopenharmony_ci		st,syscfg	= <&syscfg_core>;
3862306a36Sopenharmony_ci		timeout-sec	= <120>;
3962306a36Sopenharmony_ci		st,lpc-mode	= <ST_LPC_MODE_WDT>;
4062306a36Sopenharmony_ci		st,warm-reset;
4162306a36Sopenharmony_ci	};
42