162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/watchdog/realtek,otto-wdt.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: Realtek Otto watchdog timer
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Sander Vanheule <sander@svanheule.net>
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_cidescription: |
1362306a36Sopenharmony_ci  The timer has two timeout phases. Both phases have a maximum duration of 32
1462306a36Sopenharmony_ci  prescaled clock ticks, which is ca. 43s with a bus clock of 200MHz. The
1562306a36Sopenharmony_ci  minimum duration of each phase is one tick. Each phase can trigger an
1662306a36Sopenharmony_ci  interrupt, although the phase 2 interrupt will occur with the system reset.
1762306a36Sopenharmony_ci  - Phase 1: During this phase, the WDT can be pinged to reset the timeout.
1862306a36Sopenharmony_ci  - Phase 2: Starts after phase 1 has timed out, and only serves to give the
1962306a36Sopenharmony_ci    system some time to clean up, or notify others that it's going to reset.
2062306a36Sopenharmony_ci    During this phase, pinging the WDT has no effect, and a reset is
2162306a36Sopenharmony_ci    unavoidable, unless the WDT is disabled.
2262306a36Sopenharmony_ci
2362306a36Sopenharmony_ciallOf:
2462306a36Sopenharmony_ci  - $ref: watchdog.yaml#
2562306a36Sopenharmony_ci
2662306a36Sopenharmony_ciproperties:
2762306a36Sopenharmony_ci  compatible:
2862306a36Sopenharmony_ci    enum:
2962306a36Sopenharmony_ci      - realtek,rtl8380-wdt
3062306a36Sopenharmony_ci      - realtek,rtl8390-wdt
3162306a36Sopenharmony_ci      - realtek,rtl9300-wdt
3262306a36Sopenharmony_ci      - realtek,rtl9310-wdt
3362306a36Sopenharmony_ci
3462306a36Sopenharmony_ci  reg:
3562306a36Sopenharmony_ci    maxItems: 1
3662306a36Sopenharmony_ci
3762306a36Sopenharmony_ci  clocks:
3862306a36Sopenharmony_ci    maxItems: 1
3962306a36Sopenharmony_ci
4062306a36Sopenharmony_ci  interrupts:
4162306a36Sopenharmony_ci    items:
4262306a36Sopenharmony_ci      - description: interrupt specifier for pretimeout
4362306a36Sopenharmony_ci      - description: interrupt specifier for timeout
4462306a36Sopenharmony_ci
4562306a36Sopenharmony_ci  interrupt-names:
4662306a36Sopenharmony_ci    items:
4762306a36Sopenharmony_ci      - const: phase1
4862306a36Sopenharmony_ci      - const: phase2
4962306a36Sopenharmony_ci
5062306a36Sopenharmony_ci  realtek,reset-mode:
5162306a36Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/string
5262306a36Sopenharmony_ci    description: |
5362306a36Sopenharmony_ci      Specify how the system is reset after a timeout. Defaults to "cpu" if
5462306a36Sopenharmony_ci      left unspecified.
5562306a36Sopenharmony_ci    oneOf:
5662306a36Sopenharmony_ci      - description: Reset the entire chip
5762306a36Sopenharmony_ci        const: soc
5862306a36Sopenharmony_ci      - description: |
5962306a36Sopenharmony_ci          Reset the CPU and IPsec engine, but leave other peripherals untouched
6062306a36Sopenharmony_ci        const: cpu
6162306a36Sopenharmony_ci      - description: |
6262306a36Sopenharmony_ci          Reset the execution pointer, but don't actually reset any hardware
6362306a36Sopenharmony_ci        const: software
6462306a36Sopenharmony_ci
6562306a36Sopenharmony_cirequired:
6662306a36Sopenharmony_ci  - compatible
6762306a36Sopenharmony_ci  - reg
6862306a36Sopenharmony_ci  - clocks
6962306a36Sopenharmony_ci  - interrupts
7062306a36Sopenharmony_ci  - interrupt-names
7162306a36Sopenharmony_ci
7262306a36Sopenharmony_ciunevaluatedProperties: false
7362306a36Sopenharmony_ci
7462306a36Sopenharmony_ciexamples:
7562306a36Sopenharmony_ci  - |
7662306a36Sopenharmony_ci    watchdog: watchdog@3150 {
7762306a36Sopenharmony_ci        compatible = "realtek,rtl8380-wdt";
7862306a36Sopenharmony_ci        reg = <0x3150 0xc>;
7962306a36Sopenharmony_ci
8062306a36Sopenharmony_ci        realtek,reset-mode = "soc";
8162306a36Sopenharmony_ci
8262306a36Sopenharmony_ci        clocks = <&lxbus_clock>;
8362306a36Sopenharmony_ci        timeout-sec = <20>;
8462306a36Sopenharmony_ci
8562306a36Sopenharmony_ci        interrupt-parent = <&rtlintc>;
8662306a36Sopenharmony_ci        interrupt-names = "phase1", "phase2";
8762306a36Sopenharmony_ci        interrupts = <19>, <18>;
8862306a36Sopenharmony_ci    };
8962306a36Sopenharmony_ci
9062306a36Sopenharmony_ci...
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