162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/watchdog/fsl-imx7ulp-wdt.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Freescale i.MX7ULP Watchdog Timer (WDT) Controller 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Anson Huang <Anson.Huang@nxp.com> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ciallOf: 1362306a36Sopenharmony_ci - $ref: watchdog.yaml# 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ciproperties: 1662306a36Sopenharmony_ci compatible: 1762306a36Sopenharmony_ci oneOf: 1862306a36Sopenharmony_ci - const: fsl,imx7ulp-wdt 1962306a36Sopenharmony_ci - items: 2062306a36Sopenharmony_ci - const: fsl,imx8ulp-wdt 2162306a36Sopenharmony_ci - const: fsl,imx7ulp-wdt 2262306a36Sopenharmony_ci - const: fsl,imx93-wdt 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci reg: 2562306a36Sopenharmony_ci maxItems: 1 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_ci interrupts: 2862306a36Sopenharmony_ci maxItems: 1 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci clocks: 3162306a36Sopenharmony_ci maxItems: 1 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_cirequired: 3462306a36Sopenharmony_ci - compatible 3562306a36Sopenharmony_ci - interrupts 3662306a36Sopenharmony_ci - reg 3762306a36Sopenharmony_ci - clocks 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ciunevaluatedProperties: false 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_ciexamples: 4262306a36Sopenharmony_ci - | 4362306a36Sopenharmony_ci #include <dt-bindings/interrupt-controller/arm-gic.h> 4462306a36Sopenharmony_ci #include <dt-bindings/clock/imx7ulp-clock.h> 4562306a36Sopenharmony_ci 4662306a36Sopenharmony_ci watchdog@403d0000 { 4762306a36Sopenharmony_ci compatible = "fsl,imx7ulp-wdt"; 4862306a36Sopenharmony_ci reg = <0x403d0000 0x10000>; 4962306a36Sopenharmony_ci interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; 5062306a36Sopenharmony_ci clocks = <&pcc2 IMX7ULP_CLK_WDG1>; 5162306a36Sopenharmony_ci assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>; 5262306a36Sopenharmony_ci assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>; 5362306a36Sopenharmony_ci timeout-sec = <40>; 5462306a36Sopenharmony_ci }; 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_ci... 57