162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/watchdog/arm,sp805.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: ARM AMBA Primecell SP805 Watchdog
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Viresh Kumar <vireshk@kernel.org>
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_cidescription: |+
1362306a36Sopenharmony_ci  The Arm SP805 IP implements a watchdog device, which triggers an interrupt
1462306a36Sopenharmony_ci  after a configurable time period. If that interrupt has not been serviced
1562306a36Sopenharmony_ci  when the next interrupt would be triggered, the reset signal is asserted.
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_ciallOf:
1862306a36Sopenharmony_ci  - $ref: /schemas/watchdog/watchdog.yaml#
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ci# Need a custom select here or 'arm,primecell' will match on lots of nodes
2162306a36Sopenharmony_ciselect:
2262306a36Sopenharmony_ci  properties:
2362306a36Sopenharmony_ci    compatible:
2462306a36Sopenharmony_ci      contains:
2562306a36Sopenharmony_ci        const: arm,sp805
2662306a36Sopenharmony_ci  required:
2762306a36Sopenharmony_ci    - compatible
2862306a36Sopenharmony_ci
2962306a36Sopenharmony_ciproperties:
3062306a36Sopenharmony_ci  compatible:
3162306a36Sopenharmony_ci    items:
3262306a36Sopenharmony_ci      - const: arm,sp805
3362306a36Sopenharmony_ci      - const: arm,primecell
3462306a36Sopenharmony_ci
3562306a36Sopenharmony_ci  interrupts:
3662306a36Sopenharmony_ci    maxItems: 1
3762306a36Sopenharmony_ci
3862306a36Sopenharmony_ci  reg:
3962306a36Sopenharmony_ci    maxItems: 1
4062306a36Sopenharmony_ci
4162306a36Sopenharmony_ci  clocks:
4262306a36Sopenharmony_ci    description: |
4362306a36Sopenharmony_ci      Clocks driving the watchdog timer hardware. The first clock is used
4462306a36Sopenharmony_ci      for the actual watchdog counter. The second clock drives the register
4562306a36Sopenharmony_ci      interface.
4662306a36Sopenharmony_ci    maxItems: 2
4762306a36Sopenharmony_ci
4862306a36Sopenharmony_ci  clock-names:
4962306a36Sopenharmony_ci    items:
5062306a36Sopenharmony_ci      - const: wdog_clk
5162306a36Sopenharmony_ci      - const: apb_pclk
5262306a36Sopenharmony_ci
5362306a36Sopenharmony_cirequired:
5462306a36Sopenharmony_ci  - compatible
5562306a36Sopenharmony_ci  - reg
5662306a36Sopenharmony_ci  - clocks
5762306a36Sopenharmony_ci  - clock-names
5862306a36Sopenharmony_ci
5962306a36Sopenharmony_ciunevaluatedProperties: false
6062306a36Sopenharmony_ci
6162306a36Sopenharmony_ciexamples:
6262306a36Sopenharmony_ci  - |
6362306a36Sopenharmony_ci    #include <dt-bindings/interrupt-controller/arm-gic.h>
6462306a36Sopenharmony_ci    watchdog@66090000 {
6562306a36Sopenharmony_ci        compatible = "arm,sp805", "arm,primecell";
6662306a36Sopenharmony_ci        reg = <0x66090000 0x1000>;
6762306a36Sopenharmony_ci        interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>;
6862306a36Sopenharmony_ci        clocks = <&wdt_clk>, <&apb_pclk>;
6962306a36Sopenharmony_ci        clock-names = "wdog_clk", "apb_pclk";
7062306a36Sopenharmony_ci    };
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