162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/usb/ti,hd3ss3220.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: TI HD3SS3220 TypeC DRP Port Controller 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Biju Das <biju.das.jz@bp.renesas.com> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_cidescription: |- 1362306a36Sopenharmony_ci HD3SS3220 is a USB SuperSpeed (SS) 2:1 mux with DRP port controller. The device provides Channel 1462306a36Sopenharmony_ci Configuration (CC) logic and 5V VCONN sourcing for ecosystems implementing USB Type-C. The 1562306a36Sopenharmony_ci HD3SS3220 can be configured as a Downstream Facing Port (DFP), Upstream Facing Port (UFP) or a 1662306a36Sopenharmony_ci Dual Role Port (DRP) making it ideal for any application. 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ciproperties: 1962306a36Sopenharmony_ci compatible: 2062306a36Sopenharmony_ci const: ti,hd3ss3220 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci reg: 2362306a36Sopenharmony_ci maxItems: 1 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_ci interrupts: 2662306a36Sopenharmony_ci maxItems: 1 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ci ports: 2962306a36Sopenharmony_ci $ref: /schemas/graph.yaml#/properties/ports 3062306a36Sopenharmony_ci description: OF graph bindings (specified in bindings/graph.txt) that model 3162306a36Sopenharmony_ci SS data bus to the SS capable connector. 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ci properties: 3462306a36Sopenharmony_ci port@0: 3562306a36Sopenharmony_ci $ref: /schemas/graph.yaml#/properties/port 3662306a36Sopenharmony_ci description: Super Speed (SS) MUX inputs connected to SS capable connector. 3762306a36Sopenharmony_ci 3862306a36Sopenharmony_ci port@1: 3962306a36Sopenharmony_ci $ref: /schemas/graph.yaml#/properties/port 4062306a36Sopenharmony_ci description: Output of 2:1 MUX connected to Super Speed (SS) data bus. 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci required: 4362306a36Sopenharmony_ci - port@0 4462306a36Sopenharmony_ci - port@1 4562306a36Sopenharmony_ci 4662306a36Sopenharmony_cirequired: 4762306a36Sopenharmony_ci - compatible 4862306a36Sopenharmony_ci - reg 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_ciadditionalProperties: false 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_ciexamples: 5362306a36Sopenharmony_ci - | 5462306a36Sopenharmony_ci i2c { 5562306a36Sopenharmony_ci #address-cells = <1>; 5662306a36Sopenharmony_ci #size-cells = <0>; 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_ci hd3ss3220@47 { 5962306a36Sopenharmony_ci compatible = "ti,hd3ss3220"; 6062306a36Sopenharmony_ci reg = <0x47>; 6162306a36Sopenharmony_ci interrupt-parent = <&gpio6>; 6262306a36Sopenharmony_ci interrupts = <3>; 6362306a36Sopenharmony_ci 6462306a36Sopenharmony_ci ports { 6562306a36Sopenharmony_ci #address-cells = <1>; 6662306a36Sopenharmony_ci #size-cells = <0>; 6762306a36Sopenharmony_ci port@0 { 6862306a36Sopenharmony_ci reg = <0>; 6962306a36Sopenharmony_ci hd3ss3220_in_ep: endpoint { 7062306a36Sopenharmony_ci remote-endpoint = <&ss_ep>; 7162306a36Sopenharmony_ci }; 7262306a36Sopenharmony_ci }; 7362306a36Sopenharmony_ci port@1 { 7462306a36Sopenharmony_ci reg = <1>; 7562306a36Sopenharmony_ci hd3ss3220_out_ep: endpoint { 7662306a36Sopenharmony_ci remote-endpoint = <&usb3_role_switch>; 7762306a36Sopenharmony_ci }; 7862306a36Sopenharmony_ci }; 7962306a36Sopenharmony_ci }; 8062306a36Sopenharmony_ci }; 8162306a36Sopenharmony_ci }; 82