162306a36Sopenharmony_ciHiSilicon STB xHCI 262306a36Sopenharmony_ci 362306a36Sopenharmony_ciThe device node for HiSilicon STB xHCI host controller 462306a36Sopenharmony_ci 562306a36Sopenharmony_ciRequired properties: 662306a36Sopenharmony_ci - compatible: should be "hisilicon,hi3798cv200-xhci" 762306a36Sopenharmony_ci - reg: specifies physical base address and size of the registers 862306a36Sopenharmony_ci - interrupts : interrupt used by the controller 962306a36Sopenharmony_ci - clocks: a list of phandle + clock-specifier pairs, one for each 1062306a36Sopenharmony_ci entry in clock-names 1162306a36Sopenharmony_ci - clock-names: must contain 1262306a36Sopenharmony_ci "bus": for bus clock 1362306a36Sopenharmony_ci "utmi": for utmi clock 1462306a36Sopenharmony_ci "pipe": for pipe clock 1562306a36Sopenharmony_ci "suspend": for suspend clock 1662306a36Sopenharmony_ci - resets: a list of phandle and reset specifier pairs as listed in 1762306a36Sopenharmony_ci reset-names property. 1862306a36Sopenharmony_ci - reset-names: must contain 1962306a36Sopenharmony_ci "soft": for soft reset 2062306a36Sopenharmony_ci - phys: a list of phandle + phy specifier pairs 2162306a36Sopenharmony_ci - phy-names: must contain at least one of following: 2262306a36Sopenharmony_ci "inno": for inno phy 2362306a36Sopenharmony_ci "combo": for combo phy 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_ciOptional properties: 2662306a36Sopenharmony_ci - usb2-lpm-disable: indicate if we don't want to enable USB2 HW LPM 2762306a36Sopenharmony_ci - usb3-lpm-capable: determines if platform is USB3 LPM capable 2862306a36Sopenharmony_ci - imod-interval-ns: default interrupt moderation interval is 40000ns 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ciExample: 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_cixhci0: xchi@f98a0000 { 3362306a36Sopenharmony_ci compatible = "hisilicon,hi3798cv200-xhci"; 3462306a36Sopenharmony_ci reg = <0xf98a0000 0x10000>; 3562306a36Sopenharmony_ci interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 3662306a36Sopenharmony_ci clocks = <&crg HISTB_USB3_BUS_CLK>, 3762306a36Sopenharmony_ci <&crg HISTB_USB3_UTMI_CLK>, 3862306a36Sopenharmony_ci <&crg HISTB_USB3_PIPE_CLK>, 3962306a36Sopenharmony_ci <&crg HISTB_USB3_SUSPEND_CLK>; 4062306a36Sopenharmony_ci clock-names = "bus", "utmi", "pipe", "suspend"; 4162306a36Sopenharmony_ci resets = <&crg 0xb0 12>; 4262306a36Sopenharmony_ci reset-names = "soft"; 4362306a36Sopenharmony_ci phys = <&usb2_phy1_port1 0>, <&combphy0 PHY_TYPE_USB3>; 4462306a36Sopenharmony_ci phy-names = "inno", "combo"; 4562306a36Sopenharmony_ci}; 46