162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/ufs/hisilicon,ufs.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: HiSilicon Universal Flash Storage (UFS) Controller 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Li Wei <liwei213@huawei.com> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci# Select only our matches, not all jedec,ufs 1362306a36Sopenharmony_ciselect: 1462306a36Sopenharmony_ci properties: 1562306a36Sopenharmony_ci compatible: 1662306a36Sopenharmony_ci contains: 1762306a36Sopenharmony_ci enum: 1862306a36Sopenharmony_ci - hisilicon,hi3660-ufs 1962306a36Sopenharmony_ci - hisilicon,hi3670-ufs 2062306a36Sopenharmony_ci required: 2162306a36Sopenharmony_ci - compatible 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ciallOf: 2462306a36Sopenharmony_ci - $ref: ufs-common.yaml 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ciproperties: 2762306a36Sopenharmony_ci compatible: 2862306a36Sopenharmony_ci oneOf: 2962306a36Sopenharmony_ci - items: 3062306a36Sopenharmony_ci - const: hisilicon,hi3660-ufs 3162306a36Sopenharmony_ci - const: jedec,ufs-1.1 3262306a36Sopenharmony_ci - items: 3362306a36Sopenharmony_ci - enum: 3462306a36Sopenharmony_ci - hisilicon,hi3670-ufs 3562306a36Sopenharmony_ci - const: jedec,ufs-2.1 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ci clocks: 3862306a36Sopenharmony_ci minItems: 2 3962306a36Sopenharmony_ci maxItems: 2 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_ci clock-names: 4262306a36Sopenharmony_ci items: 4362306a36Sopenharmony_ci - const: ref_clk 4462306a36Sopenharmony_ci - const: phy_clk 4562306a36Sopenharmony_ci 4662306a36Sopenharmony_ci reg: 4762306a36Sopenharmony_ci items: 4862306a36Sopenharmony_ci - description: UFS register address space 4962306a36Sopenharmony_ci - description: UFS SYS CTRL register address space 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_ci resets: 5262306a36Sopenharmony_ci maxItems: 1 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_ci reset-names: 5562306a36Sopenharmony_ci items: 5662306a36Sopenharmony_ci - const: rst 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_cirequired: 5962306a36Sopenharmony_ci - compatible 6062306a36Sopenharmony_ci - reg 6162306a36Sopenharmony_ci - resets 6262306a36Sopenharmony_ci - reset-names 6362306a36Sopenharmony_ci 6462306a36Sopenharmony_ciunevaluatedProperties: false 6562306a36Sopenharmony_ci 6662306a36Sopenharmony_ciexamples: 6762306a36Sopenharmony_ci - | 6862306a36Sopenharmony_ci #include <dt-bindings/clock/hi3670-clock.h> 6962306a36Sopenharmony_ci #include <dt-bindings/interrupt-controller/arm-gic.h> 7062306a36Sopenharmony_ci 7162306a36Sopenharmony_ci soc { 7262306a36Sopenharmony_ci #address-cells = <2>; 7362306a36Sopenharmony_ci #size-cells = <2>; 7462306a36Sopenharmony_ci 7562306a36Sopenharmony_ci ufs@ff3c0000 { 7662306a36Sopenharmony_ci compatible = "hisilicon,hi3670-ufs", "jedec,ufs-2.1"; 7762306a36Sopenharmony_ci reg = <0x0 0xff3c0000 0x0 0x1000>, 7862306a36Sopenharmony_ci <0x0 0xff3e0000 0x0 0x1000>; 7962306a36Sopenharmony_ci interrupt-parent = <&gic>; 8062306a36Sopenharmony_ci interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>; 8162306a36Sopenharmony_ci clocks = <&crg_ctrl HI3670_CLK_GATE_UFSIO_REF>, 8262306a36Sopenharmony_ci <&crg_ctrl HI3670_CLK_GATE_UFS_SUBSYS>; 8362306a36Sopenharmony_ci clock-names = "ref_clk", "phy_clk"; 8462306a36Sopenharmony_ci freq-table-hz = <0 0>, 8562306a36Sopenharmony_ci <0 0>; 8662306a36Sopenharmony_ci 8762306a36Sopenharmony_ci resets = <&crg_rst 0x84 12>; 8862306a36Sopenharmony_ci reset-names = "rst"; 8962306a36Sopenharmony_ci }; 9062306a36Sopenharmony_ci }; 91