162306a36Sopenharmony_ciSynopsys ARC Local Timer with Interrupt Capabilities 262306a36Sopenharmony_ci- Found on all ARC CPUs (ARC700/ARCHS) 362306a36Sopenharmony_ci- Can be optionally programmed to interrupt on Limit 462306a36Sopenharmony_ci- Two identical copies TIMER0 and TIMER1 exist in ARC cores and historically 562306a36Sopenharmony_ci TIMER0 used as clockevent provider (true for all ARC cores) 662306a36Sopenharmony_ci TIMER1 used for clocksource (mandatory for ARC700, optional for ARC HS) 762306a36Sopenharmony_ci 862306a36Sopenharmony_ciRequired properties: 962306a36Sopenharmony_ci 1062306a36Sopenharmony_ci- compatible : should be "snps,arc-timer" 1162306a36Sopenharmony_ci- interrupts : single Interrupt going into parent intc 1262306a36Sopenharmony_ci (16 for ARCHS cores, 3 for ARC700 cores) 1362306a36Sopenharmony_ci- clocks : phandle to the source clock 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ciExample: 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ci timer0 { 1862306a36Sopenharmony_ci compatible = "snps,arc-timer"; 1962306a36Sopenharmony_ci interrupts = <3>; 2062306a36Sopenharmony_ci interrupt-parent = <&core_intc>; 2162306a36Sopenharmony_ci clocks = <&core_clk>; 2262306a36Sopenharmony_ci }; 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci timer1 { 2562306a36Sopenharmony_ci compatible = "snps,arc-timer"; 2662306a36Sopenharmony_ci clocks = <&core_clk>; 2762306a36Sopenharmony_ci }; 28