162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/spi/spi-controller.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: SPI Controller Common Properties
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Mark Brown <broonie@kernel.org>
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_cidescription: |
1362306a36Sopenharmony_ci  SPI busses can be described with a node for the SPI controller device
1462306a36Sopenharmony_ci  and a set of child nodes for each SPI slave on the bus. The system SPI
1562306a36Sopenharmony_ci  controller may be described for use in SPI master mode or in SPI slave mode,
1662306a36Sopenharmony_ci  but not for both at the same time.
1762306a36Sopenharmony_ci
1862306a36Sopenharmony_ciproperties:
1962306a36Sopenharmony_ci  $nodename:
2062306a36Sopenharmony_ci    pattern: "^spi(@.*|-([0-9]|[1-9][0-9]+))?$"
2162306a36Sopenharmony_ci
2262306a36Sopenharmony_ci  "#address-cells":
2362306a36Sopenharmony_ci    enum: [0, 1]
2462306a36Sopenharmony_ci
2562306a36Sopenharmony_ci  "#size-cells":
2662306a36Sopenharmony_ci    const: 0
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ci  cs-gpios:
2962306a36Sopenharmony_ci    description: |
3062306a36Sopenharmony_ci      GPIOs used as chip selects.
3162306a36Sopenharmony_ci      If that property is used, the number of chip selects will be
3262306a36Sopenharmony_ci      increased automatically with max(cs-gpios, hardware chip selects).
3362306a36Sopenharmony_ci
3462306a36Sopenharmony_ci      So if, for example, the controller has 4 CS lines, and the
3562306a36Sopenharmony_ci      cs-gpios looks like this
3662306a36Sopenharmony_ci        cs-gpios = <&gpio1 0 0>, <0>, <&gpio1 1 0>, <&gpio1 2 0>;
3762306a36Sopenharmony_ci
3862306a36Sopenharmony_ci      Then it should be configured so that num_chipselect = 4, with
3962306a36Sopenharmony_ci      the following mapping
4062306a36Sopenharmony_ci        cs0 : &gpio1 0 0
4162306a36Sopenharmony_ci        cs1 : native
4262306a36Sopenharmony_ci        cs2 : &gpio1 1 0
4362306a36Sopenharmony_ci        cs3 : &gpio1 2 0
4462306a36Sopenharmony_ci
4562306a36Sopenharmony_ci      The second flag of a gpio descriptor can be GPIO_ACTIVE_HIGH (0)
4662306a36Sopenharmony_ci      or GPIO_ACTIVE_LOW(1). Legacy device trees often use 0.
4762306a36Sopenharmony_ci
4862306a36Sopenharmony_ci      There is a special rule set for combining the second flag of an
4962306a36Sopenharmony_ci      cs-gpio with the optional spi-cs-high flag for SPI slaves.
5062306a36Sopenharmony_ci
5162306a36Sopenharmony_ci      Each table entry defines how the CS pin is to be physically
5262306a36Sopenharmony_ci      driven (not considering potential gpio inversions by pinmux):
5362306a36Sopenharmony_ci
5462306a36Sopenharmony_ci      device node     | cs-gpio       | CS pin state active | Note
5562306a36Sopenharmony_ci      ================+===============+=====================+=====
5662306a36Sopenharmony_ci      spi-cs-high     | -             | H                   |
5762306a36Sopenharmony_ci      -               | -             | L                   |
5862306a36Sopenharmony_ci      spi-cs-high     | ACTIVE_HIGH   | H                   |
5962306a36Sopenharmony_ci      -               | ACTIVE_HIGH   | L                   | 1
6062306a36Sopenharmony_ci      spi-cs-high     | ACTIVE_LOW    | H                   | 2
6162306a36Sopenharmony_ci      -               | ACTIVE_LOW    | L                   |
6262306a36Sopenharmony_ci
6362306a36Sopenharmony_ci      Notes:
6462306a36Sopenharmony_ci      1) Should print a warning about polarity inversion.
6562306a36Sopenharmony_ci         Here it would be wise to avoid and define the gpio as
6662306a36Sopenharmony_ci         ACTIVE_LOW.
6762306a36Sopenharmony_ci      2) Should print a warning about polarity inversion
6862306a36Sopenharmony_ci         because ACTIVE_LOW is overridden by spi-cs-high.
6962306a36Sopenharmony_ci         Should be generally avoided and be replaced by
7062306a36Sopenharmony_ci         spi-cs-high + ACTIVE_HIGH.
7162306a36Sopenharmony_ci
7262306a36Sopenharmony_ci  num-cs:
7362306a36Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/uint32
7462306a36Sopenharmony_ci    description:
7562306a36Sopenharmony_ci      Total number of chip selects.
7662306a36Sopenharmony_ci
7762306a36Sopenharmony_ci  spi-slave:
7862306a36Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/flag
7962306a36Sopenharmony_ci    description:
8062306a36Sopenharmony_ci      The SPI controller acts as a slave, instead of a master.
8162306a36Sopenharmony_ci
8262306a36Sopenharmony_ci  slave:
8362306a36Sopenharmony_ci    type: object
8462306a36Sopenharmony_ci
8562306a36Sopenharmony_ci    properties:
8662306a36Sopenharmony_ci      compatible:
8762306a36Sopenharmony_ci        description:
8862306a36Sopenharmony_ci          Compatible of the SPI device.
8962306a36Sopenharmony_ci
9062306a36Sopenharmony_ci    required:
9162306a36Sopenharmony_ci      - compatible
9262306a36Sopenharmony_ci
9362306a36Sopenharmony_cipatternProperties:
9462306a36Sopenharmony_ci  "^.*@[0-9a-f]+$":
9562306a36Sopenharmony_ci    type: object
9662306a36Sopenharmony_ci    $ref: spi-peripheral-props.yaml
9762306a36Sopenharmony_ci    additionalProperties: true
9862306a36Sopenharmony_ci
9962306a36Sopenharmony_ci    properties:
10062306a36Sopenharmony_ci      spi-3wire:
10162306a36Sopenharmony_ci        $ref: /schemas/types.yaml#/definitions/flag
10262306a36Sopenharmony_ci        description:
10362306a36Sopenharmony_ci          The device requires 3-wire mode.
10462306a36Sopenharmony_ci
10562306a36Sopenharmony_ci      spi-cpha:
10662306a36Sopenharmony_ci        $ref: /schemas/types.yaml#/definitions/flag
10762306a36Sopenharmony_ci        description:
10862306a36Sopenharmony_ci          The device requires shifted clock phase (CPHA) mode.
10962306a36Sopenharmony_ci
11062306a36Sopenharmony_ci      spi-cpol:
11162306a36Sopenharmony_ci        $ref: /schemas/types.yaml#/definitions/flag
11262306a36Sopenharmony_ci        description:
11362306a36Sopenharmony_ci          The device requires inverse clock polarity (CPOL) mode.
11462306a36Sopenharmony_ci
11562306a36Sopenharmony_ci    required:
11662306a36Sopenharmony_ci      - compatible
11762306a36Sopenharmony_ci      - reg
11862306a36Sopenharmony_ci
11962306a36Sopenharmony_ciallOf:
12062306a36Sopenharmony_ci  - if:
12162306a36Sopenharmony_ci      not:
12262306a36Sopenharmony_ci        required:
12362306a36Sopenharmony_ci          - spi-slave
12462306a36Sopenharmony_ci    then:
12562306a36Sopenharmony_ci      properties:
12662306a36Sopenharmony_ci        "#address-cells":
12762306a36Sopenharmony_ci          const: 1
12862306a36Sopenharmony_ci    else:
12962306a36Sopenharmony_ci      properties:
13062306a36Sopenharmony_ci        "#address-cells":
13162306a36Sopenharmony_ci          const: 0
13262306a36Sopenharmony_ci
13362306a36Sopenharmony_ciadditionalProperties: true
13462306a36Sopenharmony_ci
13562306a36Sopenharmony_ciexamples:
13662306a36Sopenharmony_ci  - |
13762306a36Sopenharmony_ci    spi@80010000 {
13862306a36Sopenharmony_ci        #address-cells = <1>;
13962306a36Sopenharmony_ci        #size-cells = <0>;
14062306a36Sopenharmony_ci        compatible = "fsl,imx28-spi";
14162306a36Sopenharmony_ci        reg = <0x80010000 0x2000>;
14262306a36Sopenharmony_ci        interrupts = <96>;
14362306a36Sopenharmony_ci        dmas = <&dma_apbh 0>;
14462306a36Sopenharmony_ci        dma-names = "rx-tx";
14562306a36Sopenharmony_ci
14662306a36Sopenharmony_ci        display@0 {
14762306a36Sopenharmony_ci            compatible = "lg,lg4573";
14862306a36Sopenharmony_ci            spi-max-frequency = <1000000>;
14962306a36Sopenharmony_ci            reg = <0>;
15062306a36Sopenharmony_ci        };
15162306a36Sopenharmony_ci
15262306a36Sopenharmony_ci        sensor@1 {
15362306a36Sopenharmony_ci            compatible = "bosch,bme680";
15462306a36Sopenharmony_ci            spi-max-frequency = <100000>;
15562306a36Sopenharmony_ci            reg = <1>;
15662306a36Sopenharmony_ci        };
15762306a36Sopenharmony_ci
15862306a36Sopenharmony_ci        flash@2 {
15962306a36Sopenharmony_ci            compatible = "jedec,spi-nor";
16062306a36Sopenharmony_ci            spi-max-frequency = <50000000>;
16162306a36Sopenharmony_ci            reg = <2>, <3>;
16262306a36Sopenharmony_ci            stacked-memories = /bits/ 64 <0x10000000 0x10000000>;
16362306a36Sopenharmony_ci        };
16462306a36Sopenharmony_ci    };
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