162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/spi/qcom,spi-qup.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI)
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Andy Gross <agross@kernel.org>
1162306a36Sopenharmony_ci  - Bjorn Andersson <bjorn.andersson@linaro.org>
1262306a36Sopenharmony_ci  - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
1362306a36Sopenharmony_ci
1462306a36Sopenharmony_cidescription:
1562306a36Sopenharmony_ci  The QUP core is an AHB slave that provides a common data path (an output FIFO
1662306a36Sopenharmony_ci  and an input FIFO) for serial peripheral interface (SPI) mini-core.
1762306a36Sopenharmony_ci
1862306a36Sopenharmony_ci  SPI in master mode supports up to 50MHz, up to four chip selects,
1962306a36Sopenharmony_ci  programmable data path from 4 bits to 32 bits and numerous protocol variants.
2062306a36Sopenharmony_ci
2162306a36Sopenharmony_ciallOf:
2262306a36Sopenharmony_ci  - $ref: /schemas/spi/spi-controller.yaml#
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ciproperties:
2562306a36Sopenharmony_ci  compatible:
2662306a36Sopenharmony_ci    enum:
2762306a36Sopenharmony_ci      - qcom,spi-qup-v1.1.1 # for 8660, 8960 and 8064
2862306a36Sopenharmony_ci      - qcom,spi-qup-v2.1.1 # for 8974 and later
2962306a36Sopenharmony_ci      - qcom,spi-qup-v2.2.1 # for 8974 v2 and later
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_ci  clocks:
3262306a36Sopenharmony_ci    maxItems: 2
3362306a36Sopenharmony_ci
3462306a36Sopenharmony_ci  clock-names:
3562306a36Sopenharmony_ci    items:
3662306a36Sopenharmony_ci      - const: core
3762306a36Sopenharmony_ci      - const: iface
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ci  dmas:
4062306a36Sopenharmony_ci    maxItems: 2
4162306a36Sopenharmony_ci
4262306a36Sopenharmony_ci  dma-names:
4362306a36Sopenharmony_ci    items:
4462306a36Sopenharmony_ci      - const: tx
4562306a36Sopenharmony_ci      - const: rx
4662306a36Sopenharmony_ci
4762306a36Sopenharmony_ci  interrupts:
4862306a36Sopenharmony_ci    maxItems: 1
4962306a36Sopenharmony_ci
5062306a36Sopenharmony_ci  reg:
5162306a36Sopenharmony_ci    maxItems: 1
5262306a36Sopenharmony_ci
5362306a36Sopenharmony_cirequired:
5462306a36Sopenharmony_ci  - compatible
5562306a36Sopenharmony_ci  - clocks
5662306a36Sopenharmony_ci  - clock-names
5762306a36Sopenharmony_ci  - interrupts
5862306a36Sopenharmony_ci  - reg
5962306a36Sopenharmony_ci
6062306a36Sopenharmony_ciunevaluatedProperties: false
6162306a36Sopenharmony_ci
6262306a36Sopenharmony_ciexamples:
6362306a36Sopenharmony_ci  - |
6462306a36Sopenharmony_ci    #include <dt-bindings/clock/qcom,gcc-msm8996.h>
6562306a36Sopenharmony_ci    #include <dt-bindings/interrupt-controller/arm-gic.h>
6662306a36Sopenharmony_ci
6762306a36Sopenharmony_ci    spi@7575000 {
6862306a36Sopenharmony_ci        compatible = "qcom,spi-qup-v2.2.1";
6962306a36Sopenharmony_ci        reg = <0x07575000 0x600>;
7062306a36Sopenharmony_ci        interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
7162306a36Sopenharmony_ci        clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
7262306a36Sopenharmony_ci                 <&gcc GCC_BLSP1_AHB_CLK>;
7362306a36Sopenharmony_ci        clock-names = "core", "iface";
7462306a36Sopenharmony_ci        pinctrl-names = "default", "sleep";
7562306a36Sopenharmony_ci        pinctrl-0 = <&blsp1_spi1_default>;
7662306a36Sopenharmony_ci        pinctrl-1 = <&blsp1_spi1_sleep>;
7762306a36Sopenharmony_ci        dmas = <&blsp1_dma 12>, <&blsp1_dma 13>;
7862306a36Sopenharmony_ci        dma-names = "tx", "rx";
7962306a36Sopenharmony_ci        #address-cells = <1>;
8062306a36Sopenharmony_ci        #size-cells = <0>;
8162306a36Sopenharmony_ci    };
82