162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/sound/microchip,sama7g5-i2smcc.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: Microchip I2S Multi-Channel Controller
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_cidescription:
1362306a36Sopenharmony_ci  The I2SMCC complies with the Inter-IC Sound (I2S) bus specification and
1462306a36Sopenharmony_ci  supports a Time Division Multiplexed (TDM) interface with external
1562306a36Sopenharmony_ci  multi-channel audio codecs. It consists of a receiver, a transmitter and a
1662306a36Sopenharmony_ci  common clock generator that can be enabled separately to provide Adapter,
1762306a36Sopenharmony_ci  Client or Controller modes with receiver and/or transmitter active.
1862306a36Sopenharmony_ci  On later I2SMCC versions (starting with Microchip's SAMA7G5) I2S
1962306a36Sopenharmony_ci  multi-channel is supported by using multiple data pins, output and
2062306a36Sopenharmony_ci  input, without TDM.
2162306a36Sopenharmony_ci
2262306a36Sopenharmony_ciproperties:
2362306a36Sopenharmony_ci  "#sound-dai-cells":
2462306a36Sopenharmony_ci    const: 0
2562306a36Sopenharmony_ci
2662306a36Sopenharmony_ci  compatible:
2762306a36Sopenharmony_ci    enum:
2862306a36Sopenharmony_ci      - microchip,sam9x60-i2smcc
2962306a36Sopenharmony_ci      - microchip,sama7g5-i2smcc
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_ci  reg:
3262306a36Sopenharmony_ci    maxItems: 1
3362306a36Sopenharmony_ci
3462306a36Sopenharmony_ci  interrupts:
3562306a36Sopenharmony_ci    maxItems: 1
3662306a36Sopenharmony_ci
3762306a36Sopenharmony_ci  clocks:
3862306a36Sopenharmony_ci    items:
3962306a36Sopenharmony_ci      - description: Peripheral Bus Clock
4062306a36Sopenharmony_ci      - description: Generic Clock (Optional). Should be set mostly when Master
4162306a36Sopenharmony_ci          Mode is required.
4262306a36Sopenharmony_ci    minItems: 1
4362306a36Sopenharmony_ci
4462306a36Sopenharmony_ci  clock-names:
4562306a36Sopenharmony_ci    items:
4662306a36Sopenharmony_ci      - const: pclk
4762306a36Sopenharmony_ci      - const: gclk
4862306a36Sopenharmony_ci    minItems: 1
4962306a36Sopenharmony_ci
5062306a36Sopenharmony_ci  dmas:
5162306a36Sopenharmony_ci    items:
5262306a36Sopenharmony_ci      - description: TX DMA Channel
5362306a36Sopenharmony_ci      - description: RX DMA Channel
5462306a36Sopenharmony_ci
5562306a36Sopenharmony_ci  dma-names:
5662306a36Sopenharmony_ci    items:
5762306a36Sopenharmony_ci      - const: tx
5862306a36Sopenharmony_ci      - const: rx
5962306a36Sopenharmony_ci
6062306a36Sopenharmony_ci  microchip,tdm-data-pair:
6162306a36Sopenharmony_ci    description:
6262306a36Sopenharmony_ci      Represents the DIN/DOUT pair pins that are used to receive/send
6362306a36Sopenharmony_ci      TDM data. It is optional and it is only needed if the controller
6462306a36Sopenharmony_ci      uses the TDM mode.
6562306a36Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/uint8
6662306a36Sopenharmony_ci    enum: [0, 1, 2, 3]
6762306a36Sopenharmony_ci    default: 0
6862306a36Sopenharmony_ci
6962306a36Sopenharmony_ciallOf:
7062306a36Sopenharmony_ci  - $ref: dai-common.yaml#
7162306a36Sopenharmony_ci  - if:
7262306a36Sopenharmony_ci      properties:
7362306a36Sopenharmony_ci        compatible:
7462306a36Sopenharmony_ci          const: microchip,sam9x60-i2smcc
7562306a36Sopenharmony_ci    then:
7662306a36Sopenharmony_ci      properties:
7762306a36Sopenharmony_ci        microchip,tdm-data-pair: false
7862306a36Sopenharmony_ci
7962306a36Sopenharmony_cirequired:
8062306a36Sopenharmony_ci  - "#sound-dai-cells"
8162306a36Sopenharmony_ci  - compatible
8262306a36Sopenharmony_ci  - reg
8362306a36Sopenharmony_ci  - interrupts
8462306a36Sopenharmony_ci  - clocks
8562306a36Sopenharmony_ci  - clock-names
8662306a36Sopenharmony_ci  - dmas
8762306a36Sopenharmony_ci  - dma-names
8862306a36Sopenharmony_ci
8962306a36Sopenharmony_ciunevaluatedProperties: false
9062306a36Sopenharmony_ci
9162306a36Sopenharmony_ciexamples:
9262306a36Sopenharmony_ci  - |
9362306a36Sopenharmony_ci    #include <dt-bindings/dma/at91.h>
9462306a36Sopenharmony_ci    #include <dt-bindings/interrupt-controller/arm-gic.h>
9562306a36Sopenharmony_ci
9662306a36Sopenharmony_ci    i2s@f001c000 {
9762306a36Sopenharmony_ci        #sound-dai-cells = <0>;
9862306a36Sopenharmony_ci        compatible = "microchip,sam9x60-i2smcc";
9962306a36Sopenharmony_ci        reg = <0xf001c000 0x100>;
10062306a36Sopenharmony_ci        interrupts = <34 IRQ_TYPE_LEVEL_HIGH 7>;
10162306a36Sopenharmony_ci        dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
10262306a36Sopenharmony_ci                       AT91_XDMAC_DT_PERID(36))>,
10362306a36Sopenharmony_ci               <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
10462306a36Sopenharmony_ci                       AT91_XDMAC_DT_PERID(37))>;
10562306a36Sopenharmony_ci        dma-names = "tx", "rx";
10662306a36Sopenharmony_ci        clocks = <&i2s_clk>, <&i2s_gclk>;
10762306a36Sopenharmony_ci        clock-names = "pclk", "gclk";
10862306a36Sopenharmony_ci        pinctrl-names = "default";
10962306a36Sopenharmony_ci        pinctrl-0 = <&pinctrl_i2s_default>;
11062306a36Sopenharmony_ci    };
111