162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/soc/ti/wkup-m3-ipc.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Wakeup M3 IPC device 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Dave Gerlach <d-gerlach@ti.com> 1162306a36Sopenharmony_ci - Drew Fustini <dfustini@baylibre.com> 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_cidescription: |+ 1462306a36Sopenharmony_ci The TI AM33xx and AM43xx family of devices use a small Cortex M3 co-processor 1562306a36Sopenharmony_ci (commonly referred to as Wakeup M3 or CM3) to help with various low power tasks 1662306a36Sopenharmony_ci that cannot be controlled from the MPU, like suspend/resume and certain deep 1762306a36Sopenharmony_ci C-states for CPU Idle. Once the wkup_m3_ipc driver uses the wkup_m3_rproc driver 1862306a36Sopenharmony_ci to boot the wkup_m3, it handles communication with the CM3 using IPC registers 1962306a36Sopenharmony_ci present in the SoC's control module and a mailbox. The wkup_m3_ipc exposes an 2062306a36Sopenharmony_ci API to allow the SoC PM code to execute specific PM tasks. 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci Wkup M3 Device Node 2362306a36Sopenharmony_ci ==================== 2462306a36Sopenharmony_ci A wkup_m3_ipc device node is used to represent the IPC registers within an 2562306a36Sopenharmony_ci SoC. 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_ci Support for VTT Toggle with GPIO pin 2862306a36Sopenharmony_ci ==================================== 2962306a36Sopenharmony_ci On some boards like the AM335x EVM-SK and the AM437x GP EVM, a GPIO pin is 3062306a36Sopenharmony_ci connected to the enable pin on the DDR VTT regulator. This allows the 3162306a36Sopenharmony_ci regulator to be disabled upon suspend and enabled upon resume. Please note 3262306a36Sopenharmony_ci that the GPIO pin must be part of the GPIO0 module as only this GPIO module 3362306a36Sopenharmony_ci is in the wakeup power domain. 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ci Support for IO Isolation 3662306a36Sopenharmony_ci ======================== 3762306a36Sopenharmony_ci On AM437x SoCs, certain pins can be forced into an alternate state when IO 3862306a36Sopenharmony_ci isolation is activated. Those pins have pad control registers prefixed by 3962306a36Sopenharmony_ci 'CTRL_CONF_' that contain DS0 (e.g. deep sleep) configuration bits that can 4062306a36Sopenharmony_ci override the pin's existing bias (pull-up/pull-down) and value (high/low) when 4162306a36Sopenharmony_ci IO isolation is active. 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_ci Support for I2C PMIC Voltage Scaling 4462306a36Sopenharmony_ci ==================================== 4562306a36Sopenharmony_ci It is possible to pass the name of a binary file to load into the CM3 memory. 4662306a36Sopenharmony_ci The binary data is the I2C sequences for the CM3 to send out to the PMIC 4762306a36Sopenharmony_ci during low power mode entry. 4862306a36Sopenharmony_ci 4962306a36Sopenharmony_ciproperties: 5062306a36Sopenharmony_ci compatible: 5162306a36Sopenharmony_ci enum: 5262306a36Sopenharmony_ci - ti,am3352-wkup-m3-ipc # for AM33xx SoCs 5362306a36Sopenharmony_ci - ti,am4372-wkup-m3-ipc # for AM43xx SoCs 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_ci reg: 5662306a36Sopenharmony_ci description: 5762306a36Sopenharmony_ci The IPC register address space to communicate with the Wakeup M3 processor 5862306a36Sopenharmony_ci maxItems: 1 5962306a36Sopenharmony_ci 6062306a36Sopenharmony_ci interrupts: 6162306a36Sopenharmony_ci description: wkup_m3 interrupt that signals the MPU 6262306a36Sopenharmony_ci maxItems: 1 6362306a36Sopenharmony_ci 6462306a36Sopenharmony_ci ti,rproc: 6562306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/phandle 6662306a36Sopenharmony_ci description: 6762306a36Sopenharmony_ci phandle to the wkup_m3 rproc node so the IPC driver can boot it 6862306a36Sopenharmony_ci 6962306a36Sopenharmony_ci mboxes: 7062306a36Sopenharmony_ci description: 7162306a36Sopenharmony_ci phandles used by IPC framework to get correct mbox 7262306a36Sopenharmony_ci channel for communication. Must point to appropriate 7362306a36Sopenharmony_ci mbox_wkupm3 child node. 7462306a36Sopenharmony_ci maxItems: 1 7562306a36Sopenharmony_ci 7662306a36Sopenharmony_ci firmware-name: 7762306a36Sopenharmony_ci description: 7862306a36Sopenharmony_ci Name of binary file with I2C sequences for PMIC voltage scaling 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_ci ti,vtt-gpio-pin: 8162306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/uint32 8262306a36Sopenharmony_ci description: GPIO pin connected to enable pin on VTT regulator 8362306a36Sopenharmony_ci 8462306a36Sopenharmony_ci ti,set-io-isolation: 8562306a36Sopenharmony_ci type: boolean 8662306a36Sopenharmony_ci description: 8762306a36Sopenharmony_ci If this property is present, then the wkup_m3_ipc driver will instruct 8862306a36Sopenharmony_ci the CM3 firmware to activate IO isolation when suspending to deep sleep. 8962306a36Sopenharmony_ci This can be leveraged by a board design to put other devices on the board 9062306a36Sopenharmony_ci into a low power state. 9162306a36Sopenharmony_ci 9262306a36Sopenharmony_ciallOf: 9362306a36Sopenharmony_ci - if: 9462306a36Sopenharmony_ci properties: 9562306a36Sopenharmony_ci compatible: 9662306a36Sopenharmony_ci not: 9762306a36Sopenharmony_ci contains: 9862306a36Sopenharmony_ci const: ti,am4372-wkup-m3-ipc 9962306a36Sopenharmony_ci then: 10062306a36Sopenharmony_ci properties: 10162306a36Sopenharmony_ci ti,set-io-isolation: false 10262306a36Sopenharmony_ci 10362306a36Sopenharmony_cirequired: 10462306a36Sopenharmony_ci - compatible 10562306a36Sopenharmony_ci - reg 10662306a36Sopenharmony_ci - interrupts 10762306a36Sopenharmony_ci - ti,rproc 10862306a36Sopenharmony_ci - mboxes 10962306a36Sopenharmony_ci 11062306a36Sopenharmony_ciadditionalProperties: false 11162306a36Sopenharmony_ci 11262306a36Sopenharmony_ciexamples: 11362306a36Sopenharmony_ci - | 11462306a36Sopenharmony_ci /* Example for AM335x SoC */ 11562306a36Sopenharmony_ci soc { 11662306a36Sopenharmony_ci #address-cells = <1>; 11762306a36Sopenharmony_ci #size-cells = <1>; 11862306a36Sopenharmony_ci 11962306a36Sopenharmony_ci am335x_mailbox: mailbox { 12062306a36Sopenharmony_ci #mbox-cells = <1>; 12162306a36Sopenharmony_ci }; 12262306a36Sopenharmony_ci 12362306a36Sopenharmony_ci wkup_m3_ipc@1324 { 12462306a36Sopenharmony_ci compatible = "ti,am3352-wkup-m3-ipc"; 12562306a36Sopenharmony_ci reg = <0x1324 0x24>; 12662306a36Sopenharmony_ci interrupts = <78>; 12762306a36Sopenharmony_ci ti,rproc = <&wkup_m3>; 12862306a36Sopenharmony_ci mboxes = <&am335x_mailbox &mbox_wkupm3>; 12962306a36Sopenharmony_ci ti,vtt-gpio-pin = <7>; 13062306a36Sopenharmony_ci firmware-name = "am335x-evm-scale-data.bin"; 13162306a36Sopenharmony_ci }; 13262306a36Sopenharmony_ci }; 13362306a36Sopenharmony_ci 13462306a36Sopenharmony_ci - | 13562306a36Sopenharmony_ci /* 13662306a36Sopenharmony_ci * Example for AM473x SoC: 13762306a36Sopenharmony_ci * On the AM437x-GP-EVM board, gpio5_7 is wired to enable pin of the DDR VTT 13862306a36Sopenharmony_ci * regulator. The 'ddr_vtt_toggle_default' pinmux node configures gpio5_7 13962306a36Sopenharmony_ci * for pull-up during normal system operation. However, the DS0 (deep sleep) 14062306a36Sopenharmony_ci * state of the pin is configured for pull-down and thus the VTT regulator 14162306a36Sopenharmony_ci * will be disabled to save power when IO isolation is active. Note that 14262306a36Sopenharmony_ci * this method is an alternative to using the 'ti,vtt-gpio-pin' property. 14362306a36Sopenharmony_ci */ 14462306a36Sopenharmony_ci #include <dt-bindings/pinctrl/am43xx.h> 14562306a36Sopenharmony_ci soc { 14662306a36Sopenharmony_ci #address-cells = <1>; 14762306a36Sopenharmony_ci #size-cells = <1>; 14862306a36Sopenharmony_ci 14962306a36Sopenharmony_ci am437x_mailbox: mailbox { 15062306a36Sopenharmony_ci #mbox-cells = <1>; 15162306a36Sopenharmony_ci }; 15262306a36Sopenharmony_ci 15362306a36Sopenharmony_ci am43xx_pinmux { 15462306a36Sopenharmony_ci pinctrl-names = "default"; 15562306a36Sopenharmony_ci pinctrl-0 = <&ddr3_vtt_toggle_default>; 15662306a36Sopenharmony_ci 15762306a36Sopenharmony_ci ddr3_vtt_toggle_default: ddr_vtt_toggle_default { 15862306a36Sopenharmony_ci pinctrl-single,pins = < 15962306a36Sopenharmony_ci 0x25C (DS0_PULL_UP_DOWN_EN | PIN_OUTPUT_PULLUP | DS0_FORCE_OFF_MODE | MUX_MODE7) 16062306a36Sopenharmony_ci >; 16162306a36Sopenharmony_ci }; 16262306a36Sopenharmony_ci }; 16362306a36Sopenharmony_ci 16462306a36Sopenharmony_ci wkup_m3_ipc@1324 { 16562306a36Sopenharmony_ci compatible = "ti,am4372-wkup-m3-ipc"; 16662306a36Sopenharmony_ci reg = <0x1324 0x24>; 16762306a36Sopenharmony_ci interrupts = <78>; 16862306a36Sopenharmony_ci ti,rproc = <&wkup_m3>; 16962306a36Sopenharmony_ci mboxes = <&am437x_mailbox &mbox_wkupm3>; 17062306a36Sopenharmony_ci ti,set-io-isolation; 17162306a36Sopenharmony_ci firmware-name = "am43x-evm-scale-data.bin"; 17262306a36Sopenharmony_ci }; 17362306a36Sopenharmony_ci }; 17462306a36Sopenharmony_ci 17562306a36Sopenharmony_ci... 176