162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Samsung's Exynos USI (Universal Serial Interface) 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Sam Protsenko <semen.protsenko@linaro.org> 1162306a36Sopenharmony_ci - Krzysztof Kozlowski <krzk@kernel.org> 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_cidescription: | 1462306a36Sopenharmony_ci USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C). 1562306a36Sopenharmony_ci USI shares almost all internal circuits within each protocol, so only one 1662306a36Sopenharmony_ci protocol can be chosen at a time. USI is modeled as a node with zero or more 1762306a36Sopenharmony_ci child nodes, each representing a serial sub-node device. The mode setting 1862306a36Sopenharmony_ci selects which particular function will be used. 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_ciproperties: 2162306a36Sopenharmony_ci $nodename: 2262306a36Sopenharmony_ci pattern: "^usi@[0-9a-f]+$" 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci compatible: 2562306a36Sopenharmony_ci oneOf: 2662306a36Sopenharmony_ci - items: 2762306a36Sopenharmony_ci - const: samsung,exynosautov9-usi 2862306a36Sopenharmony_ci - const: samsung,exynos850-usi 2962306a36Sopenharmony_ci - enum: 3062306a36Sopenharmony_ci - samsung,exynos850-usi 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ci reg: true 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_ci clocks: true 3562306a36Sopenharmony_ci 3662306a36Sopenharmony_ci clock-names: true 3762306a36Sopenharmony_ci 3862306a36Sopenharmony_ci ranges: true 3962306a36Sopenharmony_ci 4062306a36Sopenharmony_ci "#address-cells": 4162306a36Sopenharmony_ci const: 1 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_ci "#size-cells": 4462306a36Sopenharmony_ci const: 1 4562306a36Sopenharmony_ci 4662306a36Sopenharmony_ci samsung,sysreg: 4762306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/phandle-array 4862306a36Sopenharmony_ci items: 4962306a36Sopenharmony_ci - items: 5062306a36Sopenharmony_ci - description: phandle to System Register syscon node 5162306a36Sopenharmony_ci - description: offset of SW_CONF register for this USI controller 5262306a36Sopenharmony_ci description: 5362306a36Sopenharmony_ci Should be phandle/offset pair. The phandle to System Register syscon node 5462306a36Sopenharmony_ci (for the same domain where this USI controller resides) and the offset 5562306a36Sopenharmony_ci of SW_CONF register for this USI controller. 5662306a36Sopenharmony_ci 5762306a36Sopenharmony_ci samsung,mode: 5862306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/uint32 5962306a36Sopenharmony_ci description: 6062306a36Sopenharmony_ci Selects USI function (which serial protocol to use). Refer to 6162306a36Sopenharmony_ci <include/dt-bindings/soc/samsung,exynos-usi.h> for valid USI mode values. 6262306a36Sopenharmony_ci 6362306a36Sopenharmony_ci samsung,clkreq-on: 6462306a36Sopenharmony_ci type: boolean 6562306a36Sopenharmony_ci description: 6662306a36Sopenharmony_ci Enable this property if underlying protocol requires the clock to be 6762306a36Sopenharmony_ci continuously provided without automatic gating. As suggested by SoC 6862306a36Sopenharmony_ci manual, it should be set in case of SPI/I2C slave, UART Rx and I2C 6962306a36Sopenharmony_ci multi-master mode. Usually this property is needed if USI mode is set 7062306a36Sopenharmony_ci to "UART". 7162306a36Sopenharmony_ci 7262306a36Sopenharmony_ci This property is optional. 7362306a36Sopenharmony_ci 7462306a36Sopenharmony_cipatternProperties: 7562306a36Sopenharmony_ci "^i2c@[0-9a-f]+$": 7662306a36Sopenharmony_ci $ref: /schemas/i2c/i2c-exynos5.yaml 7762306a36Sopenharmony_ci description: Child node describing underlying I2C 7862306a36Sopenharmony_ci 7962306a36Sopenharmony_ci "^serial@[0-9a-f]+$": 8062306a36Sopenharmony_ci $ref: /schemas/serial/samsung_uart.yaml 8162306a36Sopenharmony_ci description: Child node describing underlying UART/serial 8262306a36Sopenharmony_ci 8362306a36Sopenharmony_ci "^spi@[0-9a-f]+$": 8462306a36Sopenharmony_ci $ref: /schemas/spi/samsung,spi.yaml 8562306a36Sopenharmony_ci description: Child node describing underlying SPI 8662306a36Sopenharmony_ci 8762306a36Sopenharmony_cirequired: 8862306a36Sopenharmony_ci - compatible 8962306a36Sopenharmony_ci - ranges 9062306a36Sopenharmony_ci - "#address-cells" 9162306a36Sopenharmony_ci - "#size-cells" 9262306a36Sopenharmony_ci - samsung,sysreg 9362306a36Sopenharmony_ci - samsung,mode 9462306a36Sopenharmony_ci 9562306a36Sopenharmony_ciif: 9662306a36Sopenharmony_ci properties: 9762306a36Sopenharmony_ci compatible: 9862306a36Sopenharmony_ci contains: 9962306a36Sopenharmony_ci enum: 10062306a36Sopenharmony_ci - samsung,exynos850-usi 10162306a36Sopenharmony_ci 10262306a36Sopenharmony_cithen: 10362306a36Sopenharmony_ci properties: 10462306a36Sopenharmony_ci reg: 10562306a36Sopenharmony_ci maxItems: 1 10662306a36Sopenharmony_ci 10762306a36Sopenharmony_ci clocks: 10862306a36Sopenharmony_ci items: 10962306a36Sopenharmony_ci - description: Bus (APB) clock 11062306a36Sopenharmony_ci - description: Operating clock for UART/SPI/I2C protocol 11162306a36Sopenharmony_ci 11262306a36Sopenharmony_ci clock-names: 11362306a36Sopenharmony_ci items: 11462306a36Sopenharmony_ci - const: pclk 11562306a36Sopenharmony_ci - const: ipclk 11662306a36Sopenharmony_ci 11762306a36Sopenharmony_ci required: 11862306a36Sopenharmony_ci - reg 11962306a36Sopenharmony_ci - clocks 12062306a36Sopenharmony_ci - clock-names 12162306a36Sopenharmony_ci 12262306a36Sopenharmony_cielse: 12362306a36Sopenharmony_ci properties: 12462306a36Sopenharmony_ci reg: false 12562306a36Sopenharmony_ci clocks: false 12662306a36Sopenharmony_ci clock-names: false 12762306a36Sopenharmony_ci samsung,clkreq-on: false 12862306a36Sopenharmony_ci 12962306a36Sopenharmony_ciadditionalProperties: false 13062306a36Sopenharmony_ci 13162306a36Sopenharmony_ciexamples: 13262306a36Sopenharmony_ci - | 13362306a36Sopenharmony_ci #include <dt-bindings/interrupt-controller/arm-gic.h> 13462306a36Sopenharmony_ci #include <dt-bindings/soc/samsung,exynos-usi.h> 13562306a36Sopenharmony_ci 13662306a36Sopenharmony_ci usi0: usi@138200c0 { 13762306a36Sopenharmony_ci compatible = "samsung,exynos850-usi"; 13862306a36Sopenharmony_ci reg = <0x138200c0 0x20>; 13962306a36Sopenharmony_ci samsung,sysreg = <&sysreg_peri 0x1010>; 14062306a36Sopenharmony_ci samsung,mode = <USI_V2_UART>; 14162306a36Sopenharmony_ci samsung,clkreq-on; /* needed for UART mode */ 14262306a36Sopenharmony_ci #address-cells = <1>; 14362306a36Sopenharmony_ci #size-cells = <1>; 14462306a36Sopenharmony_ci ranges; 14562306a36Sopenharmony_ci clocks = <&cmu_peri 32>, <&cmu_peri 31>; 14662306a36Sopenharmony_ci clock-names = "pclk", "ipclk"; 14762306a36Sopenharmony_ci 14862306a36Sopenharmony_ci serial_0: serial@13820000 { 14962306a36Sopenharmony_ci compatible = "samsung,exynos850-uart"; 15062306a36Sopenharmony_ci reg = <0x13820000 0xc0>; 15162306a36Sopenharmony_ci interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>; 15262306a36Sopenharmony_ci clocks = <&cmu_peri 32>, <&cmu_peri 31>; 15362306a36Sopenharmony_ci clock-names = "uart", "clk_uart_baud0"; 15462306a36Sopenharmony_ci status = "disabled"; 15562306a36Sopenharmony_ci }; 15662306a36Sopenharmony_ci 15762306a36Sopenharmony_ci hsi2c_0: i2c@13820000 { 15862306a36Sopenharmony_ci compatible = "samsung,exynosautov9-hsi2c"; 15962306a36Sopenharmony_ci reg = <0x13820000 0xc0>; 16062306a36Sopenharmony_ci interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>; 16162306a36Sopenharmony_ci #address-cells = <1>; 16262306a36Sopenharmony_ci #size-cells = <0>; 16362306a36Sopenharmony_ci clocks = <&cmu_peri 31>, <&cmu_peri 32>; 16462306a36Sopenharmony_ci clock-names = "hsi2c", "hsi2c_pclk"; 16562306a36Sopenharmony_ci status = "disabled"; 16662306a36Sopenharmony_ci }; 16762306a36Sopenharmony_ci }; 168