162306a36Sopenharmony_ci* STMicroelectronics SAS. ST33ZP24 TPM SoC 262306a36Sopenharmony_ci 362306a36Sopenharmony_ciRequired properties: 462306a36Sopenharmony_ci- compatible: Should be "st,st33zp24-i2c". 562306a36Sopenharmony_ci- clock-frequency: I²C work frequency. 662306a36Sopenharmony_ci- reg: address on the bus 762306a36Sopenharmony_ci 862306a36Sopenharmony_ciOptional ST33ZP24 Properties: 962306a36Sopenharmony_ci- interrupts: GPIO interrupt to which the chip is connected 1062306a36Sopenharmony_ci- lpcpd-gpios: Output GPIO pin used for ST33ZP24 power management D1/D2 state. 1162306a36Sopenharmony_ciIf set, power must be present when the platform is going into sleep/hibernate mode. 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ciOptional SoC Specific Properties: 1462306a36Sopenharmony_ci- pinctrl-names: Contains only one value - "default". 1562306a36Sopenharmony_ci- pintctrl-0: Specifies the pin control groups used for this controller. 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ciExample (for ARM-based BeagleBoard xM with ST33ZP24 on I2C2): 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci&i2c2 { 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci st33zp24: st33zp24@13 { 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci compatible = "st,st33zp24-i2c"; 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci reg = <0x13>; 2762306a36Sopenharmony_ci clock-frequency = <400000>; 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci interrupt-parent = <&gpio5>; 3062306a36Sopenharmony_ci interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ci lpcpd-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>; 3362306a36Sopenharmony_ci }; 3462306a36Sopenharmony_ci}; 35