162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/reset/lantiq,reset.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Lantiq XWAY SoC RCU reset controller 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Martin Blumenstingl <martin.blumenstingl@googlemail.com> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_cidescription: | 1362306a36Sopenharmony_ci This binding describes a reset-controller found on the RCU module on Lantiq 1462306a36Sopenharmony_ci XWAY SoCs. This node has to be a sub node of the Lantiq RCU block. 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ciproperties: 1762306a36Sopenharmony_ci compatible: 1862306a36Sopenharmony_ci enum: 1962306a36Sopenharmony_ci - lantiq,danube-reset 2062306a36Sopenharmony_ci - lantiq,xrx200-reset 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci reg: 2362306a36Sopenharmony_ci description: | 2462306a36Sopenharmony_ci Defines the following sets of registers in the parent syscon device 2562306a36Sopenharmony_ci Offset of the reset set register 2662306a36Sopenharmony_ci Offset of the reset status register 2762306a36Sopenharmony_ci maxItems: 2 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci '#reset-cells': 3062306a36Sopenharmony_ci description: | 3162306a36Sopenharmony_ci The first cell takes the reset set bit and the second cell takes the 3262306a36Sopenharmony_ci status bit. 3362306a36Sopenharmony_ci const: 2 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_cirequired: 3662306a36Sopenharmony_ci - compatible 3762306a36Sopenharmony_ci - reg 3862306a36Sopenharmony_ci - '#reset-cells' 3962306a36Sopenharmony_ci 4062306a36Sopenharmony_ciadditionalProperties: false 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ciexamples: 4362306a36Sopenharmony_ci - | 4462306a36Sopenharmony_ci // On the xRX200 SoCs: 4562306a36Sopenharmony_ci reset0: reset-controller@10 { 4662306a36Sopenharmony_ci compatible = "lantiq,xrx200-reset"; 4762306a36Sopenharmony_ci reg = <0x10 0x04>, <0x14 0x04>; 4862306a36Sopenharmony_ci #reset-cells = <2>; 4962306a36Sopenharmony_ci }; 50