162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/reset/fsl,imx-src.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: Freescale i.MX System Reset Controller
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Philipp Zabel <p.zabel@pengutronix.de>
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_cidescription: |
1362306a36Sopenharmony_ci  The system reset controller can be used to reset the GPU, VPU,
1462306a36Sopenharmony_ci  IPU, and OpenVG IP modules on i.MX5 and i.MX6 ICs. Those device
1562306a36Sopenharmony_ci  nodes should specify the reset line on the SRC in their resets
1662306a36Sopenharmony_ci  property, containing a phandle to the SRC device node and a
1762306a36Sopenharmony_ci  RESET_INDEX specifying which module to reset, as described in
1862306a36Sopenharmony_ci  reset.txt
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ci  The following RESET_INDEX values are valid for i.MX5:
2162306a36Sopenharmony_ci    GPU_RESET     0
2262306a36Sopenharmony_ci    VPU_RESET     1
2362306a36Sopenharmony_ci    IPU1_RESET    2
2462306a36Sopenharmony_ci    OPEN_VG_RESET 3
2562306a36Sopenharmony_ci  The following additional RESET_INDEX value is valid for i.MX6:
2662306a36Sopenharmony_ci    IPU2_RESET    4
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ciproperties:
2962306a36Sopenharmony_ci  compatible:
3062306a36Sopenharmony_ci    oneOf:
3162306a36Sopenharmony_ci      - const: "fsl,imx51-src"
3262306a36Sopenharmony_ci      - items:
3362306a36Sopenharmony_ci          - const: "fsl,imx50-src"
3462306a36Sopenharmony_ci          - const: "fsl,imx51-src"
3562306a36Sopenharmony_ci      - items:
3662306a36Sopenharmony_ci          - const: "fsl,imx53-src"
3762306a36Sopenharmony_ci          - const: "fsl,imx51-src"
3862306a36Sopenharmony_ci      - items:
3962306a36Sopenharmony_ci          - const: "fsl,imx6q-src"
4062306a36Sopenharmony_ci          - const: "fsl,imx51-src"
4162306a36Sopenharmony_ci      - items:
4262306a36Sopenharmony_ci          - const: "fsl,imx6sx-src"
4362306a36Sopenharmony_ci          - const: "fsl,imx51-src"
4462306a36Sopenharmony_ci      - items:
4562306a36Sopenharmony_ci          - const: "fsl,imx6sl-src"
4662306a36Sopenharmony_ci          - const: "fsl,imx51-src"
4762306a36Sopenharmony_ci      - items:
4862306a36Sopenharmony_ci          - const: "fsl,imx6ul-src"
4962306a36Sopenharmony_ci          - const: "fsl,imx51-src"
5062306a36Sopenharmony_ci      - items:
5162306a36Sopenharmony_ci          - const: "fsl,imx6sll-src"
5262306a36Sopenharmony_ci          - const: "fsl,imx51-src"
5362306a36Sopenharmony_ci
5462306a36Sopenharmony_ci  reg:
5562306a36Sopenharmony_ci    maxItems: 1
5662306a36Sopenharmony_ci
5762306a36Sopenharmony_ci  interrupts:
5862306a36Sopenharmony_ci    items:
5962306a36Sopenharmony_ci      - description: SRC interrupt
6062306a36Sopenharmony_ci      - description: CPU WDOG interrupts out of SRC
6162306a36Sopenharmony_ci    minItems: 1
6262306a36Sopenharmony_ci
6362306a36Sopenharmony_ci  '#reset-cells':
6462306a36Sopenharmony_ci    const: 1
6562306a36Sopenharmony_ci
6662306a36Sopenharmony_cirequired:
6762306a36Sopenharmony_ci  - compatible
6862306a36Sopenharmony_ci  - reg
6962306a36Sopenharmony_ci  - interrupts
7062306a36Sopenharmony_ci  - '#reset-cells'
7162306a36Sopenharmony_ci
7262306a36Sopenharmony_ciadditionalProperties: false
7362306a36Sopenharmony_ci
7462306a36Sopenharmony_ciexamples:
7562306a36Sopenharmony_ci  - |
7662306a36Sopenharmony_ci    reset-controller@73fd0000 {
7762306a36Sopenharmony_ci        compatible = "fsl,imx51-src";
7862306a36Sopenharmony_ci        reg = <0x73fd0000 0x4000>;
7962306a36Sopenharmony_ci        interrupts = <75>;
8062306a36Sopenharmony_ci        #reset-cells = <1>;
8162306a36Sopenharmony_ci    };
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