162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: TI K3 DSP devices 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Suman Anna <s-anna@ti.com> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_cidescription: | 1362306a36Sopenharmony_ci The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems 1462306a36Sopenharmony_ci that are used to offload some of the processor-intensive tasks or algorithms, 1562306a36Sopenharmony_ci for achieving various system level goals. 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ci These processor sub-systems usually contain additional sub-modules like 1862306a36Sopenharmony_ci L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory 1962306a36Sopenharmony_ci controller, a dedicated local power/sleep controller etc. The DSP processor 2062306a36Sopenharmony_ci cores in the K3 SoCs are usually either a TMS320C66x CorePac processor or a 2162306a36Sopenharmony_ci TMS320C71x CorePac processor. 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ci Each DSP Core sub-system is represented as a single DT node. Each node has a 2462306a36Sopenharmony_ci number of required or optional properties that enable the OS running on the 2562306a36Sopenharmony_ci host processor (Arm CorePac) to perform the device management of the remote 2662306a36Sopenharmony_ci processor and to communicate with the remote processor. 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ciallOf: 2962306a36Sopenharmony_ci - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml# 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ciproperties: 3262306a36Sopenharmony_ci compatible: 3362306a36Sopenharmony_ci enum: 3462306a36Sopenharmony_ci - ti,am62a-c7xv-dsp 3562306a36Sopenharmony_ci - ti,j721e-c66-dsp 3662306a36Sopenharmony_ci - ti,j721e-c71-dsp 3762306a36Sopenharmony_ci - ti,j721s2-c71-dsp 3862306a36Sopenharmony_ci description: 3962306a36Sopenharmony_ci Use "ti,am62a-c7xv-dsp" for AM62A Deep learning DSPs on K3 AM62A SoCs 4062306a36Sopenharmony_ci Use "ti,j721e-c66-dsp" for C66x DSPs on K3 J721E SoCs 4162306a36Sopenharmony_ci Use "ti,j721e-c71-dsp" for C71x DSPs on K3 J721E SoCs 4262306a36Sopenharmony_ci Use "ti,j721s2-c71-dsp" for C71x DSPs on K3 J721S2 SoCs 4362306a36Sopenharmony_ci 4462306a36Sopenharmony_ci resets: 4562306a36Sopenharmony_ci description: | 4662306a36Sopenharmony_ci Should contain the phandle to the reset controller node managing the 4762306a36Sopenharmony_ci local resets for this device, and a reset specifier. 4862306a36Sopenharmony_ci maxItems: 1 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_ci firmware-name: 5162306a36Sopenharmony_ci description: | 5262306a36Sopenharmony_ci Should contain the name of the default firmware image 5362306a36Sopenharmony_ci file located on the firmware search path 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_ci mboxes: 5662306a36Sopenharmony_ci description: | 5762306a36Sopenharmony_ci OMAP Mailbox specifier denoting the sub-mailbox, to be used for 5862306a36Sopenharmony_ci communication with the remote processor. This property should match 5962306a36Sopenharmony_ci with the sub-mailbox node used in the firmware image. 6062306a36Sopenharmony_ci maxItems: 1 6162306a36Sopenharmony_ci 6262306a36Sopenharmony_ci memory-region: 6362306a36Sopenharmony_ci minItems: 2 6462306a36Sopenharmony_ci maxItems: 8 6562306a36Sopenharmony_ci description: | 6662306a36Sopenharmony_ci phandle to the reserved memory nodes to be associated with the remoteproc 6762306a36Sopenharmony_ci device. There should be at least two reserved memory nodes defined. The 6862306a36Sopenharmony_ci reserved memory nodes should be carveout nodes, and should be defined as 6962306a36Sopenharmony_ci per the bindings in 7062306a36Sopenharmony_ci Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt 7162306a36Sopenharmony_ci items: 7262306a36Sopenharmony_ci - description: region used for dynamic DMA allocations like vrings and 7362306a36Sopenharmony_ci vring buffers 7462306a36Sopenharmony_ci - description: region reserved for firmware image sections 7562306a36Sopenharmony_ci additionalItems: true 7662306a36Sopenharmony_ci 7762306a36Sopenharmony_ci# Optional properties: 7862306a36Sopenharmony_ci# -------------------- 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_ci sram: 8162306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/phandle-array 8262306a36Sopenharmony_ci minItems: 1 8362306a36Sopenharmony_ci maxItems: 4 8462306a36Sopenharmony_ci items: 8562306a36Sopenharmony_ci maxItems: 1 8662306a36Sopenharmony_ci description: | 8762306a36Sopenharmony_ci phandles to one or more reserved on-chip SRAM regions. The regions 8862306a36Sopenharmony_ci should be defined as child nodes of the respective SRAM node, and 8962306a36Sopenharmony_ci should be defined as per the generic bindings in, 9062306a36Sopenharmony_ci Documentation/devicetree/bindings/sram/sram.yaml 9162306a36Sopenharmony_ci 9262306a36Sopenharmony_ciif: 9362306a36Sopenharmony_ci properties: 9462306a36Sopenharmony_ci compatible: 9562306a36Sopenharmony_ci enum: 9662306a36Sopenharmony_ci - ti,j721e-c66-dsp 9762306a36Sopenharmony_cithen: 9862306a36Sopenharmony_ci properties: 9962306a36Sopenharmony_ci reg: 10062306a36Sopenharmony_ci items: 10162306a36Sopenharmony_ci - description: Address and Size of the L2 SRAM internal memory region 10262306a36Sopenharmony_ci - description: Address and Size of the L1 PRAM internal memory region 10362306a36Sopenharmony_ci - description: Address and Size of the L1 DRAM internal memory region 10462306a36Sopenharmony_ci reg-names: 10562306a36Sopenharmony_ci items: 10662306a36Sopenharmony_ci - const: l2sram 10762306a36Sopenharmony_ci - const: l1pram 10862306a36Sopenharmony_ci - const: l1dram 10962306a36Sopenharmony_cielse: 11062306a36Sopenharmony_ci if: 11162306a36Sopenharmony_ci properties: 11262306a36Sopenharmony_ci compatible: 11362306a36Sopenharmony_ci enum: 11462306a36Sopenharmony_ci - ti,am62a-c7xv-dsp 11562306a36Sopenharmony_ci - ti,j721e-c71-dsp 11662306a36Sopenharmony_ci - ti,j721s2-c71-dsp 11762306a36Sopenharmony_ci then: 11862306a36Sopenharmony_ci properties: 11962306a36Sopenharmony_ci reg: 12062306a36Sopenharmony_ci items: 12162306a36Sopenharmony_ci - description: Address and Size of the L2 SRAM internal memory region 12262306a36Sopenharmony_ci - description: Address and Size of the L1 DRAM internal memory region 12362306a36Sopenharmony_ci reg-names: 12462306a36Sopenharmony_ci items: 12562306a36Sopenharmony_ci - const: l2sram 12662306a36Sopenharmony_ci - const: l1dram 12762306a36Sopenharmony_ci 12862306a36Sopenharmony_cirequired: 12962306a36Sopenharmony_ci - compatible 13062306a36Sopenharmony_ci - reg 13162306a36Sopenharmony_ci - reg-names 13262306a36Sopenharmony_ci - ti,sci 13362306a36Sopenharmony_ci - ti,sci-dev-id 13462306a36Sopenharmony_ci - ti,sci-proc-ids 13562306a36Sopenharmony_ci - resets 13662306a36Sopenharmony_ci - firmware-name 13762306a36Sopenharmony_ci - mboxes 13862306a36Sopenharmony_ci - memory-region 13962306a36Sopenharmony_ci 14062306a36Sopenharmony_ciunevaluatedProperties: false 14162306a36Sopenharmony_ci 14262306a36Sopenharmony_ciexamples: 14362306a36Sopenharmony_ci - | 14462306a36Sopenharmony_ci soc { 14562306a36Sopenharmony_ci #address-cells = <2>; 14662306a36Sopenharmony_ci #size-cells = <2>; 14762306a36Sopenharmony_ci 14862306a36Sopenharmony_ci mailbox0_cluster3: mailbox-0 { 14962306a36Sopenharmony_ci #mbox-cells = <1>; 15062306a36Sopenharmony_ci }; 15162306a36Sopenharmony_ci 15262306a36Sopenharmony_ci mailbox0_cluster4: mailbox-1 { 15362306a36Sopenharmony_ci #mbox-cells = <1>; 15462306a36Sopenharmony_ci }; 15562306a36Sopenharmony_ci 15662306a36Sopenharmony_ci bus@100000 { 15762306a36Sopenharmony_ci compatible = "simple-bus"; 15862306a36Sopenharmony_ci #address-cells = <2>; 15962306a36Sopenharmony_ci #size-cells = <2>; 16062306a36Sopenharmony_ci ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */ 16162306a36Sopenharmony_ci <0x00 0x64800000 0x00 0x64800000 0x00 0x00800000>, /* C71_0 */ 16262306a36Sopenharmony_ci <0x4d 0x80800000 0x4d 0x80800000 0x00 0x00800000>, /* C66_0 */ 16362306a36Sopenharmony_ci <0x4d 0x81800000 0x4d 0x81800000 0x00 0x00800000>; /* C66_1 */ 16462306a36Sopenharmony_ci 16562306a36Sopenharmony_ci /* J721E C66_0 DSP node */ 16662306a36Sopenharmony_ci dsp@4d80800000 { 16762306a36Sopenharmony_ci compatible = "ti,j721e-c66-dsp"; 16862306a36Sopenharmony_ci reg = <0x4d 0x80800000 0x00 0x00048000>, 16962306a36Sopenharmony_ci <0x4d 0x80e00000 0x00 0x00008000>, 17062306a36Sopenharmony_ci <0x4d 0x80f00000 0x00 0x00008000>; 17162306a36Sopenharmony_ci reg-names = "l2sram", "l1pram", "l1dram"; 17262306a36Sopenharmony_ci ti,sci = <&dmsc>; 17362306a36Sopenharmony_ci ti,sci-dev-id = <142>; 17462306a36Sopenharmony_ci ti,sci-proc-ids = <0x03 0xFF>; 17562306a36Sopenharmony_ci resets = <&k3_reset 142 1>; 17662306a36Sopenharmony_ci firmware-name = "j7-c66_0-fw"; 17762306a36Sopenharmony_ci memory-region = <&c66_0_dma_memory_region>, 17862306a36Sopenharmony_ci <&c66_0_memory_region>; 17962306a36Sopenharmony_ci mboxes = <&mailbox0_cluster3 &mbox_c66_0>; 18062306a36Sopenharmony_ci }; 18162306a36Sopenharmony_ci 18262306a36Sopenharmony_ci /* J721E C71_0 DSP node */ 18362306a36Sopenharmony_ci c71_0: dsp@64800000 { 18462306a36Sopenharmony_ci compatible = "ti,j721e-c71-dsp"; 18562306a36Sopenharmony_ci reg = <0x00 0x64800000 0x00 0x00080000>, 18662306a36Sopenharmony_ci <0x00 0x64e00000 0x00 0x0000c000>; 18762306a36Sopenharmony_ci reg-names = "l2sram", "l1dram"; 18862306a36Sopenharmony_ci ti,sci = <&dmsc>; 18962306a36Sopenharmony_ci ti,sci-dev-id = <15>; 19062306a36Sopenharmony_ci ti,sci-proc-ids = <0x30 0xFF>; 19162306a36Sopenharmony_ci resets = <&k3_reset 15 1>; 19262306a36Sopenharmony_ci firmware-name = "j7-c71_0-fw"; 19362306a36Sopenharmony_ci memory-region = <&c71_0_dma_memory_region>, 19462306a36Sopenharmony_ci <&c71_0_memory_region>; 19562306a36Sopenharmony_ci mboxes = <&mailbox0_cluster4 &mbox_c71_0>; 19662306a36Sopenharmony_ci }; 19762306a36Sopenharmony_ci }; 19862306a36Sopenharmony_ci }; 199