162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/remoteproc/qcom,qcs404-cdsp-pil.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Qualcomm QCS404 CDSP Peripheral Image Loader 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Bjorn Andersson <bjorn.andersson@linaro.org> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_cidescription: 1362306a36Sopenharmony_ci This document defines the binding for a component that loads and boots firmware 1462306a36Sopenharmony_ci on the Qualcomm Technology Inc. CDSP (Compute DSP). 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ciproperties: 1762306a36Sopenharmony_ci compatible: 1862306a36Sopenharmony_ci enum: 1962306a36Sopenharmony_ci - qcom,qcs404-cdsp-pil 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ci reg: 2262306a36Sopenharmony_ci maxItems: 1 2362306a36Sopenharmony_ci description: 2462306a36Sopenharmony_ci The base address and size of the qdsp6ss register 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci interrupts: 2762306a36Sopenharmony_ci items: 2862306a36Sopenharmony_ci - description: Watchdog interrupt 2962306a36Sopenharmony_ci - description: Fatal interrupt 3062306a36Sopenharmony_ci - description: Ready interrupt 3162306a36Sopenharmony_ci - description: Handover interrupt 3262306a36Sopenharmony_ci - description: Stop acknowledge interrupt 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_ci interrupt-names: 3562306a36Sopenharmony_ci items: 3662306a36Sopenharmony_ci - const: wdog 3762306a36Sopenharmony_ci - const: fatal 3862306a36Sopenharmony_ci - const: ready 3962306a36Sopenharmony_ci - const: handover 4062306a36Sopenharmony_ci - const: stop-ack 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci clocks: 4362306a36Sopenharmony_ci items: 4462306a36Sopenharmony_ci - description: XO clock 4562306a36Sopenharmony_ci - description: SWAY clock 4662306a36Sopenharmony_ci - description: TBU clock 4762306a36Sopenharmony_ci - description: BIMC clock 4862306a36Sopenharmony_ci - description: AHB AON clock 4962306a36Sopenharmony_ci - description: Q6SS SLAVE clock 5062306a36Sopenharmony_ci - description: Q6SS MASTER clock 5162306a36Sopenharmony_ci - description: Q6 AXIM clock 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_ci clock-names: 5462306a36Sopenharmony_ci items: 5562306a36Sopenharmony_ci - const: xo 5662306a36Sopenharmony_ci - const: sway 5762306a36Sopenharmony_ci - const: tbu 5862306a36Sopenharmony_ci - const: bimc 5962306a36Sopenharmony_ci - const: ahb_aon 6062306a36Sopenharmony_ci - const: q6ss_slave 6162306a36Sopenharmony_ci - const: q6ss_master 6262306a36Sopenharmony_ci - const: q6_axim 6362306a36Sopenharmony_ci 6462306a36Sopenharmony_ci power-domains: 6562306a36Sopenharmony_ci items: 6662306a36Sopenharmony_ci - description: CX power domain 6762306a36Sopenharmony_ci 6862306a36Sopenharmony_ci resets: 6962306a36Sopenharmony_ci items: 7062306a36Sopenharmony_ci - description: AOSS restart 7162306a36Sopenharmony_ci 7262306a36Sopenharmony_ci reset-names: 7362306a36Sopenharmony_ci items: 7462306a36Sopenharmony_ci - const: restart 7562306a36Sopenharmony_ci 7662306a36Sopenharmony_ci memory-region: 7762306a36Sopenharmony_ci maxItems: 1 7862306a36Sopenharmony_ci description: Reference to the reserved-memory for the Hexagon core 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_ci qcom,halt-regs: 8162306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/phandle-array 8262306a36Sopenharmony_ci description: 8362306a36Sopenharmony_ci Phandle reference to a syscon representing TCSR followed by the 8462306a36Sopenharmony_ci three offsets within syscon for q6, modem and nc halt registers. 8562306a36Sopenharmony_ci 8662306a36Sopenharmony_ci qcom,smem-states: 8762306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/phandle-array 8862306a36Sopenharmony_ci description: States used by the AP to signal the Hexagon core 8962306a36Sopenharmony_ci items: 9062306a36Sopenharmony_ci - description: Stop the modem 9162306a36Sopenharmony_ci 9262306a36Sopenharmony_ci qcom,smem-state-names: 9362306a36Sopenharmony_ci description: The names of the state bits used for SMP2P output 9462306a36Sopenharmony_ci items: 9562306a36Sopenharmony_ci - const: stop 9662306a36Sopenharmony_ci 9762306a36Sopenharmony_cirequired: 9862306a36Sopenharmony_ci - compatible 9962306a36Sopenharmony_ci - reg 10062306a36Sopenharmony_ci - interrupts 10162306a36Sopenharmony_ci - interrupt-names 10262306a36Sopenharmony_ci - clocks 10362306a36Sopenharmony_ci - clock-names 10462306a36Sopenharmony_ci - power-domains 10562306a36Sopenharmony_ci - resets 10662306a36Sopenharmony_ci - reset-names 10762306a36Sopenharmony_ci - qcom,halt-regs 10862306a36Sopenharmony_ci - memory-region 10962306a36Sopenharmony_ci - qcom,smem-states 11062306a36Sopenharmony_ci - qcom,smem-state-names 11162306a36Sopenharmony_ci 11262306a36Sopenharmony_ciadditionalProperties: false 11362306a36Sopenharmony_ci 11462306a36Sopenharmony_ciexamples: 11562306a36Sopenharmony_ci - | 11662306a36Sopenharmony_ci #include <dt-bindings/interrupt-controller/arm-gic.h> 11762306a36Sopenharmony_ci #include <dt-bindings/clock/qcom,gcc-qcs404.h> 11862306a36Sopenharmony_ci #include <dt-bindings/power/qcom-rpmpd.h> 11962306a36Sopenharmony_ci #include <dt-bindings/clock/qcom,turingcc-qcs404.h> 12062306a36Sopenharmony_ci remoteproc@b00000 { 12162306a36Sopenharmony_ci compatible = "qcom,qcs404-cdsp-pil"; 12262306a36Sopenharmony_ci reg = <0x00b00000 0x4040>; 12362306a36Sopenharmony_ci 12462306a36Sopenharmony_ci interrupts-extended = <&intc GIC_SPI 229 IRQ_TYPE_EDGE_RISING>, 12562306a36Sopenharmony_ci <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, 12662306a36Sopenharmony_ci <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, 12762306a36Sopenharmony_ci <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, 12862306a36Sopenharmony_ci <&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; 12962306a36Sopenharmony_ci interrupt-names = "wdog", "fatal", "ready", 13062306a36Sopenharmony_ci "handover", "stop-ack"; 13162306a36Sopenharmony_ci 13262306a36Sopenharmony_ci clocks = <&xo_board>, 13362306a36Sopenharmony_ci <&gcc GCC_CDSP_CFG_AHB_CLK>, 13462306a36Sopenharmony_ci <&gcc GCC_CDSP_TBU_CLK>, 13562306a36Sopenharmony_ci <&gcc GCC_BIMC_CDSP_CLK>, 13662306a36Sopenharmony_ci <&turingcc TURING_WRAPPER_AON_CLK>, 13762306a36Sopenharmony_ci <&turingcc TURING_Q6SS_AHBS_AON_CLK>, 13862306a36Sopenharmony_ci <&turingcc TURING_Q6SS_AHBM_AON_CLK>, 13962306a36Sopenharmony_ci <&turingcc TURING_Q6SS_Q6_AXIM_CLK>; 14062306a36Sopenharmony_ci clock-names = "xo", 14162306a36Sopenharmony_ci "sway", 14262306a36Sopenharmony_ci "tbu", 14362306a36Sopenharmony_ci "bimc", 14462306a36Sopenharmony_ci "ahb_aon", 14562306a36Sopenharmony_ci "q6ss_slave", 14662306a36Sopenharmony_ci "q6ss_master", 14762306a36Sopenharmony_ci "q6_axim"; 14862306a36Sopenharmony_ci 14962306a36Sopenharmony_ci power-domains = <&rpmhpd SDM845_CX>; 15062306a36Sopenharmony_ci 15162306a36Sopenharmony_ci resets = <&gcc GCC_CDSP_RESTART>; 15262306a36Sopenharmony_ci reset-names = "restart"; 15362306a36Sopenharmony_ci 15462306a36Sopenharmony_ci qcom,halt-regs = <&tcsr 0x19004>; 15562306a36Sopenharmony_ci 15662306a36Sopenharmony_ci memory-region = <&cdsp_fw_mem>; 15762306a36Sopenharmony_ci 15862306a36Sopenharmony_ci qcom,smem-states = <&cdsp_smp2p_out 0>; 15962306a36Sopenharmony_ci qcom,smem-state-names = "stop"; 16062306a36Sopenharmony_ci }; 161